rtl Architecture Reference

List of all members.

Signals
rx_data	std_logic_vector ( 31 downto 0 )
tx_data	std_logic_vector ( 31 downto 0 )
rx_ready	std_logic
rx_next	std_logic
tx_we	std_logic
tx_hdr	std_logic
tx_err	std_logic
cfg_we	std_logic
cfg_addr	std_logic_vector ( 1 downto 0 )
cfg_din	std_logic_vector ( 31 downto 0 )
cfg_dout	std_logic_vector ( 31 downto 0 )

Instantiations
iface	work.transactor_if
sm	work.transactor_sm
cfg	work.transactor_cfg

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Detailed Description

Definition at line 36 of file transactor.vhd.

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The documentation for this class was generated from the following file:

• src/common/IPBUS/ipbus_core/hdl/transactor.vhd