memory_rnd Entity Reference

Inheritance diagram for memory_rnd:

List of all members.

Entities
behavioral	architecture

Use Clauses
numeric_std

Ports
RST_lowClk	in std_logic
low_clk	in Std_logic
RST_PCIClk	in Std_logic
PCIe_clk	in std_logic
PCIe_dt	in std_logic_vector ( 31 downto 0 )
PCIe_func	in std_logic_vector ( 15 downto 0 )
PCIe_cs	in std_logic
PCIe_wen	in std_logic
start	in std_logic
wc	out std_logic_vector ( 15 downto 0 )
RST_EvtClk	in std_logic
evt_clk	in std_logic
trigger	out std_logic
end_evt	in std_logic

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Detailed Description

Definition at line 26 of file memory_rnd.vhd.

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The documentation for this class was generated from the following files:

• src/CMS_DAQ_if/10Gb/slink/memory_rnd.vhd
• src/CMS_DAQ_if/5Gb/slink/memory_rnd.vhd