Behavioral Architecture Reference

List of all members.

Processes
PROCESS_835	( UsrClk ,S6LINK_RxResetDone )
PROCESS_836	( ipb_clk ,S6LINK_RxResetDone )
PROCESS_837	( UsrClk )

Components
ipbus_ctrl	<Entity ipbus_ctrl>
S6Link_init	<Entity S6Link_init>

Constants
M	integer := 10

Signals
CPLLLOCK	std_logic := ' 0 '
CPLLLOCK_n	std_logic := ' 0 '
S6LinkRdy_n	std_logic := ' 1 '
S6LINK_TxOutClk	std_logic := ' 0 '
S6LINK_RxCharIsComma	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
S6LINK_RxCharIsK	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
S6LINK_RxNotInTable	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
S6LINK_RxDataOut	std_logic_vector ( 15 downto 0 ) := ( others = > ' 0 ' )
S6LINK_TxCharIsK	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
S6LINK_TxDataIn	std_logic_vector ( 15 downto 0 ) := ( others = > ' 0 ' )
S6LINK_RxResetDone	std_logic := ' 0 '
S6LINK_RxResetDoneSyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
S6LINK_TxReset	std_logic := ' 0 '
S6LINK_DiffCtrl	std_logic_vector ( 3 downto 0 ) := x " 9 "
startTx	std_logic := ' 0 '
sending	std_logic := ' 0 '
enTx	std_logic := ' 1 '
got_SNp	std_logic := ' 1 '
SN_T2	std_logic_vector ( 8 downto 0 ) := ( others = > ' 0 ' )
SN_cntr	std_logic_vector ( M downto 0 ) := ( others = > ' 0 ' )
ipbus_txready	std_logic := ' 0 '
ipbus_rxdlast	std_logic := ' 0 '
ipbus_rxerr	std_logic := ' 0 '
ipbus_txdvld	std_logic := ' 0 '
ipbus_txdvld_q	std_logic := ' 0 '
receive	std_logic := ' 0 '
send_amc_en	std_logic := ' 0 '
wr_amc_en_SyncRegs	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
cmd	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
cmd_cntr	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
ipbus_rxdvld	std_logic := ' 0 '
div	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
tx_header	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
ipbus_txdlast	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
ipbus_txerr	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
AXI4_bufA	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
AXI4_bufB	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
ipbus_rxd	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
ipbus_txd	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
DATA_VALID	std_logic := ' 0 '
rxfsmresetdone	std_logic := ' 0 '
txfsmresetdone	std_logic := ' 0 '
rst_ipbus_ctrl	std_logic := ' 0 '
oldRxData15	std_logic := ' 0 '

Instantiations
i_ipbus_ctrl	ipbus_ctrl <Entity ipbus_ctrl>
i_S6Link_init	S6Link_init <Entity S6Link_init>

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Detailed Description

Definition at line 65 of file ipbus_if.vhd.

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The documentation for this class was generated from the following files:

• src/common/IPBUS/ipbus_if.vhd