Behavioral Architecture Reference

List of all members.

Processes
PROCESS_807	( ipb_clk )
PROCESS_808	( ipb_addr ,ipbus_rbuf_do ,testCntr )
PROCESS_809	( sysclk )
PROCESS_810	( memclk )
PROCESS_811	( memclk ,ipbRead ,test )
PROCESS_812	( memclk )

Components
FIFO_RESET_7S	<Entity FIFO_RESET_7S>
RAM32x6D	<Entity RAM32x6D>
RAM32x6Db	<Entity RAM32x6Db>
chipscope
chipscope1
chipscope1b

Signals
TCPqueue_we	std_logic := ' 0 '
ipb_start_addr	std_logic_vector ( 26 downto 0 ) := ( others = > ' 0 ' )
ipbReadSyncRegs	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
ipbRead	std_logic := ' 0 '
ipbRead_q	std_logic := ' 0 '
ipb_ack_i	std_logic := ' 0 '
ipb_rqst	std_logic := ' 0 '
ipb_raddr	std_logic_vector ( 23 downto 0 ) := ( others = > ' 0 ' )
ipb_seq	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
ipb_rqst_cnt	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
ipb_rqst_inqueue	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
ipb_rqstSyncRegs	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
queue_we	std_logic := ' 0 '
queue_ceReg	std_logic := ' 0 '
queue_do_vld	std_logic := ' 0 '
TCP_addr1and0	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
queue_di	std_logic_vector ( 29 downto 0 ) := ( others = > ' 0 ' )
queue_do	std_logic_vector ( 29 downto 0 ) := ( others = > ' 0 ' )
queue_wa	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
queue_ra	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
queue_wap	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
queue_wa0SyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
queue_wa1SyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
queue_wa2SyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
queue_wa3SyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
Oqueue_di	std_logic_vector ( 12 downto 0 ) := ( others = > ' 0 ' )
Oqueue_dop	std_logic_vector ( 12 downto 0 ) := ( others = > ' 0 ' )
Oqueue_do	std_logic_vector ( 12 downto 0 ) := ( others = > ' 0 ' )
Oqueue_a	std_logic_vector ( 3 downto 0 ) := ( others = > ' 1 ' )
Oqueue_re	std_logic := ' 0 '
Oqueue_do_vld	std_logic := ' 0 '
test_wc	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
lfsr	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
testErr	std_logic := ' 0 '
testCntr	std_logic_vector ( 30 downto 0 ) := ( others = > ' 0 ' )
app_rqst_i	std_logic := ' 0 '
app_ren	std_logic := ' 0 '
last_word	std_logic := ' 0 '
s_demux	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
data_demux	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
lengthCntr	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
rd_cnt	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
app_addr_i	std_logic_vector ( 27 downto 0 ) := ( others = > ' 0 ' )
fifo_en	std_logic := ' 0 '
fifo_rst	std_logic := ' 0 '
buf_empty	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
buf_we	std_logic := ' 0 '
buf_re	std_logic := ' 0 '
buf_di	std_logic_vector ( 255 downto 0 ) := ( others = > ' 0 ' )
buf_do	std_logic_vector ( 255 downto 0 ) := ( others = > ' 0 ' )
TCPqueue_do_vld	std_logic := ' 0 '
TCP_rrqst	std_logic := ' 0 '
TCP_raddr	std_logic_vector ( 23 downto 0 ) := ( others = > ' 0 ' )
TCP_raddr_end	std_logic_vector ( 12 downto 0 ) := ( others = > ' 0 ' )
TCP_rlengthp	std_logic_vector ( 6 downto 0 ) := ( others = > ' 0 ' )
TCP_rlength	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
TCPqueue_di	std_logic_vector ( 41 downto 0 ) := ( others = > ' 0 ' )
TCPqueue_dop	std_logic_vector ( 41 downto 0 ) := ( others = > ' 0 ' )
TCPqueue_do	std_logic_vector ( 41 downto 0 ) := ( others = > ' 0 ' )
TCPqueue_a	std_logic_vector ( 3 downto 0 ) := ( others = > ' 1 ' )
Last_TCP_addr	std_logic_vector ( 12 downto 0 ) := ( others = > ' 0 ' )
first_test_read	std_logic := ' 1 '
sel_TCP	std_logic := ' 0 '
rd_ipb	std_logic := ' 0 '
ipbus_rbuf_wa	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
ipbus_rbuf_ra	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
ipbus_rbuf_di	std_logic_vector ( 257 downto 0 ) := ( others = > ' 0 ' )
ipbus_rbuf_do	std_logic_vector ( 257 downto 0 ) := ( others = > ' 0 ' )
ipbus_rbuf_wa2SyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
ipbus_rbuf_wa1SyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
ipbus_rbuf_wa0SyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
ipbus_rbuf_wap	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
ipb_rdata_i	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
rd_queue_o	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
rd_queue_q	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
rd_queue_wa	std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' )
rd_queue_ra	std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' )
rd_queue_q_vld	std_logic := ' 0 '
WRCOUNT	array4x9
RDCOUNT	array4x9
TCP_dout_valid_i	std_logic := ' 0 '
TCP_lastword_i	std_logic := ' 0 '
chk_SEQ	std_logic := ' 0 '
bad_SEQ	std_logic := ' 0 '
NXT_SEQ	std_logic_vector ( 15 downto 0 ) := ( others = > ' 0 ' )
ina	std_logic_vector ( 135 downto 0 ) := ( others = > ' 0 ' )
inb	std_logic_vector ( 135 downto 0 ) := ( others = > ' 0 ' )
cs_in	std_logic_vector ( 303 downto 0 ) := ( others = > ' 0 ' )

Instantiations
i_FIFO_RESET_7S	FIFO_RESET_7S <Entity FIFO_RESET_7S>
i_ipbus_rbuf	RAM32x6Db <Entity RAM32x6Db>

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Detailed Description

Definition at line 79 of file ddr_rport.vhd.

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The documentation for this class was generated from the following files:

• src/common/DDR/ddr_rport.vhd