RTL Architecture Reference

List of all members.

Functions
bit_vector	conv_qpll_fbdiv_top ( qpllfbdiv_top: in in integer )	[ impure ]
bit	conv_qpll_fbdiv_ratio ( qpllfbdiv_top: in in integer )	[ impure ]

Constants
DLY	time := 1 ns
QPLL_FBDIV_TOP	integer := 40
QPLL_FBDIV_IN	bit_vector ( 9 downto 0 ) := conv_qpll_fbdiv_top ( QPLL_FBDIV_TOP )
QPLL_FBDIV_RATIO	bit := conv_qpll_fbdiv_ratio ( QPLL_FBDIV_TOP )

Signals
tied_to_ground_i	std_logic
tied_to_ground_vec_i	std_logic_vector ( 63 downto 0 )
tied_to_vcc_i	std_logic
tied_to_vcc_vec_i	std_logic_vector ( 63 downto 0 )

Attributes
CORE_GENERATION_INFO	string
CORE_GENERATION_INFO	RTL : architecture is " amc_gtx5Gpd_common , gtwizard_v3_6_1 , {protocol_file = Start_from_scratch} "

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Detailed Description

Definition at line 94 of file amc_gtx5gpd_common.vhd.

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The documentation for this class was generated from the following file:

• src/common/AMC_if/amc_gtx5Gpd/amc_gtx5gpd_common.vhd