RTL Architecture Reference

List of all members.

Functions
integer	get_cdrlock_time ( is_sim: in in integer )
integer	get_lpm_adapt_lock_time ( is_sim: in in integer )

Processes
cdrlock_timeout	( SYSCLK_IN )

Components
S6Link	<Entity S6Link>
S6Link_TX_STARTUP_FSM	<Entity S6Link_TX_STARTUP_FSM>
S6Link_RX_STARTUP_FSM	<Entity S6Link_RX_STARTUP_FSM>
S6Link_ADAPT_TOP_DFE	<Entity S6Link_ADAPT_TOP_DFE>
S6Link_ADAPT_TOP_LPM	<Entity S6Link_ADAPT_TOP_LPM>

Constants
DLY	time := 1 ns
STABLE_CLOCK_PERIOD	integer := 20
RX_CDRLOCK_TIME	integer := get_cdrlock_time ( EXAMPLE_SIMULATION )
WAIT_TIME_CDRLOCK	integer := RX_CDRLOCK_TIME /STABLE_CLOCK_PERIOD
LPM_ADAPT_LOCK_TIMER	integer := get_lpm_adapt_lock_time ( EXAMPLE_SIMULATION )
DFE_ADAPT_LOCK_TIMER	integer := integer ( ( 13 * integer ( 60 ) ) /integer ( 2 . 5 )

Signals
gt0_cpllreset_i	std_logic
gt0_cpllreset_t	std_logic
gt0_cpllrefclklost_i	std_logic
gt0_cplllock_i	std_logic
gt0_txresetdone_i	std_logic
gt0_rxresetdone_i	std_logic
gt0_gttxreset_i	std_logic
gt0_gttxreset_t	std_logic
gt0_gtrxreset_i	std_logic
gt0_gtrxreset_t	std_logic
gt0_rxdfelpmreset_i	std_logic
gt0_txuserrdy_i	std_logic
gt0_txuserrdy_t	std_logic
gt0_rxuserrdy_i	std_logic
gt0_rxuserrdy_t	std_logic
gt0_rxdfeagchold_i	std_logic
gt0_rxdfelfhold_i	std_logic
gt0_rxlpmlfhold_i	std_logic
gt0_rxlpmhfhold_i	std_logic
gt0_drpaddr_i	std_logic_vector ( 8 downto 0 )
gt0_drpdi_i	std_logic_vector ( 15 downto 0 )
gt0_drpdo_o	std_logic_vector ( 15 downto 0 )
gt0_drpen_i	std_logic
gt0_drpwe_i	std_logic
gt0_drprdy_o	std_logic
gt0_drpaddr_int	std_logic_vector ( 8 downto 0 )
gt0_drpdi_int	std_logic_vector ( 15 downto 0 )
gt0_drpdo_int	std_logic_vector ( 15 downto 0 )
gt0_drpen_int	std_logic
gt0_drpwe_int	std_logic
gt0_drprdy_int	std_logic
gt0_rxmonitorout_o	std_logic_vector ( 6 downto 0 )
gt0_rxmonitorsel_i	std_logic_vector ( 1 downto 0 )
gt0_adapt_done	std_logic
gt0_qpllreset_i	std_logic
gt0_qpllreset_t	std_logic
gt0_qpllrefclklost_i	std_logic
gt0_qplllock_i	std_logic
tied_to_ground_i	std_logic
tied_to_vcc_i	std_logic
gt0_rxoutclk_i	std_logic
gt0_recclk_stable_i	std_logic
rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
rx_cdrlocked	std_logic

Instantiations
S6Link_i	S6Link <Entity S6Link>
gt0_txresetfsm_i	S6Link_TX_STARTUP_FSM <Entity S6Link_TX_STARTUP_FSM>
gt0_rxresetfsm_i	S6Link_RX_STARTUP_FSM <Entity S6Link_RX_STARTUP_FSM>
gt0_adapt_top_dfe_i	S6Link_ADAPT_TOP_DFE <Entity S6Link_ADAPT_TOP_DFE>
gt0_adapt_top_lpm_i	S6Link_ADAPT_TOP_LPM <Entity S6Link_ADAPT_TOP_LPM>

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Detailed Description

Definition at line 178 of file s6link_init.vhd.

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The documentation for this class was generated from the following files:

• src/common/IPBUS/S6Link/s6link_init.vhd