S6Link_ctle_agc_comp Entity Reference

Inheritance diagram for S6Link_ctle_agc_comp:

List of all members.

Entities
Behavioral	architecture

Libraries
unisim

Use Clauses
NUMERIC_STD
vcomponents

Generics
AGC_TIMER	integer range 0 to 4095 := 150

Ports
RST	in STD_LOGIC
DONE	out STD_LOGIC
DRDY	in STD_LOGIC
DO	in STD_LOGIC_VECTOR ( 15 downto 0 )
DCLK	in STD_LOGIC
DADDR	out STD_LOGIC_VECTOR ( 8 downto 0 )
DI	out STD_LOGIC_VECTOR ( 15 downto 0 )
DEN	out STD_LOGIC
DWE	out STD_LOGIC
RXMONITOR	in STD_LOGIC_VECTOR ( 6 downto 0 )
RXMONITORSEL	out STD_LOGIC_VECTOR ( 1 downto 0 )
curr_state	out STD_LOGIC_VECTOR ( 3 downto 0 )
agc_railing	out STD_LOGIC

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Detailed Description

Definition at line 79 of file s6link_ctle_agc_comp.vhd.

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The documentation for this class was generated from the following file:

• src/common/IPBUS/S6Link/s6link_ctle_agc_comp.vhd