behavioral Architecture Reference

List of all members.

Processes
PROCESS_117	( aclr ,clk_w )
PROCESS_237	( aclr ,clk_w )

Components
lpm_fifo_dc	<Entity lpm_fifo_dc>

Signals
almost_full_reg	std_logic
resetp	std_logic
word_used	std_logic_vector ( fifo_deep - 1 downto 0 )

Instantiations
fifo_dc	lpm_fifo_dc <Entity lpm_fifo_dc>
fifo_dc	lpm_fifo_dc <Entity lpm_fifo_dc>

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Detailed Description

Definition at line 35 of file FIFO_sync.vhd.

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The documentation for this class was generated from the following files:

• src/CMS_DAQ_if/10Gb/slink/FIFO_sync.vhd
• src/CMS_DAQ_if/5Gb/slink/FIFO_sync.vhd