FIFO_sync Entity Reference

Inheritance diagram for FIFO_sync:

List of all members.

Entities
behavioral	architecture

Use Clauses
numeric_std

Generics
fifo_deep	integer := 6

Ports
aclr	in std_logic
clk_w	in std_logic
wen	in std_logic
dataw	in std_logic_vector ( 65 downto 0 )
almost_f	out std_logic
clk_r	in std_logic
datar	out std_logic_vector ( 65 downto 0 )
ren	in std_logic
empty	out std_logic

---

Detailed Description

Definition at line 18 of file FIFO_sync.vhd.

---

The documentation for this class was generated from the following files:

• src/CMS_DAQ_if/10Gb/slink/FIFO_sync.vhd
• src/CMS_DAQ_if/5Gb/slink/FIFO_sync.vhd