Behavioral Architecture Reference

List of all members.

Processes
PROCESS_287	( wclk ,reset )
PROCESS_288	( rclk ,reset )

Types
array14x12	array ( 0 to 13 ) of std_logic_vector ( 11 downto 0 )

Signals
RDCOUNT	array14x12
WRCOUNT	array14x12
RDCOUNT14	std_logic_vector ( 12 downto 0 ) := ( others = > ' 0 ' )
WRCOUNT14	std_logic_vector ( 12 downto 0 ) := ( others = > ' 0 ' )
FIFO_full	std_logic_vector ( 13 downto 0 ) := ( others = > ' 0 ' )
FIFO_empty	std_logic_vector ( 13 downto 0 ) := ( others = > ' 0 ' )
FIFO_RdEn	std_logic_vector ( 6 downto 0 ) := ( others = > ' 0 ' )
RDERR	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
WRERR	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
FIFO_Do	std_logic_vector ( 62 downto 0 ) := ( others = > ' 0 ' )

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Detailed Description

Definition at line 52 of file AMC_DATA_FIFO.vhd.

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The documentation for this class was generated from the following file:

• src/common/AMC_if/AMC_DATA_FIFO.vhd