udp_tx_mux Entity Reference

Inheritance diagram for udp_tx_mux:

List of all members.

Entities
rtl	architecture

Use Clauses
numeric_std

Ports
mac_clk	in std_logic
rst_macclk	in std_logic
rxram_end_addr	in std_logic_vector ( 12 downto 0 )
rxram_send	in std_logic
rxram_busy	out std_logic
addrb	out std_logic_vector ( 12 downto 0 )
dob	in std_logic_vector ( 7 downto 0 )
udpram_send	in std_logic
udpram_busy	out std_logic
udpaddrb	out std_logic_vector ( 12 downto 0 )
udpdob	in std_logic_vector ( 7 downto 0 )
do_sum	out std_logic
clr_sum	out std_logic
int_data	out std_logic_vector ( 7 downto 0 )
int_valid	out std_logic
cksum	out std_logic
outbyte	in std_logic_vector ( 7 downto 0 )
mac_tx_data	out std_logic_vector ( 7 downto 0 )
mac_tx_valid	out std_logic
mac_tx_last	out std_logic
mac_tx_error	out std_logic
mac_tx_ready	in std_logic
ipbus_out_hdr	out std_logic_vector ( 31 downto 0 )
ipbus_out_valid	out std_logic

---

Detailed Description

Definition at line 9 of file udp_tx_mux.vhd.

---

The documentation for this class was generated from the following file:

• src/common/IPBUS/ipbus_core/hdl/udp_tx_mux.vhd