rtl Architecture Reference

List of all members.

Processes
PROCESS_826	( clk )

Signals
d_sync	std_logic
d_sync_d	std_logic
d_edge	std_logic
d25	std_logic
d25_d	std_logic
q_i	std_logic

Instantiations
clkdiv	work.clock_div

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Detailed Description

Definition at line 21 of file stretcher.vhd.

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The documentation for this class was generated from the following files:

• src/common/IPBUS/ipbus_core/hdl/stretcher.vhd