lpm_fifo Entity Reference

Inheritance diagram for lpm_fifo:

List of all members.

Entities
lpm_fifo_a	architecture

Libraries
XilinxCoreLib

Ports
clk	in STD_LOGIC
rst	in STD_LOGIC
din	in STD_LOGIC_VECTOR ( 31 downto 0 )
wr_en	in STD_LOGIC
rd_en	in STD_LOGIC
dout	out STD_LOGIC_VECTOR ( 31 downto 0 )
full	out STD_LOGIC
empty	out STD_LOGIC

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Detailed Description

Definition at line 43 of file lpm_fifo.vhd.

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The documentation for this class was generated from the following file:

• src/CMS_DAQ_if/5Gb/slink/lpm_fifo.vhd