behave Architecture Reference

List of all members.

Processes
crc_gen_process	( clock )

Signals
crc_rT	STD_LOGIC_VECTOR ( 31 downto 0 )
crc_8T	STD_LOGIC_VECTOR ( 31 downto 0 )
crc_i	STD_LOGIC_VECTOR ( 31 downto 0 )
End_of_crc	STD_LOGIC

---

Detailed Description

Definition at line 43 of file crc_gen_32b.vhd.

---

The documentation for this class was generated from the following file:

• src/CMS_DAQ_if/10Gb/slink/crc_gen_32b.vhd