behavioral Architecture Reference

List of all members.

Processes
PROCESS_176	( Greset_CLK ,clock )
PROCESS_177	( reset_CLK ,clock )
state_clk	( reset_CLK ,clock )
state_step	( packet ,start_pckt ,pckt_type ,wc_val ,crc_valid )
PROCESS_178	( reset_CLK ,clock )
PROCESS_179	( Greset_CLK ,clock )
PROCESS_180	( reset_CLK ,clock )
PROCESS_181	( clock )
PROCESS_182	( clock )
PROCESS_183	( reset_CLK ,clock )
PROCESS_184	( Greset_CLK ,clock )

Components
crc_gen_usb_32to16	<Entity crc_gen_usb_32to16>

Types
packet_type	( idle , start_of_frame , seq_number , ID_len , status0 , status1 , command0 , command1 , data0 , data1 , CRC_end_frame , wait_crc , gap0 , gap1 , gap2 , gap3 )

Signals
packet	packet_type
packetNext	packet_type
cmp_crc	std_logic
val_crc	std_logic_vector ( 15 downto 0 )
crc_valid	std_logic
end_crc	std_logic
pckt_type	std_logic_vector ( 2 downto 0 )
seqnb_mem	std_logic_vector ( 31 downto 0 )
len_mem	std_logic_vector ( 15 downto 0 )
cmd_mem	std_logic_vector ( 63 downto 0 )
del_crc	std_logic_vector ( 2 downto 0 )
pipe_dta	std_logic_vector ( 31 downto 0 )
pipe_dtb	std_logic_vector ( 31 downto 0 )
pipe_dtc	std_logic_vector ( 31 downto 0 )
pipe_ka	std_logic_vector ( 3 downto 0 )
pipe_kb	std_logic_vector ( 3 downto 0 )
pipe_kc	std_logic_vector ( 3 downto 0 )
nxt_dt	std_logic
wc_val	std_logic_vector ( 15 downto 0 )
mem_error	std_logic_vector ( 3 downto 0 )
mem_error_gen	std_logic_vector ( 3 downto 0 )
cnt_pck	std_logic_vector ( 31 downto 0 )

Instantiations
CRC_engine	crc_gen_usb_32to16 <Entity crc_gen_usb_32to16>

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Detailed Description

Definition at line 55 of file build_pckt_s.vhd.

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The documentation for this class was generated from the following files:

• src/CMS_DAQ_if/5Gb/slink/build_pckt_s.vhd