Behavioral Architecture Reference

List of all members.

Processes
PROCESS_872	( SCK ,CSn ,sr_in ,MOSI )
PROCESS_873	( SCK ,sr_in ,MOSI )
PROCESS_874	( SCK )

Signals
SPI_write	std_logic := ' 0 '
SPI_read	std_logic := ' 0 '
READ_STATUS	std_logic := ' 0 '
WRITE_CTL	std_logic := ' 0 '
BitCntr	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
sr_in	std_logic_vector ( 6 downto 0 ) := ( others = > ' 0 ' )
sr_out	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
addr	std_logic_vector ( 15 downto 0 ) := ( others = > ' 0 ' )
SPI_we_i	std_logic := ' 0 '
SPI_we_q	std_logic := ' 0 '
STATUS	std_logic_vector ( 7 downto 0 ) := x " 10 "
version	std_logic_vector ( 15 downto 0 ) := ( others = > ' 0 ' )
MACADDR	std_logic_vector ( 47 downto 0 ) := ( others = > ' 0 ' )
SLOT	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
SPI_IPADDR	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
IPADDR_i	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
IPADDR_high	std_logic_vector ( 23 downto 0 ) := ( others = > ' 0 ' )
NET_MASK	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
BOOT_VECTOR	std_logic_vector ( 15 downto 0 ) := ( others = > ' 0 ' )

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Detailed Description

Definition at line 53 of file SPI_if.vhd.

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The documentation for this class was generated from the following file:

• src/common/SPI/SPI_if.vhd