Behavioral Architecture Reference

List of all members.

Processes
PROCESS_822	( clk ,reset )
PROCESS_823	( clk )

Types
state	( Idle , Debouce , S , D , A , W , P )

Signals
clk_div	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
SFP_ABSq	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
SFP	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
SFP_DATA	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
we_SFP	std_logic := ' 0 '
set_we_SFP	std_logic := ' 0 '
SM	state := Idle
t_SDA	std_logic_vector ( 3 downto 0 ) := ( others = > ' 1 ' )
Si5338Cntr	std_logic_vector ( 7 downto 0 ) := ( others = > ' 1 ' )
t_CLK_SDA	std_logic := ' 1 '
t_CLK_SDA_q	std_logic := ' 1 '
Si5338Done	std_logic := ' 0 '
ce_CLK_rdy	std_logic := ' 0 '
ACK	std_logic := ' 0 '
done	std_logic := ' 0 '
data	std_logic := ' 0 '
SFPROM_data	std_logic := ' 0 '
SCL_phase	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
SM_cntr	std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
Debouce_cntr	std_logic_vector ( 17 downto 0 ) := ( others = > ' 0 ' )
SFP_ADDR	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
we_rdata	std_logic := ' 0 '
rdata_ra	std_logic_vector ( 8 downto 0 ) := ( others = > ' 1 ' )
rdata_wa	std_logic_vector ( 13 downto 0 ) := ( others = > ' 1 ' )
DIBDI	std_logic_vector ( 0 downto 0 ) := ( others = > ' 0 ' )
resetSyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )

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Detailed Description

Definition at line 54 of file I2C.vhd.

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The documentation for this class was generated from the following files:

• src/common/I2C/I2C.vhd