Behavioral Architecture Reference

List of all members.

Functions
boolean	A_GT_B ( A: in std_logic_vector ( 10 downto 0 ) , B: in std_logic_vector ( 10 downto 0 ) )
boolean	A_GE_B ( A: in std_logic_vector ( 10 downto 0 ) , B: in std_logic_vector ( 10 downto 0 ) )

Processes
PROCESS_271	( sysclk ,daq_reset )
PROCESS_272	( sysclk ,reset )
PROCESS_273	( sysclk )
PROCESS_274	( sysclk )
PROCESS_275	( sysclk ,rstCntr )
PROCESS_276	( sysclk ,rstCntr )
PROCESS_277	( ipb_clk )
PROCESS_278	( Cntr_ADDR )
PROCESS_279	( sysclk )

Components
DaqLSCXG10G	<Entity DaqLSCXG10G>
DaqLSCXG	<Entity DaqLSCXG>
cmsCRC64	<Entity cmsCRC64>
check_event	<Entity check_event>
SFP_cntr	<Entity SFP_cntr>
chipscope1

Signals
resetSyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
daq_resetSyncRegs	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
inc_ddr_paSyncRegs	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
bldr2SFP_sel	array3X2 := ( others = > ( others = > ' 0 ' ) )
SFP2bldr_sel	array3X2 := ( others = > ( others = > ' 0 ' ) )
EventBufAddr_we_i	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
ReadBusy	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
sysDIV2	std_logic := ' 0 '
MonBuf_wa	std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
MonBuf_ra	std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
MonBufUsed	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
NXT_MonBuf	array3X11 := ( others = > ( others = > ' 0 ' ) )
Written_MonBuf	array4X11 := ( others = > ( others = > ' 0 ' ) )
Written_MonBufMatch	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
AddrOffset	array3X10 := ( others = > ( others = > ' 0 ' ) )
header	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
header_q	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
sfp_rxn	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
sfp_rxp	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
sfp_txn	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
sfp_txp	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
sync_loss	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
LinkFull_n	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
LinkFull	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
LinkCtrl	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
LinkWe	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
LinkDown	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
DaqLSC_status	array3X64 := ( others = > ( others = > ' 0 ' ) )
LinkData	array3X65 := ( others = > ( others = > ' 0 ' ) )
sync_lossSync	array3X3 := ( others = > ( others = > ' 0 ' ) )
sync_loss_cntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
SFP_we	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
EoB	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
SFP_evt_cntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
SFP_blk_cntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
SFP_word_cntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
event_cntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
word_cntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
EventBufAddr_we_cntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
src_ID	array3X16 := ( others = > ( others = > ' 0 ' ) )
txusrclk	std_logic := ' 0 '
LinkDatap	array3X64 := ( others = > ( others = > ' 0 ' ) )
sfp_pd	array3X2 := ( others = > ( others = > ' 0 ' ) )
WrtMonEvtDoneCntr	array3X8 := ( others = > ( others = > ' 0 ' ) )
chk_MonBuf_avl	std_logic := ' 0 '
FirstBlkAddrDo	array2x3x12 := ( others = > ( others = > ( others = > ' 0 ' ) ) )
FirstBlkAddr_ra	array2x3x5 := ( others = > ( others = > ( others = > ' 0 ' ) ) )
FirstBlkAddr_re	array2X3 := ( others = > ( others = > ' 0 ' ) )
WrtMonEvtDone_l	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
MonEvtQueued	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
FirstBlkAddrDoValid	array2X3 := ( others = > ( others = > ' 0 ' ) )
FirstBlkAddr_wa	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
FirstBlkAddrDi	std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' )
FirstBlkAddr_we	std_logic := ' 0 '
MonBuf_full	std_logic := ' 0 '
mon_evt_cnt_i	std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
status_addr	std_logic_vector ( 15 downto 0 ) := ( others = > ' 0 ' )
cmsCRC_initp	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
cmsCRC_init	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
cmsCRC_err	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
cmsCRC_errCntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
EvtLength_errCntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
AMClength_errCntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
AMCvalid_errCntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
AMCcrc_errCntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
BackPressureCntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
TotalEvtLengthCntr	array3X32 := ( others = > ( others = > ' 0 ' ) )
BackPressure31	std_logic_vector ( 2 downto 0 ) := ( others = > ' 1 ' )
BackPressure31_q	std_logic_vector ( 2 downto 0 ) := ( others = > ' 1 ' )
IsBackPressure	std_logic := ' 0 '
StopOverWrite	std_logic := ' 0 '
en_stop	std_logic_vector ( 4 downto 0 ) := ( others = > ' 1 ' )
stop	std_logic := ' 0 '
Cntr2ms	std_logic_vector ( 18 downto 0 ) := ( others = > ' 1 ' )
LiveTimeCntr	array3x19 := ( others = > ( others = > ' 0 ' ) )
LiveTime	array3x8 := ( others = > ( others = > ' 0 ' ) )
inc_err	array3x5 := ( others = > ( others = > ' 0 ' ) )
Cntr_DATA	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
Cntr_ADDR	std_logic_vector ( 6 downto 0 ) := ( others = > ' 0 ' )
cs	std_logic_vector ( 303 downto 0 ) := ( others = > ' 0 ' )

Instantiations
i_DaqLSCXG	DaqLSCXG10G <Entity DaqLSCXG10G>
i_DaqLSCXG	DaqLSCXG <Entity DaqLSCXG>
i_check_event	check_event <Entity check_event>
i_SFP_cntr	SFP_cntr <Entity SFP_cntr>
i_cmsCRC	cmsCRC64 <Entity cmsCRC64>

---

Detailed Description

Definition at line 105 of file DAQLSCXG_if.vhd.

---

The documentation for this class was generated from the following files:

• src/CMS_DAQ_if/common/DAQLSCXG_if.vhd