RTL Architecture Reference

List of all members.

Processes
PROCESS_915	( USER_CLK )
PROCESS_916	( USER_CLK )
PROCESS_917	( USER_CLK )
PROCESS_918	( USER_CLK )
PROCESS_919	( USER_CLK )
PROCESS_920	( USER_CLK )

Constants
DLY	time := 10 ps

Signals
next_begin_c	std_logic
next_sh_invalid_c	std_logic
next_sh_valid_c	std_logic
next_slip_c	std_logic
next_sync_done_c	std_logic
next_test_sh_c	std_logic
sh_count_equals_max_i	std_logic
sh_invalid_cnt_equals_max_i	std_logic
sh_invalid_cnt_equals_zero_i	std_logic
slip_done_i	std_logic
slip_pulse_i	std_logic
sync_found_i	std_logic
begin_r	std_logic
blocksync_out_i	std_logic
rxgearboxslip_out_i	std_logic
sh_invalid_r	std_logic
sh_valid_r	std_logic
slip_count_i	std_logic_vector ( 31 downto 0 )
slip_r	std_logic
sync_done_r	std_logic
sync_header_count_i	unsigned ( 9 downto 0 )
sync_header_invalid_count_i	unsigned ( 9 downto 0 )
test_sh_r	std_logic

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Detailed Description

Definition at line 92 of file block_sync_sm.vhd.

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The documentation for this class was generated from the following file:

• src/common_10G/block_sync_sm.vhd