Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 
 
Software Version and Target Device
Product Version: ISE:10.1.03 (Foundation Simulator) Target Family: spartan3adsp
OS Platform: NT Target Device: xc3sd1800a
Project ID (random number) 26951.29052.342 Target Package: fg676
Registration ID 182TANLZJHKZXTUAMZ450J4DT Target Speed: -4
Date Generated Mon Feb 1 13:39:42 2010
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Multiplexers=46
  • 1-bit 16-to-1 multiplexer=3
  • 1-bit 4-to-1 multiplexer=2
  • 1-bit 8-to-1 multiplexer=33
  • 32-bit 4-to-1 multiplexer=2
  • 33-bit 4-to-1 multiplexer=5
  • 36-bit 4-to-1 multiplexer=1
 Registers=5715
  • Flip-Flops=5715
 Accumulators=15
  • 32-bit up accumulator=15
 Comparators=86
  • 10-bit comparator equal=1
  • 12-bit comparator equal=4
  • 12-bit comparator not equal=2
  • 14-bit comparator equal=1
  • 16-bit comparator equal=2
  • 16-bit comparator greater=5
  • 16-bit comparator not equal=2
  • 2-bit comparator equal=6
  • 2-bit comparator not equal=5
  • 24-bit comparator equal=1
  • 3-bit comparator equal=11
  • 3-bit comparator not equal=10
  • 32-bit comparator equal=2
  • 4-bit comparator equal=12
  • 4-bit comparator greater=1
  • 4-bit comparator not equal=11
  • 5-bit comparator equal=1
  • 5-bit comparator not equal=1
  • 6-bit comparator not equal=1
  • 8-bit comparator equal=1
  • 8-bit comparator not equal=1
  • 9-bit comparator not equal=5
 Xors=297
  • 1-bit xor10=3
  • 1-bit xor11=1
  • 1-bit xor13=2
  • 1-bit xor15=1
  • 1-bit xor2=197
  • 1-bit xor3=40
  • 1-bit xor4=20
  • 1-bit xor5=8
  • 1-bit xor6=9
  • 1-bit xor7=3
  • 1-bit xor8=2
  • 25-bit xor2=1
  • 9-bit xor2=10
 Adders/Subtractors=80
  • 10-bit adder=1
  • 10-bit subtractor=1
  • 11-bit adder=1
  • 12-bit subtractor=1
  • 13-bit adder=3
  • 19-bit adder=1
  • 2-bit adder=3
  • 23-bit adder=1
  • 24-bit subtractor=1
  • 3-bit adder=5
  • 3-bit subtractor=1
  • 32-bit adder=7
  • 33-bit adder=1
  • 4-bit adder=17
  • 4-bit subtractor=14
  • 5-bit adder=3
  • 6-bit adder=2
  • 64-bit adder=1
  • 7-bit adder=5
  • 8-bit adder=1
  • 8-bit subtractor=1
  • 9-bit adder=8
  • 9-bit subtractor=1
 Counters=163
  • 10-bit down counter=2
  • 10-bit up counter=11
  • 10-bit updown counter=5
  • 11-bit up counter=3
  • 12-bit up counter=1
  • 13-bit up counter=1
  • 14-bit up counter=1
  • 16-bit up counter=3
  • 16-bit updown counter=5
  • 2-bit up counter=2
  • 20-bit up counter=1
  • 24-bit up counter=1
  • 3-bit down counter=1
  • 3-bit up counter=1
  • 3-bit updown counter=2
  • 32-bit up counter=36
  • 4-bit down counter=1
  • 4-bit up counter=7
  • 4-bit updown counter=21
  • 48-bit up counter=1
  • 5-bit down counter=1
  • 5-bit up counter=10
  • 5-bit updown counter=1
  • 6-bit up counter=3
  • 6-bit updown counter=1
  • 7-bit up counter=9
  • 8-bit up counter=5
  • 8-bit updown counter=3
  • 9-bit up counter=19
  • 9-bit updown counter=5
 		MiscellaneousStatistics
  • AGG_BONDED_IO=349
  • AGG_IO=349
  • AGG_SLICE=8403
  • NUM_4_INPUT_LUT=11697
  • NUM_BONDED_DIFFMI=56
  • NUM_BONDED_DIFFMTB=16
  • NUM_BONDED_DIFFSI=56
  • NUM_BONDED_DIFFSTB=16
  • NUM_BONDED_IBUF=39
  • NUM_BONDED_IOB=166
  • NUM_BUFGMUX=12
  • NUM_CYMUX=3102
  • NUM_DCM=3
  • NUM_DP_RAM=476
  • NUM_IDDR2_C0=100
  • NUM_IDDR2_NONE=16
  • NUM_IOB_FF=135
  • NUM_LUT_RT=2114
  • NUM_ODDR2_C0=10
  • NUM_ODDR2_C1=10
  • NUM_ODDR2_NONE=29
  • NUM_RAM16=16
  • NUM_RAMB16BWER=59
  • NUM_SHIFT=503
  • NUM_SLICEL=7829
  • NUM_SLICEM=574
  • NUM_SLICE_FF=8066
  • NUM_XOR=2850
 		NetStatistics
  • NumNets_Active=16202
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=1111
  • NumNodesOfType_Active_BRAMDUMMY=3140
  • NumNodesOfType_Active_CLKPIN=6881
  • NumNodesOfType_Active_CNTRLPIN=7636
  • NumNodesOfType_Active_DOUBLE=48045
  • NumNodesOfType_Active_DUMMY=32284
  • NumNodesOfType_Active_DUMMYBANK=897
  • NumNodesOfType_Active_DUMMYESC=26
  • NumNodesOfType_Active_GLOBAL=1006
  • NumNodesOfType_Active_HFULLHEX=1137
  • NumNodesOfType_Active_HLONG=329
  • NumNodesOfType_Active_HUNIHEX=6445
  • NumNodesOfType_Active_INPUT=39741
  • NumNodesOfType_Active_IOBOUTPUT=227
  • NumNodesOfType_Active_OMUX=15444
  • NumNodesOfType_Active_OUTPUT=15635
  • NumNodesOfType_Active_PREBXBY=11599
  • NumNodesOfType_Active_VFULLHEX=4068
  • NumNodesOfType_Active_VLONG=1177
  • NumNodesOfType_Active_VUNIHEX=6755
  • NumNodesOfType_Gnd_BRAMADDR=104
  • NumNodesOfType_Gnd_BRAMDUMMY=443
  • NumNodesOfType_Gnd_CLKPIN=2
  • NumNodesOfType_Gnd_CNTRLPIN=291
  • NumNodesOfType_Gnd_DOUBLE=509
  • NumNodesOfType_Gnd_DUMMY=897
  • NumNodesOfType_Gnd_DUMMYBANK=36
  • NumNodesOfType_Gnd_HFULLHEX=2
  • NumNodesOfType_Gnd_HUNIHEX=1
  • NumNodesOfType_Gnd_INPUT=1637
  • NumNodesOfType_Gnd_OMUX=775
  • NumNodesOfType_Gnd_OUTPUT=520
  • NumNodesOfType_Gnd_PREBXBY=257
  • NumNodesOfType_Gnd_VFULLHEX=52
  • NumNodesOfType_Gnd_VUNIHEX=4
  • NumNodesOfType_Vcc_BRAMADDR=1
  • NumNodesOfType_Vcc_BRAMDUMMY=133
  • NumNodesOfType_Vcc_CNTRLPIN=324
  • NumNodesOfType_Vcc_DUMMY=449
  • NumNodesOfType_Vcc_INPUT=732
  • NumNodesOfType_Vcc_PREBXBY=136
  • NumNodesOfType_Vcc_VCCOUT=547
 		SiteSummary
  • BUFGMUX=12
  • BUFGMUX_GCLKMUX=12
  • BUFGMUX_GCLK_BUFFER=12
  • DCM=3
  • DCM_DCM=3
  • DIFFMI=56
  • DIFFMI_DELAY_ADJ_BBOX=56
  • DIFFMI_IFF1=50
  • DIFFMI_IFF2=50
  • DIFFMI_INBUF=56
  • DIFFMI_PAD=56
  • DIFFMTB=16
  • DIFFMTB_OFF1=16
  • DIFFMTB_OFF2=16
  • DIFFMTB_OFFDDRBLACKBOX=16
  • DIFFMTB_OUTBUF=16
  • DIFFMTB_PAD=16
  • DIFFSI=56
  • DIFFSI_IFF1=50
  • DIFFSI_PAD=56
  • DIFFSI_PADOUT_USED=56
  • DIFFSTB=16
  • DIFFSTB_DIFFO_IN_USED=16
  • DIFFSTB_OFF1=5
  • DIFFSTB_OFF2=5
  • DIFFSTB_OUTBUF=16
  • DIFFSTB_PAD=16
  • IBUF=39
  • IBUF_DELAY_ADJ_BBOX=39
  • IBUF_IFF1=10
  • IBUF_INBUF=39
  • IBUF_PAD=39
  • IOB=166
  • IOB_DELAY_ADJ_BBOX=27
  • IOB_IFF1=25
  • IOB_IFF2=17
  • IOB_INBUF=27
  • IOB_OFF1=139
  • IOB_OFF2=23
  • IOB_OFFDDRBLACKBOX=23
  • IOB_OUTBUF=166
  • IOB_PAD=166
  • IOB_TFF1=18
  • RAMB16BWER=59
  • RAMB16BWER_RAMB16BWER=59
  • SLICEL=7829
  • SLICEL_C1VDD=232
  • SLICEL_C2VDD=136
  • SLICEL_CYMUXF=1603
  • SLICEL_CYMUXG=1491
  • SLICEL_F=4916
  • SLICEL_F5MUX=651
  • SLICEL_F6MUX=4
  • SLICEL_FFX=2733
  • SLICEL_FFY=4819
  • SLICEL_G=5745
  • SLICEL_GNDF=1126
  • SLICEL_GNDG=1125
  • SLICEL_XORF=1458
  • SLICEL_XORG=1383
  • SLICEM=574
  • SLICEM_C1VDD=1
  • SLICEM_CYMUXF=4
  • SLICEM_CYMUXG=4
  • SLICEM_F=462
  • SLICEM_F5MUX=2
  • SLICEM_F6MUX=2
  • SLICEM_FFX=209
  • SLICEM_FFY=305
  • SLICEM_G=574
  • SLICEM_GMC15_BLACKBOX=16
  • SLICEM_GNDF=3
  • SLICEM_GNDG=4
  • SLICEM_WSGEN=568
  • SLICEM_XORF=5
  • SLICEM_XORG=4
 
Configuration Data
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:12]
 DCM_DCM
  • CLKDV_DIVIDE=[2:3]
  • CLKOUT_PHASE_SHIFT=[NONE:2] [VARIABLE:1]
  • CLK_FEEDBACK=[1X:3]
  • DESKEW_ADJUST=[0:3]
  • DFS_FREQUENCY_MODE=[LOW:3]
  • DLL_FREQUENCY_MODE=[LOW:3]
  • DUTY_CYCLE_CORRECTION=[TRUE:3]
  • FACTORY_JF1=[0XC0:3]
  • FACTORY_JF2=[0X80:3]
 DIFFMI_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:56]
  • IBUF_DELAY_VALUE=[DLY0:56]
  • IFD_DELAY_VALUE=[DLY0:11] [DLY1:27] [DLY2:18]
 DIFFMI_IFF1
  • IFF1_INIT_ATTR=[INIT0:50]
  • IFF1_SR_ATTR=[SRLOW:50]
  • IFFATTRBOX=[SYNC:50]
  • LATCH_OR_FF=[FF:50]
 DIFFMI_IFF2
  • IFF2_INIT_ATTR=[INIT0:50]
  • IFF2_SR_ATTR=[SRLOW:50]
  • IFFATTRBOX=[SYNC:50]
  • LATCH_OR_FF=[FF:50]
 DIFFMI_PAD
  • DIFF_TERM=[TRUE:56]
  • IOATTRBOX=[LVDS_33:56]
 DIFFMTB_OFF1
  • LATCH_OR_FF=[FF:16]
  • OFF1_INIT_ATTR=[INIT0:16]
  • OFF1_SR_ATTR=[SRLOW:16]
  • OFFATTRBOX=[SYNC:16]
 DIFFMTB_OFF2
  • LATCH_OR_FF=[FF:16]
  • OFF2_INIT_ATTR=[INIT0:16]
  • OFF2_SR_ATTR=[SRLOW:16]
  • OFFATTRBOX=[SYNC:16]
 DIFFMTB_OUTBUF
  • SUSPEND=[3STATE:16]
 DIFFMTB_PAD
  • IOATTRBOX=[LVDS_25:6] [LVDS_33:10]
 DIFFSI_IFF1
  • IFF1_INIT_ATTR=[INIT0:50]
  • IFF1_SR_ATTR=[SRLOW:50]
  • IFFATTRBOX=[SYNC:50]
  • LATCH_OR_FF=[FF:50]
 DIFFSI_PAD
  • DIFF_TERM=[TRUE:56]
  • IOATTRBOX=[LVDS_33:56]
 DIFFSTB_OFF1
  • LATCH_OR_FF=[FF:5]
  • OFF1_INIT_ATTR=[INIT0:5]
  • OFF1_SR_ATTR=[SRLOW:5]
  • OFFATTRBOX=[SYNC:5]
 DIFFSTB_OFF2
  • LATCH_OR_FF=[FF:5]
  • OFF2_INIT_ATTR=[INIT0:5]
  • OFF2_SR_ATTR=[SRLOW:5]
  • OFFATTRBOX=[SYNC:5]
 DIFFSTB_OUTBUF
  • SUSPEND=[3STATE:16]
 DIFFSTB_PAD
  • IOATTRBOX=[LVDS_25:6] [LVDS_33:10]
 IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:39]
  • IBUF_DELAY_VALUE=[DLY0:39]
  • IFD_DELAY_VALUE=[DLY0:29] [DLY6:10]
 IBUF_IFF1
  • IFF1_INIT_ATTR=[INIT0:10]
  • LATCH_OR_FF=[FF:10]
 IBUF_PAD
  • IOATTRBOX=[LVTTL:39]
  • PULL=[PULLDOWN:10]
 IOB_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:27]
  • IBUF_DELAY_VALUE=[DLY0:27]
  • IFD_DELAY_VALUE=[DLY0:18] [DLY6:9]
 IOB_IFF1
  • IFF1_INIT_ATTR=[INIT0:25]
  • IFF1_SR_ATTR=[SRLOW:16]
  • IFFATTRBOX=[SYNC:16]
  • LATCH_OR_FF=[FF:25]
 IOB_IFF2
  • IFF2_INIT_ATTR=[INIT0:17]
  • IFF2_SR_ATTR=[SRLOW:16]
  • IFFATTRBOX=[SYNC:16]
  • LATCH_OR_FF=[FF:17]
 IOB_OFF1
  • LATCH_OR_FF=[FF:139]
  • OFF1_INIT_ATTR=[INIT0:138] [INIT1:1]
  • OFF1_SR_ATTR=[SRLOW:28] [SRHIGH:2]
  • OFFATTRBOX=[ASYNC:1] [SYNC:29]
 IOB_OFF2
  • LATCH_OR_FF=[FF:23]
  • OFF2_INIT_ATTR=[INIT0:23]
  • OFF2_SR_ATTR=[SRLOW:23]
  • OFFATTRBOX=[SYNC:23]
 IOB_OUTBUF
  • SUSPEND=[3STATE:166]
 IOB_PAD
  • DRIVEATTRBOX=[2:29] [8:92] [12:1] [24:1]
  • IOATTRBOX=[SSTL2_I:43] [LVTTL:111] [LVCMOS25:12]
  • SLEW=[SLOW:122] [FAST:1]
 IOB_TFF1
  • LATCH_OR_FF=[FF:18]
  • TFF1_INIT_ATTR=[INIT0:18]
 RAMB16BWER_RAMB16BWER
  • DATA_WIDTH_A=[2:1] [4:21] [9:1] [18:16] [36:20]
  • DATA_WIDTH_B=[0:1] [2:1] [4:18] [9:2] [18:16] [36:21]
  • DOA_REG=[0:59]
  • DOB_REG=[0:59]
  • RSTTYPE=[SYNC:59]
  • WRITE_MODE_A=[WRITE_FIRST:59]
  • WRITE_MODE_B=[WRITE_FIRST:59]
 SLICEL_FFX
  • FFX_INIT_ATTR=[INIT0:2661] [INIT1:72]
  • FFX_SR_ATTR=[SRLOW:2653] [SRHIGH:80]
  • LATCH_OR_FF=[FF:2733]
  • SYNC_ATTR=[ASYNC:1468] [SYNC:1265]
 SLICEL_FFY
  • FFY_INIT_ATTR=[INIT0:4760] [INIT1:59]
  • FFY_SR_ATTR=[SRLOW:4713] [SRHIGH:106]
  • LATCH_OR_FF=[FF:4819]
  • SYNC_ATTR=[ASYNC:3211] [SYNC:1608]
 SLICEM_F
  • F_ATTR=[DUAL_PORT:238] [SHIFT_REG:182]
  • LUT_OR_MEM=[LUT:35] [RAM:427]
 SLICEM_FFX
  • FFX_INIT_ATTR=[INIT0:209]
  • FFX_SR_ATTR=[SRLOW:209]
  • LATCH_OR_FF=[FF:209]
  • SYNC_ATTR=[ASYNC:205] [SYNC:4]
 SLICEM_FFY
  • FFY_INIT_ATTR=[INIT0:305]
  • FFY_SR_ATTR=[SRLOW:305]
  • LATCH_OR_FF=[FF:305]
  • SYNC_ATTR=[ASYNC:301] [SYNC:4]
 SLICEM_G
  • G_ATTR=[DUAL_PORT:238] [SHIFT_REG:321]
  • LUT_OR_MEM=[LUT:6] [RAM:568]
 SLICEM_WSGEN
  • SYNC_ATTR=[ASYNC:325]
 
Pin Data
BUFGMUX
  • I0=12
  • I1=2
  • O=12
  • S=12
 BUFGMUX_GCLKMUX
  • I0=12
  • I1=2
  • OUT=12
  • S=12
 BUFGMUX_GCLK_BUFFER
  • IN=12
  • OUT=12
 DCM
  • CLK0=3
  • CLK90=2
  • CLKFB=3
  • CLKFX=1
  • CLKIN=3
  • LOCKED=3
  • PSCLK=3
  • PSEN=3
  • PSINCDEC=3
  • RST=3
  • STATUS0=1
  • STATUS1=1
  • STATUS2=2
 DCM_DCM
  • CLK0=3
  • CLK90=2
  • CLKFB=3
  • CLKFX=1
  • CLKIN=3
  • LOCKED=3
  • PSCLK=3
  • PSEN=3
  • PSINCDEC=3
  • RST=3
  • STATUS0=1
  • STATUS1=1
  • STATUS2=2
 DIFFMI
  • DIFFI_IN=56
  • I=6
  • ICE=50
  • ICLK1=50
  • ICLK2=50
  • IQ1=50
  • IQ2=50
  • PAD=56
  • REV=50
  • SR=50
 DIFFMI_DELAY_ADJ_BBOX
  • IBUF_OUT=6
  • IFD_OUT=50
  • SEL_IN=56
 DIFFMI_IFF1
  • CE=50
  • CK=50
  • D=50
  • Q=50
  • REV=50
  • SR=50
 DIFFMI_IFF2
  • CE=50
  • CK=50
  • D=50
  • Q=50
  • REV=50
  • SR=50
 DIFFMI_INBUF
  • DIFFI_IN=56
  • OUT=56
  • PAD=56
 DIFFMI_PAD
  • PAD=56
 DIFFMTB
  • DIFFO_OUT=16
  • O1=11
  • O2=11
  • OCE=16
  • ODDRIN1=5
  • ODDRIN2=5
  • OTCLK1=16
  • OTCLK2=16
  • PAD=16
  • REV=16
  • SR=16
 DIFFMTB_OFF1
  • CE=16
  • CK=16
  • D=16
  • Q=16
  • REV=16
  • SR=16
 DIFFMTB_OFF2
  • CE=16
  • CK=16
  • D=16
  • Q=16
  • REV=16
  • SR=16
 DIFFMTB_OFFDDRBLACKBOX
  • OFF1=16
  • OFF2=16
  • OFFDDR=16
 DIFFMTB_OUTBUF
  • IN=16
  • OUTN=16
  • OUTP=16
 DIFFMTB_PAD
  • PAD=16
 DIFFSI
  • ICE=50
  • ICLK1=50
  • IDDRIN2=50
  • IQ1=50
  • PAD=56
  • PADOUT=56
  • REV=50
  • SR=50
 DIFFSI_IFF1
  • CE=50
  • CK=50
  • D=50
  • Q=50
  • REV=50
  • SR=50
 DIFFSI_PAD
  • PAD=56
 DIFFSI_PADOUT_USED
  • 0=56
  • OUT=56
 DIFFSTB
  • DIFFO_IN=16
  • O1=5
  • O2=5
  • OCE=10
  • ODDROUT1=5
  • ODDROUT2=5
  • OTCLK1=5
  • OTCLK2=5
  • PAD=16
  • REV=10
  • SR=10
 DIFFSTB_DIFFO_IN_USED
  • 0=16
  • OUT=16
 DIFFSTB_OFF1
  • CE=5
  • CK=5
  • D=5
  • Q=5
  • REV=5
  • SR=5
 DIFFSTB_OFF2
  • CE=5
  • CK=5
  • D=5
  • Q=5
  • REV=5
  • SR=5
 DIFFSTB_OUTBUF
  • DIFFO_IN=16
  • OUTP=16
 DIFFSTB_PAD
  • PAD=16
 IBUF
  • I=29
  • ICLK1=10
  • IQ1=10
  • PAD=39
 IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=29
  • IFD_OUT=10
  • SEL_IN=39
 IBUF_IFF1
  • CK=10
  • D=10
  • Q=10
 IBUF_INBUF
  • IN=39
  • OUT=39
 IBUF_PAD
  • PAD=39
 IOB
  • I=2
  • ICE=25
  • ICLK1=25
  • ICLK2=17
  • IQ1=25
  • IQ2=17
  • O1=166
  • O2=23
  • OCE=119
  • OTCLK1=139
  • OTCLK2=23
  • PAD=166
  • REV=23
  • SR=30
  • T1=29
 IOB_DELAY_ADJ_BBOX
  • IBUF_OUT=2
  • IFD_OUT=26
  • SEL_IN=27
 IOB_IFF1
  • CE=24
  • CK=25
  • D=25
  • Q=25
  • REV=16
  • SR=16
 IOB_IFF2
  • CE=17
  • CK=17
  • D=17
  • Q=17
  • REV=16
  • SR=16
 IOB_INBUF
  • IN=27
  • OUT=27
 IOB_OFF1
  • CE=119
  • CK=139
  • D=139
  • Q=139
  • REV=23
  • SR=30
 IOB_OFF2
  • CE=23
  • CK=23
  • D=23
  • Q=23
  • REV=23
  • SR=23
 IOB_OFFDDRBLACKBOX
  • OFF1=23
  • OFF2=23
  • OFFDDR=23
 IOB_OUTBUF
  • IN=166
  • OUT=166
  • TRI=29
 IOB_PAD
  • PAD=166
 IOB_TFF1
  • CK=18
  • D=18
  • Q=18
 RAMB16BWER
  • ADDRA1=1
  • ADDRA10=59
  • ADDRA11=59
  • ADDRA12=59
  • ADDRA13=59
  • ADDRA2=22
  • ADDRA3=23
  • ADDRA4=39
  • ADDRA5=59
  • ADDRA6=59
  • ADDRA7=59
  • ADDRA8=59
  • ADDRA9=59
  • ADDRB1=1
  • ADDRB10=58
  • ADDRB11=58
  • ADDRB12=58
  • ADDRB13=58
  • ADDRB2=19
  • ADDRB3=21
  • ADDRB4=37
  • ADDRB5=58
  • ADDRB6=58
  • ADDRB7=58
  • ADDRB8=58
  • ADDRB9=58
  • CLKA=59
  • CLKB=58
  • DIA0=51
  • DIA1=51
  • DIA10=30
  • DIA11=30
  • DIA12=30
  • DIA13=30
  • DIA14=30
  • DIA15=30
  • DIA16=14
  • DIA17=14
  • DIA18=14
  • DIA19=14
  • DIA2=51
  • DIA20=14
  • DIA21=14
  • DIA22=14
  • DIA23=14
  • DIA24=14
  • DIA25=14
  • DIA26=14
  • DIA27=14
  • DIA28=14
  • DIA29=14
  • DIA3=51
  • DIA30=14
  • DIA31=14
  • DIA4=31
  • DIA5=31
  • DIA6=31
  • DIA7=31
  • DIA8=30
  • DIA9=30
  • DIB0=5
  • DIB1=5
  • DIB10=4
  • DIB11=4
  • DIB12=4
  • DIB13=4
  • DIB14=4
  • DIB15=4
  • DIB16=4
  • DIB17=4
  • DIB18=4
  • DIB19=4
  • DIB2=5
  • DIB20=4
  • DIB21=4
  • DIB22=4
  • DIB23=4
  • DIB24=4
  • DIB25=4
  • DIB26=4
  • DIB27=4
  • DIB28=4
  • DIB29=4
  • DIB3=5
  • DIB30=4
  • DIB31=4
  • DIB4=5
  • DIB5=5
  • DIB6=5
  • DIB7=5
  • DIB8=4
  • DIB9=4
  • DIPA0=31
  • DIPA1=30
  • DIPA2=14
  • DIPA3=14
  • DIPB0=5
  • DIPB1=4
  • DIPB2=4
  • DIPB3=4
  • DOA0=12
  • DOA1=12
  • DOA10=9
  • DOA11=9
  • DOA12=9
  • DOA13=9
  • DOA14=9
  • DOA15=9
  • DOA16=9
  • DOA17=9
  • DOA18=9
  • DOA19=9
  • DOA2=11
  • DOA20=9
  • DOA21=9
  • DOA22=9
  • DOA23=9
  • DOA24=9
  • DOA25=9
  • DOA26=9
  • DOA27=8
  • DOA28=9
  • DOA29=8
  • DOA3=11
  • DOA30=7
  • DOA31=7
  • DOA4=9
  • DOA5=9
  • DOA6=9
  • DOA7=9
  • DOA8=9
  • DOA9=9
  • DOB0=52
  • DOB1=52
  • DOB10=32
  • DOB11=32
  • DOB12=31
  • DOB13=32
  • DOB14=32
  • DOB15=27
  • DOB16=17
  • DOB17=17
  • DOB18=17
  • DOB19=17
  • DOB2=51
  • DOB20=16
  • DOB21=16
  • DOB22=16
  • DOB23=16
  • DOB24=16
  • DOB25=16
  • DOB26=16
  • DOB27=17
  • DOB28=16
  • DOB29=16
  • DOB3=51
  • DOB30=16
  • DOB31=16
  • DOB4=33
  • DOB5=33
  • DOB6=33
  • DOB7=33
  • DOB8=32
  • DOB9=32
  • DOPA0=2
  • DOPA1=1
  • DOPA2=1
  • DOPA3=1
  • DOPB0=17
  • DOPB1=13
  • DOPB2=2
  • DOPB3=2
  • ENA=59
  • ENB=58
  • REGCEA=1
  • REGCEB=1
  • RSTA=59
  • RSTB=58
  • WEA0=59
  • WEA1=59
  • WEA2=59
  • WEA3=59
  • WEB0=59
  • WEB1=59
  • WEB2=59
  • WEB3=59
 RAMB16BWER_RAMB16BWER
  • ADDRA1=1
  • ADDRA10=59
  • ADDRA11=59
  • ADDRA12=59
  • ADDRA13=59
  • ADDRA2=22
  • ADDRA3=23
  • ADDRA4=39
  • ADDRA5=59
  • ADDRA6=59
  • ADDRA7=59
  • ADDRA8=59
  • ADDRA9=59
  • ADDRB1=1
  • ADDRB10=58
  • ADDRB11=58
  • ADDRB12=58
  • ADDRB13=58
  • ADDRB2=19
  • ADDRB3=21
  • ADDRB4=37
  • ADDRB5=58
  • ADDRB6=58
  • ADDRB7=58
  • ADDRB8=58
  • ADDRB9=58
  • CLKA=59
  • CLKB=58
  • DIA0=51
  • DIA1=51
  • DIA10=30
  • DIA11=30
  • DIA12=30
  • DIA13=30
  • DIA14=30
  • DIA15=30
  • DIA16=14
  • DIA17=14
  • DIA18=14
  • DIA19=14
  • DIA2=51
  • DIA20=14
  • DIA21=14
  • DIA22=14
  • DIA23=14
  • DIA24=14
  • DIA25=14
  • DIA26=14
  • DIA27=14
  • DIA28=14
  • DIA29=14
  • DIA3=51
  • DIA30=14
  • DIA31=14
  • DIA4=31
  • DIA5=31
  • DIA6=31
  • DIA7=31
  • DIA8=30
  • DIA9=30
  • DIB0=5
  • DIB1=5
  • DIB10=4
  • DIB11=4
  • DIB12=4
  • DIB13=4
  • DIB14=4
  • DIB15=4
  • DIB16=4
  • DIB17=4
  • DIB18=4
  • DIB19=4
  • DIB2=5
  • DIB20=4
  • DIB21=4
  • DIB22=4
  • DIB23=4
  • DIB24=4
  • DIB25=4
  • DIB26=4
  • DIB27=4
  • DIB28=4
  • DIB29=4
  • DIB3=5
  • DIB30=4
  • DIB31=4
  • DIB4=5
  • DIB5=5
  • DIB6=5
  • DIB7=5
  • DIB8=4
  • DIB9=4
  • DIPA0=31
  • DIPA1=30
  • DIPA2=14
  • DIPA3=14
  • DIPB0=5
  • DIPB1=4
  • DIPB2=4
  • DIPB3=4
  • DOA0=12
  • DOA1=12
  • DOA10=9
  • DOA11=9
  • DOA12=9
  • DOA13=9
  • DOA14=9
  • DOA15=9
  • DOA16=9
  • DOA17=9
  • DOA18=9
  • DOA19=9
  • DOA2=11
  • DOA20=9
  • DOA21=9
  • DOA22=9
  • DOA23=9
  • DOA24=9
  • DOA25=9
  • DOA26=9
  • DOA27=8
  • DOA28=9
  • DOA29=8
  • DOA3=11
  • DOA30=7
  • DOA31=7
  • DOA4=9
  • DOA5=9
  • DOA6=9
  • DOA7=9
  • DOA8=9
  • DOA9=9
  • DOB0=52
  • DOB1=52
  • DOB10=32
  • DOB11=32
  • DOB12=31
  • DOB13=32
  • DOB14=32
  • DOB15=27
  • DOB16=17
  • DOB17=17
  • DOB18=17
  • DOB19=17
  • DOB2=51
  • DOB20=16
  • DOB21=16
  • DOB22=16
  • DOB23=16
  • DOB24=16
  • DOB25=16
  • DOB26=16
  • DOB27=17
  • DOB28=16
  • DOB29=16
  • DOB3=51
  • DOB30=16
  • DOB31=16
  • DOB4=33
  • DOB5=33
  • DOB6=33
  • DOB7=33
  • DOB8=32
  • DOB9=32
  • DOPA0=2
  • DOPA1=1
  • DOPA2=1
  • DOPA3=1
  • DOPB0=17
  • DOPB1=13
  • DOPB2=2
  • DOPB3=2
  • ENA=59
  • ENB=58
  • REGCEA=1
  • REGCEB=1
  • RSTA=59
  • RSTB=58
  • WEA0=59
  • WEA1=59
  • WEA2=59
  • WEA3=59
  • WEB0=59
  • WEB1=59
  • WEB2=59
  • WEB3=59
 SLICEL
  • BX=1172
  • BY=2024
  • CE=4598
  • CIN=1470
  • CLK=5779
  • COUT=1491
  • F1=4887
  • F2=3737
  • F3=3093
  • F4=1875
  • F5=8
  • FX=1
  • FXINA=4
  • FXINB=4
  • G1=5727
  • G2=4582
  • G3=3415
  • G4=1938
  • SR=2293
  • X=2308
  • XB=14
  • XQ=2733
  • Y=2085
  • YQ=4819
 SLICEL_C1VDD
  • 1=232
 SLICEL_C2VDD
  • 1=136
 SLICEL_CYMUXF
  • 0=1603
  • 1=1603
  • OUT=1603
  • S0=1603
 SLICEL_CYMUXG
  • 0=1491
  • 1=1491
  • OUT=1491
  • S0=1491
 SLICEL_F
  • A1=4887
  • A2=3737
  • A3=3093
  • A4=1875
  • D=4916
 SLICEL_F5MUX
  • F=651
  • G=651
  • OUT=651
  • S0=651
 SLICEL_F6MUX
  • 0=4
  • 1=4
  • OUT=4
  • S0=4
 SLICEL_FFX
  • CE=2323
  • CK=2733
  • D=2733
  • Q=2733
  • REV=32
  • SR=1598
 SLICEL_FFY
  • CE=3877
  • CK=4819
  • D=4819
  • Q=4819
  • REV=4
  • SR=1991
 SLICEL_G
  • A1=5727
  • A2=4582
  • A3=3415
  • A4=1938
  • D=5745
 SLICEL_GNDF
  • 0=1126
 SLICEL_GNDG
  • 0=1125
 SLICEL_XORF
  • 0=1458
  • 1=1458
  • O=1458
 SLICEL_XORG
  • 0=1383
  • 1=1383
  • O=1383
 SLICEM
  • BX=184
  • BY=570
  • CE=163
  • CIN=4
  • CLK=572
  • COUT=4
  • F1=462
  • F2=458
  • F3=454
  • F4=439
  • F5=2
  • FX=1
  • FXINA=2
  • FXINB=2
  • G1=574
  • G2=570
  • G3=570
  • G4=568
  • SR=572
  • X=259
  • XQ=209
  • Y=88
  • YQ=305
 SLICEM_C1VDD
  • 1=1
 SLICEM_CYMUXF
  • 0=4
  • 1=4
  • OUT=4
  • S0=4
 SLICEM_CYMUXG
  • 0=4
  • 1=4
  • OUT=4
  • S0=4
 SLICEM_F
  • A1=462
  • A2=458
  • A3=454
  • A4=439
  • D=462
  • DI=427
  • WF1=245
  • WF2=245
  • WF3=245
  • WF4=245
  • WS=427
 SLICEM_F5MUX
  • F=2
  • G=2
  • OUT=2
  • S0=2
 SLICEM_F6MUX
  • 0=2
  • 1=2
  • OUT=2
  • S0=2
 SLICEM_FFX
  • CE=136
  • CK=209
  • D=209
  • Q=209
  • SR=4
 SLICEM_FFY
  • CE=153
  • CK=305
  • D=305
  • Q=305
  • SR=4
 SLICEM_G
  • A1=574
  • A2=570
  • A3=570
  • A4=568
  • D=394
  • DI=568
  • WG1=247
  • WG2=247
  • WG3=247
  • WG4=247
  • WS=568
 SLICEM_GMC15_BLACKBOX
  • MC15=16
  • WS2=16
 SLICEM_GNDF
  • 0=3
 SLICEM_GNDG
  • 0=4
 SLICEM_WSGEN
  • CK=568
  • WE=568
  • WSF=427
  • WSG=568
 SLICEM_XORF
  • 0=5
  • 1=5
  • O=5
 SLICEM_XORG
  • 0=4
  • 1=4
  • O=4
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3sd1800a-fg676-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail -ignore_keep_hierarchy -pr b -k 4 -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe n -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
>
Software Quality
Run Statistics
ProgramRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
XSLTProcess 96 96 0 0 0 0 0
_impact 10 9 0 0 0 0 0
arwz 5 5 0 0 0 0 0
bitgen 890 890 0 0 0 0 0
cpldfit 96 96 0 0 0 0 0
edif2ngd 12 12 0 0 0 0 0
hprep6 96 96 0 0 0 0 0
map 1776 1486 0 0 0 0 0
netgen 100 99 0 0 0 0 0
ngdbuild 1933 1922 0 0 0 0 0
par 1410 1381 14 0 0 0 0
reportgen 1473 1473 0 0 0 0 0
taengine 96 96 0 0 0 0 0
trce 1382 1382 0 0 0 0 0
tsim 96 96 0 0 0 0 0
xst 2714 2687 0 0 0 0 0
 
Help Statistics
Unsuccessful Search words
dcm clock wizard ( 1 )
Help files
/doc/usenglish/books/docs/dev/dev.pdf ( 2 ) /doc/usenglish/isehelp/ite_c_overview.htm ( 1 )
/doc/usenglish/isehelp/pim_db_usbsetupdlg.htm ( 1 ) /doc/usenglish/isehelp/pim_p_connectingtocables.htm ( 1 )
/doc/usenglish/isehelp/pp_db_map_properties.htm ( 1 ) /doc/usenglish/isehelp/pp_db_place_and_route_properties.htm ( 1 )
/doc/usenglish/isehelp/pp_n_process_check_syntax.htm ( 1 ) /doc/usenglish/isehelp/pta_c_ttc-path-end-points-tab.htm ( 1 )
/doc/usenglish/isehelp/pta_db_analyze_against_user_specified_paths_button.htm ( 1 ) /doc/usenglish/isehelp/pta_p_using_path_tracing.htm ( 1 )
/doc/usenglish/wizards/arwz/awz_db_dcmgen.htm ( 1 )
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=ISE Simulator (VHDL/Verilog)
PROP_Top_Level_Module_Type=HDL PROP_PreferredLanguage=VHDL
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_UCF=1 FILE_VERILOG=4
FILE_VHDL=41 PROP_xilxMapTimingDrivenPacking=true
PROP_DevFamily=Spartan-3A DSP PROP_DevPackage=fg676
PROP_DevSpeed=-4 PROP_FitterReportFormat=HTML
PROP_ImpactProjectFile=changed PROP_MapEffortLevel=High
PROP_MapExtraEffort=Normal PROP_MapLogicOptimization=true
PROP_MapRegDuplication=true PROP_PreferredLanguage=VHDL
PROP_SynthOptEffort=High PROP_UserConstraintEditorPreference=Constraints Editor
PROP_parGenAsyDlyRpt=true PROP_xilxBitgStart_Clk_DriveDone=true
PROP_xilxMapAllowLogicOpt=true PROP_xilxMapCoverMode=Speed
PROP_xilxMapPackRegInto=For Inputs and Outputs PROP_xilxMapReportDetail=true
PROP_xilxNgdbldIOPads=true PROP_xilxPAReffortLevel=High
PROP_xilxPARextraEffortLevel=Normal PROP_xilxPostTrceRpt=Error Report
PROP_xilxPreTrceRpt=Error Report PROP_xilxSynthKeepHierarchy=Yes
PROP_xstEquivRegRemoval=false PROP_xstGenerateRTLNetlist=No
PROP_xstPackIORegister=Yes Project duration(days)=