Summary

 Design Name  oslb_cpld
 Fitting Status  Successful
 Software Version  J.40
 Device Used  XC95144XL-10-TQ100
 Date   1-30-2008, 4:41PM

RESOURCES SUMMARY
Macrocells Used Pterms Used Registers Used Pins Used Function Block Inputs Used
106/144  (74%) 494/720  (69%) 72/144  (50%) 68/81  (84%) 303/432  (71%)

PIN RESOURCES
Signal Type Required Mapped
 Input  14  14
 Output  36  36
 Bidirectional  16  16
 GCK  2  2
 GTS  0  0
 GSR  0  0
 DGE  0  0
Pin Type Used Total
 I/O   60  74
 GCK/IO  3  3
 GTS/IO  4  4
 GSR/IO  1  1

GLOBAL RESOURCES
 Signal mapped onto global clock net (GCK1)  cclk
 Signal mapped onto global clock net (GCK3)  loc_cs

POWER DATA
 Macrocells in high performance mode (MCHP)  0
 Macrocells in low power mode (MCLP)  106
 Total macrocells used (MC)  106