example: two MPAlight chips on the test board 1) power up MPAlight 2) when machine clock is stable, write 2 to reg 0x2 (set to test beam mode) 3) write 3 to reg 0x2 (send 6x26.5MHz clockto MPAlight) 4) write 1 to reg 0x0 to reset the control logic 5) write 2(nMPA) to reg 0x6001 6) conigure MPAlight 7) write shutter length to reg 0x205 8) read reg 0x80, if bits 7-5 less than 4, go to step 9. 9) read MPA1 memory data from reg 0x8000-0x80d7 read MPA2 memory data from reg 0x8400-0x84d7 read MPA1 counter data from reg 0x9800-0x9818 read MPA2 counter data from reg 0x9820-0x9838 read number of trigger during shutter open from reg 0x8 read trigger arrival times starting from reg 0xa000(beam clock) read trigger arrival times starting from reg 0xc000(160MHz clock) 10) read reg 0x80, if bits 7-5 less than 3, go to step 11, else if bit 8 is 0 go to step 17 11) read MPA1 memory data from reg 0x8100-0x81d7 read MPA2 memory data from reg 0x8500-0x85d7 read MPA1 counter data from reg 0x9900-0x9918 read MPA2 counter data from reg 0x9920-0x9938 read number of trigger during shutter open from reg 0x9 read trigger arrival times starting from reg 0xa800(beam clock) read trigger arrival times starting from reg 0xc800(160MHz clock) 12) read reg 0x80, if bits 7-5 less than 3, go to step 13, else if bit 8 is 0 go to step 17 13) read MPA1 memory data from reg 0x8200-0x82d7 read MPA2 memory data from reg 0x8600-0x86d7 read MPA1 counter data from reg 0x9a00-0x9a18 read MPA2 counter data from reg 0x9a20-0x9a38 read number of trigger during shutter open from reg 0xa read trigger arrival times starting from reg 0xb000(beam clock) read trigger arrival times starting from reg 0xd000(160MHz clock) 14) read reg 0x80, if bits 7-5 less than 3, go to step 15, else if bit 8 is 0 go to step 17 15) read MPA1 memory data from reg 0x8300-0x83d7 read MPA2 memory data from reg 0x8700-0x87d7 read MPA1 counter data from reg 0x9b00-0x9b18 read MPA2 counter data from reg 0x9b20-0x9b38 read number of trigger during shutter open from reg 0xb read trigger arrival times starting from reg 0xb800(beam clock) read trigger arrival times starting from reg 0xd800(160MHz clock) 16) read reg 0x80, if bits 7-5 less than 3, go to step 9, else if bit 8 is 0 go to step 17 17) read halt time from reg 0x5(beam clock) read total accepted trigger count from reg 0x3 go to step 8