Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Power Mode Slew Rate Pin Number Pin Type Pin Use Reg Init State
ma<0> 4 8 FB2 MC10 LOW SLOW 1 I/O O RESET
ma<1> 4 8 FB2 MC7 LOW SLOW 3 I/O/GTS1 O RESET
mcen 0 0 FB2 MC11 LOW SLOW 4 I/O/GTS2 O  
moen 1 3 FB2 MC12 LOW SLOW 6 I/O O  
mdq<0> 7 11 FB2 MC13 LOW SLOW 8 I/O I/O RESET
mdq<1> 7 11 FB2 MC14 LOW SLOW 9 I/O I/O RESET
mdq<2> 8 12 FB2 MC16 LOW SLOW 10 I/O I/O RESET
mdq<3> 2 2 FB2 MC15 LOW SLOW 11 I/O I/O  
mdq<4> 2 2 FB2 MC17 LOW SLOW 12 I/O I/O  
mdq<5> 8 12 FB1 MC2 LOW SLOW 13 I/O I/O RESET
mdq<6> 8 12 FB1 MC5 LOW SLOW 14 I/O I/O RESET
mdq<7> 6 10 FB1 MC6 LOW SLOW 15 I/O I/O RESET
ma<10> 4 17 FB1 MC1 LOW SLOW 16 I/O O RESET
ma<20> 4 28 FB1 MC8 LOW SLOW 17 I/O O RESET
ma<17> 4 24 FB1 MC3 LOW SLOW 18 I/O O RESET
flash_we_q 2 5 FB1 MC9 LOW   22 I/O/GCK1 GCK/I RESET
ma<19> 4 26 FB1 MC11 LOW SLOW 23 I/O/GCK2 O SET
powerondelay 2 15 FB1 MC7 LOW   25 I/O (b) SET
div8<2> 4 6 FB1 MC14 LOW   27 I/O/GCK3 I RESET
pci2_confn 2 16 FB1 MC10 LOW SLOW 28 I/O O SET
pci2_data 2 8 FB1 MC15 LOW SLOW 29 I/O O RESET
pci2_dclk 2 8 FB1 MC17 LOW SLOW 30 I/O O RESET
vtx_confn 4 18 FB3 MC2 LOW SLOW 32 I/O O SET
div8<0> 3 4 FB1 MC12 LOW   33 I/O I RESET
vtx_clk 2 4 FB3 MC5 LOW SLOW 35 I/O O SET
mdq2data 4 9 FB1 MC13 LOW   36 I/O (b) RESET
vtx_data 2 4 FB3 MC8 LOW SLOW 37 I/O O RESET
div8<1> 4 5 FB1 MC16 LOW   39 I/O (b) RESET
en_dclk 5 28 FB1 MC18 LOW   40 I/O (b) RESET
shift_addr 2 5 FB3 MC1 LOW   41 I/O (b) RESET
shift_data 3 3 FB3 MC9 LOW   42 I/O (b) RESET
re_conf 2 14 FB3 MC3 LOW   49 I/O (b) RESET
dcc_clk 1 1 FB3 MC4 LOW FAST 50 I/O O  
pci1_dclk 2 8 FB3 MC11 LOW SLOW 52 I/O O RESET
pci1_confn 2 16 FB3 MC6 LOW SLOW 53 I/O O SET
pci1_data 2 8 FB3 MC7 LOW SLOW 54 I/O O RESET
ver_sr<1> 2 5 FB3 MC14 LOW   55 I/O I RESET
pci3_data 3 8 FB3 MC15 LOW SLOW 56 I/O O RESET
en_conf 18 27 FB3 MC17 LOW   58 I/O I SET
pci3_dclk 3 8 FB3 MC18 LOW SLOW 59 I/O O RESET
conf_fail 5 16 FB3 MC10 LOW   60 I/O I RESET
mdq<4>_BUFR 7 11 FB3 MC12 LOW   61 I/O I RESET
mdq<3>_BUFR 7 11 FB3 MC13 LOW   63 I/O I RESET
ver_sr<5> 3 6 FB4 MC1 LOW   65 I/O I RESET
backup 4 18 FB4 MC9 LOW   66 I/O I RESET
ver_sr<4> 3 6 FB4 MC2 LOW   67 I/O I RESET
ver_sr<3> 3 6 FB4 MC5 LOW   68 I/O (b) RESET
ver_sr<2> 3 6 FB4 MC8 LOW   70 I/O (b) RESET
sp_o<0> 5 9 FB4 MC3 LOW SLOW 71 I/O O RESET
pci3_confn 4 17 FB4 MC4 LOW SLOW 72 I/O O SET
sp_o<1> 1 1 FB4 MC11 LOW FAST 74 I/O O SET
sp_o<2> 3 6 FB4 MC6 LOW SLOW 76 I/O O RESET
sp_o<3> 1 1 FB4 MC7 LOW SLOW 77 I/O O  
ma<15> 4 22 FB4 MC14 LOW SLOW 78 I/O O SET
ma<16> 4 23 FB4 MC18 LOW SLOW 79 I/O O RESET
ma<14> 4 21 FB4 MC10 LOW SLOW 81 I/O O SET
ma<13> 4 20 FB4 MC12 LOW SLOW 82 I/O O SET
ma<12> 4 19 FB4 MC13 LOW SLOW 85 I/O O SET
ma<11> 4 18 FB4 MC16 LOW SLOW 86 I/O O RESET
ma<9> 4 16 FB2 MC1 LOW SLOW 87 I/O O RESET
ma<8> 4 15 FB4 MC15 LOW SLOW 89 I/O O SET
mwen 1 4 FB4 MC17 LOW SLOW 90 I/O O  
mrstn 1 1 FB2 MC3 LOW SLOW 91 I/O O  
ma<18> 4 25 FB2 MC18 LOW SLOW 92 I/O O SET
ma<7> 4 14 FB2 MC4 LOW SLOW 93 I/O O RESET
ma<6> 4 13 FB2 MC2 LOW SLOW 94 I/O O RESET
ma<5> 4 12 FB2 MC5 LOW SLOW 95 I/O O RESET
ma<4> 4 11 FB2 MC6 LOW SLOW 96 I/O O RESET
ma<3> 4 10 FB2 MC8 LOW SLOW 97 I/O O RESET
ma<2> 4 9 FB2 MC9 LOW SLOW 99 I/O/GSR O RESET