u Command: %s 53* vivadotcl2D 0link_design -top AMC13_T1 -part xc7k325tffg900-22default:defaultZ4-113hpx g #Design is defaulting to srcset: %s 437* planAhead2 sources_12default:defaultZ12-437hpx j &Design is defaulting to constrset: %s 434* planAhead2 constrs_12default:defaultZ12-434hpx W Loading part %s157*device2$ xc7k325tffg900-22default:defaultZ21-403hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:012default:default2 00:00:022default:default2 1029.0552default:default2 0.0002default:defaultZ17-268hp x  h -Analyzing %s Unisim elements for replacement 17*netlist2 82752default:defaultZ29-17hpx j 2Unisim Transformation completed in %s CPU seconds 28*netlist2 12default:defaultZ29-28hpx x Netlist was created with %s %s291*project2 Vivado2default:default2 2020.22default:defaultZ1-479hpx K )Preparing netlist for logic optimization 349*projectZ1-570hpx  Parsing XDC File [%s] 179* designutils2D .D:/amc13-firmware/src/common/DDR/ddr3_1_9a.xdc2default:default8Z20-179hpx  %Done setting XDC timing constraints. 35*timing2D .D:/amc13-firmware/src/common/DDR/ddr3_1_9a.xdc2default:default2 272default:default8@Z38-35hpx  DImplicit search of objects for pattern '%s' matched to '%s' objects.1744* planAhead2 sys_clk_p2default:default2 port2default:default2D .D:/amc13-firmware/src/common/DDR/ddr3_1_9a.xdc2default:default2 272default:default8@Z12-2286hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2* set_propagated_clock: 2default:default2 00:00:142default:default2 00:00:122default:default2 1957.1952default:default2 679.4612default:defaultZ17-268hp x   Finished Parsing XDC File [%s] 178* designutils2D .D:/amc13-firmware/src/common/DDR/ddr3_1_9a.xdc2default:default8Z20-178hpx  Parsing XDC File [%s] 179* designutils2? )D:/amc13-firmware/src/top/AMC13_T1_g2.xdc2default:default8Z20-179hpx  Deriving generated clocks 2*timing2? )D:/amc13-firmware/src/top/AMC13_T1_g2.xdc2default:default2 382default:default8@Z38-2hpx  Finished Parsing XDC File [%s] 178* designutils2? )D:/amc13-firmware/src/top/AMC13_T1_g2.xdc2default:default8Z20-178hpx u )Pushed %s inverter(s) to %s load pin(s). 98*opt2 02default:default2 02default:defaultZ31-138hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:002default:default2 00:00:00.0492default:default2 1989.9342default:default2 0.0002default:defaultZ17-268hp x   !Unisim Transformation Summary: %s111*project2  A total of 1163 instances were transformed. IOBUF => IOBUF (IBUF, OBUFT): 4 instances IOBUFDS_DCIEN => IOBUFDS_DCIEN (IBUFDS_IBUFDISABLE_INT(x2), INV, OBUFTDS_DCIEN(x2)): 4 instances IOBUF_DCIEN => IOBUF_DCIEN (IBUF_IBUFDISABLE, OBUFT_DCIEN): 32 instances OBUFDS => OBUFDS_DUAL_BUF (INV, OBUFDS(x2)): 1 instance RAM128X1D => RAM128X1D (MUXF7(x2), RAMD64E(x4)): 32 instances RAM32M => RAM32M (RAMD32(x6), RAMS32(x2)): 394 instances RAM32X1D => RAM32X1D (RAMD32(x2)): 239 instances RAM64M => RAM64M (RAMD64E(x4)): 1 instance RAM64X1D => RAM64X1D (RAMD64E(x2)): 441 instances RAM64X1D_1 => RAM64X1D (inverted pins: WCLK) (RAMD64E(x2)): 14 instances ROM256X1 => ROM256X1 (LUT6(x4), MUXF7(x2), MUXF8): 1 instance 2default:defaultZ1-111hpx  G%s Infos, %s Warnings, %s Critical Warnings and %s Errors encountered. 28* vivadotcl2 102default:default2 02default:default2 02default:default2 02default:defaultZ4-41hpx ] %s completed successfully 29* vivadotcl2 link_design2default:defaultZ4-42hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2! link_design: 2default:default2 00:01:012default:default2 00:00:582default:default2 1989.9342default:default2 960.8792default:defaultZ17-268hp x   End Record