AMC13
Firmwares for the different applications of the AMC13 uTCA board made at Boston University
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common
IPBUS
ipbus_core
hdl
udp_txtransactor_if_simple.vhd
1
-- Simple interface
to
tx side
of
transactor...
2
-- Even simpler, but now multi-buffer RAM!
3
--
4
-- Dave Sankey, September
2012
5
6
library
ieee
;
7
use
ieee.std_logic_1164.
all
;
8
use
ieee.numeric_std.
all
;
9
10
entity
udp_txtransactor_if
is
11
generic
(
12
BUFWIDTH
:
natural
:=
0
13
)
;
14
port
(
15
mac_clk
:
in
std_logic
;
16
rst_macclk
:
in
std_logic
;
17
--
18
pkt_resend
:
in
std_logic
;
19
resend_pkt_id
:
in
std_logic_vector
(
15
downto
0
)
;
20
--
21
ipbus_out_hdr
:
in
std_logic_vector
(
31
downto
0
)
;
22
ipbus_out_valid
:
in
std_logic
;
23
tx_read_buffer
:
in
std_logic_vector
(
BUFWIDTH
-
1
downto
0
)
;
24
--
25
udpram_busy
:
in
std_logic
;
26
clean_buf
:
in
std_logic_vector
(
2
*
*
BUFWIDTH
-
1
downto
0
)
;
27
--
28
req_not_found
:
out
std_logic
;
29
req_resend
:
out
std_logic
;
30
resend_buf
:
out
std_logic_vector
(
BUFWIDTH
-
1
downto
0
)
;
31
udpram_sent
:
out
std_logic
32
)
;
33
end
udp_txtransactor_if
;
34
35
architecture
simple
of
udp_txtransactor_if
is
36
37
type
pktid_buf
is
array
(
2
*
*
BUFWIDTH
-
1
downto
0
)
of
std_logic_vector
(
15
downto
0
)
;
38
signal
pkt_id_buf
:
pktid_buf
;
39
40
begin
41
42
pkt_id_block:
process
(mac_clk)
43
begin
44
if
rising_edge
(
mac_clk
)
then
45
if
rst_macclk
=
'
1
'
then
46
pkt_id_buf
<=
(
Others
=
>
(
Others
=
>
'
0
'
)
)
;
47
elsif
ipbus_out_valid
=
'
1
'
then
48
-- Take byte ordering into account
and
make packet ID big endian...
49
if
ipbus_out_hdr
(
31
downto
24
)
=
x
"20"
then
50
pkt_id_buf
(
to_integer
(
unsigned
(
tx_read_buffer
)
)
)
<=
ipbus_out_hdr
(
23
downto
8
)
;
51
else
52
pkt_id_buf
(
to_integer
(
unsigned
(
tx_read_buffer
)
)
)
<=
53
ipbus_out_hdr
(
15
downto
8
)
&
ipbus_out_hdr
(
23
downto
16
)
;
54
end
if
;
55
end
if
;
56
end
if
;
57
end
process
;
58
59
resend_block:
process
(mac_clk)
60
variable
req_resend_i
,
req_not_found_i
:
std_logic
;
61
variable
resend_buf_i
:
std_logic_vector
(
BUFWIDTH
-
1
downto
0
)
;
62
begin
63
if
rising_edge
(
mac_clk
)
then
64
req_resend_i
:=
'
0
'
;
65
req_not_found_i
:=
'
0
'
;
66
resend_buf_i
:=
(
Others
=
>
'
0
'
)
;
67
if
pkt_resend
=
'
1
'
then
68
for
i
in
0
to
2
*
*
BUFWIDTH
-
1
loop
69
if
pkt_id_buf
(
i
)
=
resend_pkt_id
and
clean_buf
(
i
)
=
'
1
'
then
70
req_resend_i
:=
'
1
'
;
71
resend_buf_i
:=
std_logic_vector
(
to_unsigned
(
i
,
BUFWIDTH
)
)
;
72
end
if
;
73
end
loop
;
74
req_not_found_i
:=
not
req_resend_i
;
75
end
if
;
76
req_not_found
<=
req_not_found_i
77
-- pragma translate_off
78
after
4
ns
79
-- pragma translate_on
80
;
81
req_resend
<=
req_resend_i
82
-- pragma translate_off
83
after
4
ns
84
-- pragma translate_on
85
;
86
resend_buf
<=
resend_buf_i
87
-- pragma translate_off
88
after
4
ns
89
-- pragma translate_on
90
;
91
end
if
;
92
end
process
;
93
94
sent_block:
process
(mac_clk)
95
variable
last_busy
:
std_logic
;
96
begin
97
if
rising_edge
(
mac_clk
)
then
98
udpram_sent
<=
last_busy
and
not
udpram_busy
99
-- pragma translate_off
100
after
4
ns
101
-- pragma translate_on
102
;
103
last_busy
:=
udpram_busy
;
104
end
if
;
105
end
process
;
106
107
end
simple
;
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