AMC13
Firmwares for the different applications of the AMC13 uTCA board made at Boston University
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link_status.vhd
1
----------------------------------------------------------------------------------
2
-- Company:
3
-- Engineer:
4
--
5
-- Create Date:
12
:
31
:
57
12/05/2012
6
-- Design Name:
7
-- Module Name: link_status - Behavioral
8
-- Project Name:
9
-- Target Devices:
10
-- Tool versions:
11
-- Description:
12
--
13
-- Dependencies:
14
--
15
-- Revision:
16
-- Revision
0
.
01
-
File
Created
17
-- Additional Comments:
18
--
19
----------------------------------------------------------------------------------
20
library
IEEE
;
21
use
IEEE.STD_LOGIC_1164.
ALL
;
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use
IEEE.STD_LOGIC_ARITH.
ALL
;
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use
IEEE.STD_LOGIC_UNSIGNED.
ALL
;
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use
IEEE.std_logic_misc.
all
;
25
26
-- Uncomment the following
library
declaration
if
using
27
-- arithmetic functions
with
Signed
or
Unsigned
values
28
--use IEEE.NUMERIC_STD.
ALL
;
29
30
-- Uncomment the following
library
declaration
if
instantiating
31
-- any Xilinx primitives
in
this code.
32
--library UNISIM;
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--use UNISIM.VComponents.
all
;
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entity
link_status
is
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Port
(
clk
:
in
STD_LOGIC
;
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reset
:
in
STD_LOGIC
;
38
Rxc
:
in
STD_LOGIC_VECTOR
(
3
downto
0
)
;
39
Rxd
:
in
STD_LOGIC_VECTOR
(
31
downto
0
)
;
40
link_fault
:
out
STD_LOGIC_VECTOR
(
1
downto
0
)
:=
"00"
)
;
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end
link_status
;
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architecture
Behavioral
of
link_status
is
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type
state
is
(
INIT
,
COUNT
,
FAULT
,
NEW_FAULT_TYPE
)
;
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signal
link_state
:
state
:=
INIT
;
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signal
local_fault
:
std_logic
:=
'
0
'
;
47
signal
remote_fault
:
std_logic
:=
'
0
'
;
48
signal
col_cnt
:
std_logic_vector
(
7
downto
0
)
:=
(
others
=
>
'
0
'
)
;
49
signal
seq_cnt
:
std_logic_vector
(
1
downto
0
)
:=
(
others
=
>
'
0
'
)
;
50
signal
last_seq_type_remote
:
std_logic
:=
'
0
'
;
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begin
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process
(clk)
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begin
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if
(
clk
'
event
and
clk
=
'
1
'
)
then
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if
(
Rxc
=
x
"1"
and
Rxd
=
x
"0100009c"
)
then
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local_fault <= '1';
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else
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local_fault <= '0';
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end
if
;
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if
(
Rxc
=
x
"1"
and
Rxd
=
x
"0200009c"
)
then
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remote_fault
<=
'
1
'
;
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else
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remote_fault
<=
'
0
'
;
65
end
if
;
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if
(
reset
=
'
1
'
)
then
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link_state
<=
INIT
;
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else
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case
link_state
is
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when
INIT
=
>
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col_cnt
<=
(
others
=
>
'
0
'
)
;
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link_fault
<=
"00"
;
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if
(
local_fault
=
'
1
'
)
then
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link_state
<=
COUNT
;
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last_seq_type_remote
<=
'
0
'
;
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end
if
;
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if
(
remote_fault
=
'
1
'
)
then
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link_state
<=
COUNT
;
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last_seq_type_remote
<=
'
1
'
;
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end
if
;
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when
COUNT
=
>
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col_cnt
<=
col_cnt
+
1
;
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if
(
local_fault
=
'
0
'
and
remote_fault
=
'
0
'
and
col_cnt
(
7
)
=
'
1
'
)
then
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link_state
<=
INIT
;
85
end
if
;
86
if
(
local_fault
=
'
1
'
)
then
87
col_cnt
<=
(
others
=
>
'
0
'
)
;
88
seq_cnt
<=
seq_cnt
+
1
;
89
if
(
last_seq_type_remote
=
'
1
'
)
then
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link_state
<=
NEW_FAULT_TYPE
;
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elsif
(
seq_cnt
=
"11"
)
then
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link_state
<=
FAULT
;
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end
if
;
94
end
if
;
95
if
(
remote_fault
=
'
1
'
)
then
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col_cnt
<=
(
others
=
>
'
0
'
)
;
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seq_cnt
<=
seq_cnt
+
1
;
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if
(
last_seq_type_remote
=
'
0
'
)
then
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link_state
<=
NEW_FAULT_TYPE
;
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elsif
(
seq_cnt
=
"11"
)
then
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link_state
<=
FAULT
;
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end
if
;
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end
if
;
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when
FAULT
=
>
105
link_fault
<=
last_seq_type_remote
&
not
last_seq_type_remote
;
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col_cnt
<=
col_cnt
+
1
;
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if
(
local_fault
=
'
1
'
)
then
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col_cnt
<=
(
others
=
>
'
0
'
)
;
109
if
(
last_seq_type_remote
=
'
1
'
)
then
110
link_state
<=
NEW_FAULT_TYPE
;
111
end
if
;
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elsif
(
remote_fault
=
'
1
'
)
then
113
col_cnt
<=
(
others
=
>
'
0
'
)
;
114
if
(
last_seq_type_remote
=
'
0
'
)
then
115
link_state
<=
NEW_FAULT_TYPE
;
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end
if
;
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elsif
(
col_cnt
(
7
)
=
'
1
'
)
then
118
link_state
<=
INIT
;
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end
if
;
120
when
others
=
>
121
link_state
<=
COUNT
;
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seq_cnt
<=
"01"
;
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end
case
;
124
end
if
;
125
end
if
;
126
end
process
;
127
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end
Behavioral
;
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