AMC13
Firmwares for the different applications of the AMC13 uTCA board made at Boston University
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mig_7series_v1_9_mem_intfc Member List

This is the complete list of members for mig_7series_v1_9_mem_intfc, including all inherited members.

TCQ (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ADDR_CMD_MODE (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
BANK_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
BM_CNT_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
BURST_MODE (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
CL (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
CMD_PIPE_PLUS1 (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
COL_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
CS_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
CWL (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
DATA_BUF_ADDR_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
DATA_BUF_OFFSET_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
DATA_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
DQ_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
DQS_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
DRAM_TYPE (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ECC (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ECC_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
MAINT_PRESCALER_PERIOD (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
MC_ERR_ADDR_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nBANK_MACHS (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nCK_PER_CLK (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nCS_PER_RANK (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nREFRESH_BANK (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nSLOTS (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ORDERING (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
PAYLOAD_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
RANK_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
RANKS (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
REG_CTRL (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ROW_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
RTT_NOM (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
RTT_WR (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
SLOT_0_CONFIG (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
SLOT_1_CONFIG (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
STARVE_LIMIT (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tCK (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tCKE (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tFAW (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tRAS (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tRCD (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tREFI (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
CKE_ODT_AUX (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tRFC (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tRP (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tRRD (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tRTP (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tWTR (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tZQCS (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tZQI (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tPRDI (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
USER_REFRESH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
clk (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rst (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
slot_0_present (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
slot_1_present (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
cmd (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
data_buf_addr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
hi_priority (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
size (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
bank (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rank (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
row (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
use_addr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_data (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_data_mask (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
accept (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
accept_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
bank_mach_next (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rd_data (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rd_data_addr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rd_data_en (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rd_data_end (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rd_data_offset (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_data_addr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_data_en (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_data_offset (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_read_idle (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_ref_zq_wip (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
correct_en (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
raw_not_ecc (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ecc_err_addr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ecc_single (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ecc_multiple (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
app_periodic_rd_req (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
app_ref_req (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
app_zq_req (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
app_sr_req (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
app_sr_active (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
app_ref_ack (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
app_zq_ack (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_ras_n (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cas_n (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_we_n (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_address (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_bank (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cs_n (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_odt (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cke (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_reset_n (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_wrdata (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_wrdata_mask (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_wrdata_en (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cmd_wren (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_ctl_wren (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cmd (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_data_offset (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_data_offset_1 (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_data_offset_2 (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cas_slot (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_aux_out0 (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_aux_out1 (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_rank_cnt (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
phy_mc_ctl_full (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
phy_mc_cmd_full (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
phy_mc_data_full (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
phy_rd_data (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
phy_rddata_valid (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
init_calib_complete (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
calib_rd_data_offset (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
calib_rd_data_offset_1 (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
calib_rd_data_offset_2 (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
DELAY_WR_DATA_CNTRL (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
EARLY_WR_DATA_ADDR (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nCKE (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nRP (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nRCD (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nRAS (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nFAW (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nRFC (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nWR_CK (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nWR (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nRRD_CK (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nRRD (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nWTR_CK (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nWTR (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nRTP_CK (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nRTP (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
CWL_M (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
CL_M (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
DQRD2DQWR_DLY (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nCKESR (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
tXSDLL (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
MAINT_PRESCALER_DIV (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
REFRESH_TIMER_DIV (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
PERIODIC_RD_TIMER_DIV (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
MAINT_PRESCALER_PERIOD_NS (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ZQ_TIMER_DIV (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
RANK_BM_BV_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
EVEN_CWL_2T_MODE (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
nOP_WAIT (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
LOW_IDLE_CNT (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
act_this_rank_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_a (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_ba (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_data_buf_addr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_periodic_rd (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_ra (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_rmw (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_rd_wr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_row (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_size (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_wr_data_buf_addr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
dq_busy_data (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
ecc_status_valid (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
inhbt_act_faw_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
inhbt_rd (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
inhbt_wr (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
insert_maint_r1 (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
maint_rank_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
maint_req_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
maint_wip_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
maint_zq_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
maint_sre_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
maint_srx_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
periodic_rd_ack_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
periodic_rd_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
periodic_rd_rank_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rank_busy_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rd_rmw (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
rd_this_rank_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
sending_col (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
sending_row (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
sent_col (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
sent_col_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_ecc_buf (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_this_rank_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_ras_n_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cas_n_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_we_n_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_address_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_bank_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cs_n_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_odt_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cke_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_aux_out0_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_aux_out1_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_rank_cnt_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cmd_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_data_offset_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_data_offset_1_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_data_offset_2_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_cas_slot_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_wrdata_en_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_data_addr_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_data_en_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
wr_data_offset_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
i (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
col_read_fifo_empty (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_read_idle_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_read_idle_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
maint_ref_zq_wip (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_ref_zq_wip_ns (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mc_ref_zq_wip_r (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
CODE_WIDTH (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
TCQ (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
PAYLOAD_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ADDR_CMD_MODE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
AL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BANK_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BM_CNT_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BURST_MODE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BURST_TYPE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CA_MIRROR (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CK_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_CTL_B0 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_CTL_B1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_CTL_B2 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_CTL_B3 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_CTL_B4 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BYTE_LANES_B0 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BYTE_LANES_B1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BYTE_LANES_B2 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BYTE_LANES_B3 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BYTE_LANES_B4 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
PHY_0_BITLANES (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
PHY_1_BITLANES (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
PHY_2_BITLANES (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CK_BYTE_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ADDR_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BANK_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CAS_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CKE_ODT_BYTE_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CKE_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ODT_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CKE_ODT_AUX (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CS_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
PARITY_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
RAS_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
WE_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQS_BYTE_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA0_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA1_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA2_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA3_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA4_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA5_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA6_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA7_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA8_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA9_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA10_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA11_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA12_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA13_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA14_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA15_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA16_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA17_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
MASK0_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
MASK1_MAP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CALIB_ROW_ADD (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CALIB_COL_ADD (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CALIB_BA_ADD (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
COL_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CMD_PIPE_PLUS1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CS_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CKE_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CWL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_BUF_ADDR_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_BUF_OFFSET_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DDR2_DQSN_ENABLE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DM_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQ_CNT_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQ_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQS_CNT_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQS_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DRAM_TYPE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DRAM_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ECC (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ECC_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
MC_ERR_ADDR_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nAL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nBANK_MACHS (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
PRE_REV3ES (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nCK_PER_CLK (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nCS_PER_RANK (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
PHYCTL_CMD_FIFO (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ORDERING (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
PHASE_DETECT (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
IBUF_LPWR_MODE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
IODELAY_HP_MODE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
BANK_TYPE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_IO_PRIM_TYPE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DATA_IO_IDLE_PWRDWN (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
IODELAY_GRP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
OUTPUT_DRV (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
REG_CTRL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
RTT_NOM (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
RTT_WR (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
STARVE_LIMIT (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tCK (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tCKE (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tFAW (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tPRDI (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tRAS (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tRCD (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tREFI (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tRFC (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tRP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tRRD (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tRTP (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tWTR (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tZQI (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tZQCS (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
WRLVL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DEBUG_PORT (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CAL_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
RANK_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
RANKS (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ODT_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ROW_WIDTH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
SLOT_0_CONFIG (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
SLOT_1_CONFIG (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
SIM_BYPASS_INIT_CAL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
REFCLK_FREQ (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nDQS_COL0 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nDQS_COL1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nDQS_COL2 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nDQS_COL3 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQS_LOC_COL0 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQS_LOC_COL1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQS_LOC_COL2 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
DQS_LOC_COL3 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
USE_CS_PORT (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
USE_DM_PORT (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
USE_ODT_PORT (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
MASTER_PHY_CTL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
USER_REFRESH (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
TEMP_MON_EN (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
clk_ref (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
freq_refclk (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mem_refclk (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
pll_lock (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
sync_pulse (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
error (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
reset (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rst_tg_mc (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
bank (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
clk (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
cmd (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
col (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
correct_en (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
data_buf_addr (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_idel_down_all (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_idel_down_cpt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_idel_up_all (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_idel_up_cpt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_sel_all_idel_cpt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_sel_idel_cpt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
hi_priority (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rank (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
raw_not_ecc (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
row (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rst (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
size (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
slot_0_present (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
slot_1_present (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
use_addr (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
wr_data (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
wr_data_mask (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
accept (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
accept_ns (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
bank_mach_next (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
app_sr_req (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
app_sr_active (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
app_ref_req (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
app_ref_ack (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
app_zq_req (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
app_zq_ack (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_calib_top (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_cpt_first_edge_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_cpt_second_edge_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_phy_rdlvl (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_phy_wrcal (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_final_po_fine_tap_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_final_po_coarse_tap_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_rd_data_edge_detect (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_rddata (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_rdlvl_done (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_rdlvl_err (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_rdlvl_start (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_tap_cnt_during_wrlvl (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wl_edge_detect_valid (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wrlvl_done (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wrlvl_err (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wrlvl_start (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_addr (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_ba (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_cas_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_ck_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_ck (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_cke (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_cs_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_dm (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_odt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_ras_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_reset_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_parity (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_we_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
init_calib_complete (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
init_wrcal_complete (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ecc_err_addr (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ecc_multiple (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ecc_single (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rd_data (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rd_data_addr (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rd_data_en (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rd_data_end (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rd_data_offset (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
wr_data_addr (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
wr_data_en (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
wr_data_offset (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_dq (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_dqs_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ddr_dqs (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
device_temp (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_sel_pi_incdec (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_sel_po_incdec (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_byte_sel (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_f_inc (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_f_dec (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_po_f_inc (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_po_f_stg23_sel (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_po_f_dec (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_cpt_tap_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_dq_idelay_tap_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_rddata_valid (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wrlvl_fine_tap_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wrlvl_coarse_tap_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_phy_wrlvl (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_counter_read_val (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_po_counter_read_val (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
ref_dll_lock (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
rst_phaser_ref (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_rd_data_offset (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_phy_init (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_prbs_rdlvl (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_dqs_found_cal (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_phaselock_start (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_phaselocked_done (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_phaselock_err (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_dqsfound_start (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_dqsfound_done (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_dqsfound_err (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wrcal_start (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wrcal_done (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_wrcal_err (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_dqs_found_lanes_phy4lanes (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_pi_phase_locked_phy4lanes (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_calib_rd_data_offset_1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_calib_rd_data_offset_2 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_data_offset (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_data_offset_1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_data_offset_2 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_oclkdelay_calib_start (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_oclkdelay_calib_done (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_phy_oclkdelay_cal (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
dbg_oclkdelay_rd_data (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nSLOTS (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
SLOT_0_CONFIG_MC (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
SLOT_1_CONFIG_MC (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
slot_0_present_mc (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
slot_1_present_mc (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
user_periodic_rd_req (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
user_ref_req (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
user_zq_req (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_ras_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_cas_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_we_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_address (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_bank (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_cke (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_odt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_cs_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_reset_n (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_wrdata (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_wrdata_mask (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_wrdata_en (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_ref_zq_wip (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
tempmon_sample_en (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
idle (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_cmd_wren (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_ctl_wren (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_cmd (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_cas_slot (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_data_offset (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_data_offset_1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_data_offset_2 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_aux_out0 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_aux_out1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mc_rank_cnt (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
phy_mc_ctl_full (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
phy_mc_cmd_full (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
phy_mc_data_full (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
phy_rd_data (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
phy_rddata_valid (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
calib_rd_data_offset_0 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
calib_rd_data_offset_1 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
calib_rd_data_offset_2 (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
init_calib_complete_w (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
init_wrcal_complete_w (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mux_rst (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CWL_T (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
CLK_PERIOD (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nCL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
nCWL (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
cdivnumdiv (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mig_7series_v1_9_bank_mach (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mig_7series_v1_9_col_mach (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mig_7series_v1_9_ecc_buf (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mig_7series_v1_9_ecc_dec_fix (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mig_7series_v1_9_ecc_gen (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mig_7series_v1_9_ecc_merge_enc (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
mig_7series_v1_9_mc (defined in mig_7series_v1_9_mem_intfc)mig_7series_v1_9_mem_intfcClass
mig_7series_v1_9_rank_mach (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
PROCESS_465clk (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass
PROCESS_466clk (defined in mig_7series_v1_9_mc)mig_7series_v1_9_mcClass