AMC13
Firmwares for the different applications of the AMC13 uTCA board made at Boston University
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TCP_OPTION.vhd
1 ----------------------------------------------------------------------------------
2 -- Company:
3 -- Engineer:
4 --
5 -- Create Date: 11:41:15 07/29/2013
6 -- Design Name:
7 -- Module Name: IP_OPTION - Behavioral
8 -- Project Name:
9 -- Target Devices:
10 -- Tool versions:
11 -- Description:
12 --
13 -- Dependencies:
14 --
15 -- Revision:
16 -- Revision 0.01 - File Created
17 -- Additional Comments:
18 --
19 ----------------------------------------------------------------------------------
20 library IEEE;
21 use IEEE.STD_LOGIC_1164.ALL;
22 use IEEE.STD_LOGIC_ARITH.ALL;
23 use IEEE.STD_LOGIC_UNSIGNED.ALL;
24 use IEEE.std_logic_misc.all;
25 
26 -- Uncomment the following library declaration if using
27 -- arithmetic functions with Signed or Unsigned values
28 --use IEEE.NUMERIC_STD.ALL;
29 
30 -- Uncomment the following library declaration if instantiating
31 -- any Xilinx primitives in this code.
32 library UNISIM;
33 use UNISIM.VComponents.all;
34 
35 entity TCP_OPTION is
36  Port ( clk : in STD_LOGIC;
37  CLOSED : in STD_LOGIC;
38  update_TSrecent : in STD_LOGIC;
39  TSclock : in STD_LOGIC_VECTOR (31 downto 0);
40  RCV_SYN : in STD_LOGIC;
41  SND_SYN : in STD_LOGIC;
42  LISTEN : in STD_LOGIC;
43  Save_ReTx : in STD_LOGIC;
44  Save_ReTxTime : in STD_LOGIC;
45  OPTION_begin : in STD_LOGIC;
46  OPTION_end : in STD_LOGIC;
47  di : in STD_LOGIC_VECTOR (31 downto 0);
48  scale : out STD_LOGIC_VECTOR (3 downto 0);
49  DATA_OFFSET : out STD_LOGIC_VECTOR (3 downto 0);
50  MSS : out STD_LOGIC_VECTOR (15 downto 0);
51  RTT : out STD_LOGIC_VECTOR (27 downto 0);
52  OPTION_rdy : out STD_LOGIC;
53  TS_OPTION : out STD_LOGIC;
54  OldData : out STD_LOGIC;
55  rd_dout : in STD_LOGIC;
56  dout : out STD_LOGIC_VECTOR (31 downto 0);
57  debug : out STD_LOGIC_VECTOR (135 downto 0));
58 end TCP_OPTION;
59 
60 architecture Behavioral of TCP_OPTION is
61 type state is (IDLE, OPTION_KIND, OPTION_LEN, OPTION_DATA);
62 signal OPTIONstate : state := IDLE;
63 signal counter : std_logic_vector(1 downto 0) := (others => '0');
64 signal len : std_logic_vector(5 downto 0) := (others => '0');
65 signal queue_i : std_logic_vector(31 downto 0) := (others => '0');
66 signal queue_o : std_logic_vector(31 downto 0) := (others => '0');
67 signal queue_a : std_logic_vector(3 downto 0) := (others => '1');
68 signal data : std_logic_vector(7 downto 0) := (others => '0');
69 signal data_cntr : std_logic_vector(2 downto 0) := (others => '0');
70 signal option_type : std_logic_vector(7 downto 0) := (others => '0');
71 signal SYNRCVD : std_logic := '1';
72 signal rd_dout_r : std_logic := '1';
73 signal len_byte : std_logic := '1';
74 signal rst_queue : std_logic := '1';
75 signal we_queue : std_logic := '0';
76 signal re_queue : std_logic := '0';
77 signal TSOPT : std_logic := '0';
78 signal WSOPT : std_logic := '0';
79 signal RTT_i : std_logic_vector(31 downto 0) := (others => '0');
80 signal TSrecent : std_logic_vector(31 downto 0) := (others => '0');
81 signal TScurrent : std_logic_vector(31 downto 0) := (others => '0');
82 signal TSechoed : std_logic_vector(31 downto 0) := (others => '0');
83 signal scale_i : std_logic_vector(3 downto 0) := (others => '0');
84 signal dout_sel : std_logic_vector(2 downto 0) := (others => '0');
85 signal MSS_i : std_logic_vector(15 downto 0) := (others => '0');
86 signal MSS_rcvd : std_logic_vector(15 downto 0) := (others => '0');
87 signal ReTxTime : std_logic_vector(31 downto 0) := (others => '0');
88 signal DeltaTime : std_logic_vector(31 downto 0) := (others => '0');
89 begin
90 debug(129) <= Save_ReTx;
91 debug(128) <= Save_ReTxTime;
92 debug(127 downto 96) <= TScurrent;
93 debug(95 downto 64) <= TSechoed;
94 debug(63 downto 32) <= ReTxTime;
95 debug(31 downto 0) <= DeltaTime;
96 --debug(128) <= OPTION_begin;
97 --debug(127 downto 96) <= RTT_i;
98 --debug(95 downto 64) <= TScurrent;
99 --debug(63 downto 32) <= TSechoed;
100 --debug(30 downto 27) <= queue_a;
101 --debug(26) <= re_queue;
102 --debug(25 downto 23) <= data_cntr;
103 --debug(22 downto 21) <= counter;
104 --debug(20) <= we_queue;
105 --debug(19) <= rst_queue;
106 --debug(18) <= OPTION_end;
107 --debug(17) <= OPTION_begin;
108 --debug(16 downto 13) <= option_type(3 downto 0);
109 --debug(12 downto 5) <= data;
110 --debug(4) <= '1' when OPTIONstate = OPTION_DATA else '0';
111 --debug(3) <= '1' when OPTIONstate = OPTION_LEN else '0';
112 --debug(2) <= '1' when OPTIONstate = OPTION_KIND else '0';
113 --debug(1) <= '1' when OPTIONstate = IDLE else '0';
114 --debug(31) <= WSOPT;
115 TS_OPTION <= TSOPT;
116 OldData <= DeltaTime(31);
117 process(clk, data_cntr)
118 variable i : integer;
119 begin
120  i := conv_integer(data_cntr(1 downto 0));
121  if(clk'event and clk = '1')then
122  if(TSOPT = '1')then
123  MSS_i <= MSS_rcvd - x"000a";
124  else
125  MSS_i <= MSS_rcvd;
126  end if;
127 -- if(MSS_i(15 downto 13) /= "000")then
128  if(MSS_i(15 downto 11) = "11111" and MSS_i(10 downto 9) /= "00")then
129  MSS <= x"FA00";
130  else
131  MSS <= MSS_i;
132  end if;
133  if(OPTION_end = '1' or queue_a = x"b")then
134  we_queue <= '0';
135  elsif(OPTION_begin = '1')then
136  we_queue <= '1';
137  end if;
138  if(OPTION_begin = '1')then
139  SYNRCVD <= LISTEN;
140  end if;
141  if(OPTION_begin = '1' or rd_dout = '1')then
142  TScurrent <= TSclock;
143  end if;
144  RTT_i <= TScurrent - TSechoed;
145  if(or_reduce(RTT_i(31 downto 28)) = '1')then
146  RTT <= (others => '1');
147  else
148  RTT <= RTT_i(27 downto 0);
149  end if;
150  if(rst_queue = '1' or OPTION_begin = '1')then
151  queue_a <= (others => '1');
152  elsif(we_queue = '1' and re_queue = '0')then
153  queue_a <= queue_a + 1;
154  elsif(we_queue = '0' and re_queue = '1' and queue_a /= x"f")then
155  queue_a <= queue_a - 1;
156  end if;
157  if(Save_ReTx = '1')then
158  ReTxTime <= TSclock;
159  elsif(Save_ReTxTime = '1')then
160  ReTxTime <= TScurrent;
161  end if;
162  if(OPTIONstate = IDLE)then
163  DeltaTime <= TSechoed - ReTxTime;
164  end if;
165  if(CLOSED = '1' or (OPTION_begin = '1' and LISTEN = '1'))then
166  scale_i <= (others => '0');
167  MSS_rcvd <= x"0218";
168  TSOPT <= '0';
169  WSOPT <= '0';
170  end if;
171  if(rst_queue = '1' or (queue_a = x"f" and counter = "11"))then
172  OPTIONstate <= IDLE;
173  rst_queue <= '0';
174  re_queue <= '0';
175  else
176  case OPTIONstate is
177  when IDLE =>
178  if(queue_a = x"0")then
179  OPTIONstate <= OPTION_KIND;
180  OPTION_rdy <= '0';
181  else
182  OPTION_rdy <= '1';
183  end if;
184  counter <= "00";
185  re_queue <= '0';
186  when OPTION_KIND =>
187  counter <= counter + 1;
188  if(counter = "10")then
189  re_queue <= '1';
190  else
191  re_queue <= '0';
192  end if;
193  option_type <= data;
194  case data is
195  when x"00" =>
196  rst_queue <= '1';
197  when x"01" =>
198  when others =>
199  OPTIONstate <= OPTION_LEN;
200  end case;
201  len_byte <= '1';
202  when OPTION_LEN =>
203  len_byte <= '0';
204  counter <= counter + 1;
205  if(counter = "10")then
206  re_queue <= '1';
207  else
208  re_queue <= '0';
209  end if;
210  if(len_byte = '1')then
211  len <= data(5 downto 0);
212  if(data(5 downto 0) = "000010")then -- option length = 2
213  OPTIONstate <= OPTION_KIND;
214  end if;
215  case option_type is
216  when x"02" | x"03" | x"08" =>
217  OPTIONstate <= OPTION_DATA;
218  when others => null;
219  end case;
220  elsif(len = "000011")then
221  OPTIONstate <= OPTION_KIND;
222  else
223  len <= len - 1;
224  end if;
225  data_cntr <= (others => '0');
226  when OPTION_DATA =>
227  counter <= counter + 1;
228  if(counter = "10")then
229  re_queue <= '1';
230  else
231  re_queue <= '0';
232  end if;
233  data_cntr <= data_cntr + 1;
234  if(option_type(3) = '1')then
235  if(SYNRCVD = '1' and RCV_SYN = '1')then
236  TSOPT <= '1';
237  end if;
238  if(data_cntr(2) = '1')then
239  TSechoed((3-i)*8+7 downto (3-i)*8) <= data;
240  elsif(update_TSrecent = '1')then
241  TSrecent((3-i)*8+7 downto (3-i)*8) <= data;
242  end if;
243  if(data_cntr(2 downto 0) = "111")then -- TS option length is 10
244  OPTIONstate <= OPTION_KIND;
245  end if;
246  elsif(option_type(0) = '1')then
247  if(SYNRCVD = '1' and RCV_SYN = '1')then
248  scale_i <= data(3 downto 0);
249  WSOPT <= '1';
250  end if;
251  OPTIONstate <= OPTION_KIND; -- scale option length is 3
252  else
253  if(SYNRCVD = '1' and RCV_SYN = '1')then
254  MSS_rcvd((1-i)*8+7 downto (1-i)*8) <= data;
255  end if;
256  if(data_cntr(0) = '1')then -- MSS option length is 4
257  OPTIONstate <= OPTION_KIND;
258  end if;
259  end if;
260  when others => OPTIONstate <= IDLE;
261  end case;
262  end if;
263  if(WSOPT = '1' and TSOPT = '1' and SND_SYN = '1')then
264  DATA_OFFSET <= x"9";
265  elsif((WSOPT = '0' or SND_SYN = '0') and TSOPT = '1')then
266  DATA_OFFSET <= x"8";
267  elsif(WSOPT = '1' and TSOPT = '0' and SND_SYN = '1')then
268  DATA_OFFSET <= x"6";
269  else
270  DATA_OFFSET <= x"5";
271  end if;
272  if(rd_dout = '1')then
273  rd_dout_r <= '1';
274  elsif(dout_sel(2) = '1')then
275  rd_dout_r <= '0';
276  end if;
277  if(rd_dout_r = '1')then
278  dout_sel <= dout_sel + 1;
279  elsif(WSOPT = '1' and TSOPT = '0' and SND_SYN = '1')then
280  dout_sel <= "011";
281  else
282  dout_sel <= "000";
283  end if;
284  case dout_sel is
285  when "000" => dout <= x"0000080a";
286  when "001" => dout <= TScurrent;
287  when "010" => dout <= TSrecent;
288  when "011" => dout <= x"01010303";
289  when others => dout <= (others => '0');
290  end case;
291  if(WSOPT = '1')then
292  scale <= scale_i;
293 -- case scale_i is
294 -- when x"0" => scale <= x"0001";
295 -- when x"1" => scale <= x"0002";
296 -- when x"2" => scale <= x"0004";
297 -- when x"3" => scale <= x"0008";
298 -- when x"4" => scale <= x"0010";
299 -- when x"5" => scale <= x"0020";
300 -- when x"6" => scale <= x"0040";
301 -- when x"7" => scale <= x"0080";
302 -- when x"8" => scale <= x"0100";
303 -- when x"9" => scale <= x"0200";
304 -- when x"a" => scale <= x"0400";
305 -- when x"b" => scale <= x"0800";
306 -- when x"c" => scale <= x"1000";
307 -- when x"d" => scale <= x"2000";
308 -- when others => scale <= x"4000";
309 -- end case;
310  else
311 -- scale <= x"0001";
312  scale <= x"0";
313  end if;
314  queue_i(31 downto 16) <= di(15 downto 0);
315  end if;
316 end process;
317 process(counter,queue_o)
318 begin
319  case counter is
320  when "00" => data <= queue_o(31 downto 24);
321  when "01" => data <= queue_o(23 downto 16);
322  when "10" => data <= queue_o(15 downto 8);
323  when others => data <= queue_o(7 downto 0);
324  end case;
325 end process;
326 queue_i(15 downto 0) <= di(31 downto 16);
327 g_queue: for i in 0 to 31 generate
328  i_queue : SRL16E
329  port map (
330  Q => queue_o(i), -- SRL data output
331  A0 => queue_a(0), -- Select[0] input
332  A1 => queue_a(1), -- Select[1] input
333  A2 => queue_a(2), -- Select[2] input
334  A3 => queue_a(3), -- Select[3] input
335  CE => we_queue, -- Clock enable input
336  CLK => clk, -- Clock input
337  D => queue_i(i) -- SRL data input
338  );
339 end generate;
340 
341 
342 end Behavioral;
343