#----------------------------------------------------------------- #--- Calculate probes #----------------------------------------------------------------- default_probes = { # Master 0 "master_clk_offset_locked_1" : { "dir" : "in", "size" : 1} , "prbschk_master_locked_sync_1" : { "dir" : "in", "size" : 1} , "master_sfp_mod_abs_sync_1" : { "dir" : "in", "size" : 1} , "master_sfp_tx_fault_sync_1" : { "dir" : "in", "size" : 1} , "master_sfp_los_sync_1" : { "dir" : "in", "size" : 1} , "master_core_stat[0][phase_cdc40_rx]" : { "dir" : "in", "size" : 3} , "master_core_stat[0][phase_cdc40_tx]" : { "dir" : "in", "size" : 10} , "master_core_stat[0][rx_fec_corrected_latched]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][rx_frame_locked]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_txpll_lock]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_rxpll_lock]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_buffbypass_rx_done]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_buffbypass_rx_error]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_powergood]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_reset_tx_done]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_reset_rx_done]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_rxpmaresetdone]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_txpmaresetdone]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_tx_ready]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_rx_ready]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_rxprbserr]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_rxprbslocked]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_drprdy_latched]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_drpdo]" : { "dir" : "in", "size" : 16} , "master_core_stat[0][mgt_hptd_tx_pi_phase]" : { "dir" : "in", "size" : 7} , "master_core_stat[0][mgt_hptd_tx_fifo_fill_pd]" : { "dir" : "in", "size" : 32} , "master_core_stat[0][mgt_hptd_ps_done_latched]" : { "dir" : "in", "size" : 1} , "master_core_stat[0][mgt_rxeq_dmonitor]" : { "dir" : "in", "size" : 16} , "master_tclink_stat[0][tclink_phase_detector]" : { "dir" : "in", "size" : 32} , "master_tclink_stat[0][tclink_error_controller]" : { "dir" : "in", "size" : 48} , "master_tclink_stat[0][tclink_phase_acc]" : { "dir" : "in", "size" : 16} , "master_tclink_stat[0][tclink_operation_error]" : { "dir" : "in", "size" : 1} , "master_tclink_stat[0][tclink_debug_tester_data_read]" : { "dir" : "in", "size" : 16} , "master_sfp_rs0_1" : { "dir" : "out", "size" : 1, "init" : 0x1}, "master_sfp_rs1_1" : { "dir" : "out", "size" : 1, "init" : 0x1}, "master_sfp_tx_dis_1" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_mgt_reset_all_1" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_mgt_reset_tx_pll_and_datapath_1" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_mgt_reset_tx_datapath_1" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_mgt_reset_rx_datapath_1" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][phase_cdc40_rx_force]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][phase_cdc40_rx_calib]" : { "dir" : "out", "size" : 3, "init" : 0x0}, "master_core_ctrl[0][phase_cdc40_tx_force]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][phase_cdc40_tx_calib]" : { "dir" : "out", "size" : 10, "init" : 0x0}, "master_core_ctrl[0][rx_fec_corrected_clear]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_txpolarity]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxpolarity]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_loopback]" : { "dir" : "out", "size" : 3, "init" : 0x0}, "master_core_ctrl[0][mgt_txprbsforceerr]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_txprbssel]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "master_core_ctrl[0][mgt_rxprbscntreset]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxprbssel]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "master_core_ctrl[0][mgt_drpwe]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_drpen]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_drpaddr]" : { "dir" : "out", "size" : 10, "init" : 0x0}, "master_core_ctrl[0][mgt_drpdi]" : { "dir" : "out", "size" : 16, "init" : 0x0}, "master_core_ctrl[0][mgt_hptd_tx_pi_phase_calib]" : { "dir" : "out", "size" : 7, "init" : 0x0}, "master_core_ctrl[0][mgt_hptd_tx_ui_align_calib]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_hptd_ps_strobe]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_hptd_ps_inc_ndec]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_hptd_ps_phase_step]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxlpmgcovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxlpmhfovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxlpmlfklovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxlpmosovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxlpmen]" : { "dir" : "out", "size" : 1, "init" : 0x1}, "master_core_ctrl[0][mgt_rxeq_rxdfelfovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxdfelpmreset]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxdfeutovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxdfevpovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxdfeagcovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[0][mgt_rxeq_rxosovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[0][tclink_close_loop]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[0][tclink_offset_error]" : { "dir" : "out", "size" : 48, "init" : 0x0}, "master_tclink_ctrl[0][tclink_metastability_deglitch]" : { "dir" : "out", "size" : 16, "init" : 0x0052}, "master_tclink_ctrl[0][tclink_phase_detector_navg]" : { "dir" : "out", "size" : 12, "init" : 0x040}, "master_tclink_ctrl[0][tclink_modulo_carrier_period]" : { "dir" : "out", "size" : 48, "init" : 0x00007ff48348}, "master_tclink_ctrl[0][tclink_Aie]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "master_tclink_ctrl[0][tclink_Aie_enable]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[0][tclink_Ape]" : { "dir" : "out", "size" : 4, "init" : 0xe}, "master_tclink_ctrl[0][tclink_sigma_delta_clk_div]" : { "dir" : "out", "size" : 16, "init" : 0x0197}, "master_tclink_ctrl[0][tclink_enable_mirror]" : { "dir" : "out", "size" : 1, "init" : 0x1}, "master_tclink_ctrl[0][tclink_Adco]" : { "dir" : "out", "size" : 48, "init" : 0x0000000ffe90}, "master_tclink_ctrl[0][tclink_debug_tester_enable_stimulis]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[0][tclink_debug_tester_fcw]" : { "dir" : "out", "size" : 10, "init" : 0x002}, "master_tclink_ctrl[0][tclink_debug_tester_nco_scale]" : { "dir" : "out", "size" : 5, "init" : 0x14}, "master_tclink_ctrl[0][tclink_debug_tester_enable_stock_out]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[0][tclink_debug_tester_addr_read]" : { "dir" : "out", "size" : 10, "init" : 0x0}, "master_tclink_ctrl[0][tclink_master_rx_ui_period]" : { "dir" : "out", "size" : 48, "init" : 0x000003ffa41a}, # Master 1 "master_clk_offset_locked" : { "dir" : "in", "size" : 1} , "prbschk_master_locked_sync" : { "dir" : "in", "size" : 1} , "master_sfp_mod_abs_sync" : { "dir" : "in", "size" : 1} , "master_sfp_tx_fault_sync" : { "dir" : "in", "size" : 1} , "master_sfp_los_sync" : { "dir" : "in", "size" : 1} , "master_core_stat[1][phase_cdc40_rx]" : { "dir" : "in", "size" : 3} , "master_core_stat[1][phase_cdc40_tx]" : { "dir" : "in", "size" : 10} , "master_core_stat[1][rx_fec_corrected_latched]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][rx_frame_locked]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_txpll_lock]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_rxpll_lock]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_buffbypass_rx_done]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_buffbypass_rx_error]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_powergood]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_reset_tx_done]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_reset_rx_done]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_rxpmaresetdone]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_txpmaresetdone]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_tx_ready]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_rx_ready]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_rxprbserr]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_rxprbslocked]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_drprdy_latched]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_drpdo]" : { "dir" : "in", "size" : 16} , "master_core_stat[1][mgt_hptd_tx_pi_phase]" : { "dir" : "in", "size" : 7} , "master_core_stat[1][mgt_hptd_tx_fifo_fill_pd]" : { "dir" : "in", "size" : 32} , "master_core_stat[1][mgt_hptd_ps_done_latched]" : { "dir" : "in", "size" : 1} , "master_core_stat[1][mgt_rxeq_dmonitor]" : { "dir" : "in", "size" : 16} , "master_tclink_stat[1][tclink_phase_detector]" : { "dir" : "in", "size" : 32} , "master_tclink_stat[1][tclink_error_controller]" : { "dir" : "in", "size" : 48} , "master_tclink_stat[1][tclink_phase_acc]" : { "dir" : "in", "size" : 16} , "master_tclink_stat[1][tclink_operation_error]" : { "dir" : "in", "size" : 1} , "master_tclink_stat[1][tclink_debug_tester_data_read]" : { "dir" : "in", "size" : 16} , "master_sfp_rs0" : { "dir" : "out", "size" : 1, "init" : 0x1}, "master_sfp_rs1" : { "dir" : "out", "size" : 1, "init" : 0x1}, "master_sfp_tx_dis" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_mgt_reset_all" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_mgt_reset_tx_pll_and_datapath" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_mgt_reset_tx_datapath" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_mgt_reset_rx_datapath" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][phase_cdc40_rx_force]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][phase_cdc40_rx_calib]" : { "dir" : "out", "size" : 3, "init" : 0x0}, "master_core_ctrl[1][phase_cdc40_tx_force]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][phase_cdc40_tx_calib]" : { "dir" : "out", "size" : 10, "init" : 0x0}, "master_core_ctrl[1][rx_fec_corrected_clear]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_txpolarity]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxpolarity]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_loopback]" : { "dir" : "out", "size" : 3, "init" : 0x0}, "master_core_ctrl[1][mgt_txprbsforceerr]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_txprbssel]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "master_core_ctrl[1][mgt_rxprbscntreset]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxprbssel]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "master_core_ctrl[1][mgt_drpwe]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_drpen]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_drpaddr]" : { "dir" : "out", "size" : 10, "init" : 0x0}, "master_core_ctrl[1][mgt_drpdi]" : { "dir" : "out", "size" : 16, "init" : 0x0}, "master_core_ctrl[1][mgt_hptd_tx_pi_phase_calib]" : { "dir" : "out", "size" : 7, "init" : 0x0}, "master_core_ctrl[1][mgt_hptd_tx_ui_align_calib]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_hptd_ps_strobe]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_hptd_ps_inc_ndec]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_hptd_ps_phase_step]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxlpmgcovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxlpmhfovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxlpmlfklovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxlpmosovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxlpmen]" : { "dir" : "out", "size" : 1, "init" : 0x1}, "master_core_ctrl[1][mgt_rxeq_rxdfelfovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxdfelpmreset]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxdfeutovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxdfevpovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxdfeagcovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_core_ctrl[1][mgt_rxeq_rxosovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[1][tclink_close_loop]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[1][tclink_offset_error]" : { "dir" : "out", "size" : 48, "init" : 0x0}, "master_tclink_ctrl[1][tclink_metastability_deglitch]" : { "dir" : "out", "size" : 16, "init" : 0x0052}, "master_tclink_ctrl[1][tclink_phase_detector_navg]" : { "dir" : "out", "size" : 12, "init" : 0x040}, "master_tclink_ctrl[1][tclink_modulo_carrier_period]" : { "dir" : "out", "size" : 48, "init" : 0x00007ff48348}, "master_tclink_ctrl[1][tclink_Aie]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "master_tclink_ctrl[1][tclink_Aie_enable]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[1][tclink_Ape]" : { "dir" : "out", "size" : 4, "init" : 0xe}, "master_tclink_ctrl[1][tclink_sigma_delta_clk_div]" : { "dir" : "out", "size" : 16, "init" : 0x0197}, "master_tclink_ctrl[1][tclink_enable_mirror]" : { "dir" : "out", "size" : 1, "init" : 0x1}, "master_tclink_ctrl[1][tclink_Adco]" : { "dir" : "out", "size" : 48, "init" : 0x0000000ffe90}, "master_tclink_ctrl[1][tclink_debug_tester_enable_stimulis]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[1][tclink_debug_tester_fcw]" : { "dir" : "out", "size" : 10, "init" : 0x002}, "master_tclink_ctrl[1][tclink_debug_tester_nco_scale]" : { "dir" : "out", "size" : 5, "init" : 0x14}, "master_tclink_ctrl[1][tclink_debug_tester_enable_stock_out]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "master_tclink_ctrl[1][tclink_debug_tester_addr_read]" : { "dir" : "out", "size" : 10, "init" : 0x0}, "master_tclink_ctrl[1][tclink_master_rx_ui_period]" : { "dir" : "out", "size" : 48, "init" : 0x000003ffa41a}, # Slave "prbschk_slave_locked_sync" : { "dir" : "in", "size" : 1} , "slave_firefly_int_b_sync" : { "dir" : "in", "size" : 1} , "slave_firefly_modprs_b_sync" : { "dir" : "in", "size" : 1} , "slave_core_stat[phase_cdc40_rx]" : { "dir" : "in", "size" : 3} , "slave_core_stat[phase_cdc40_tx]" : { "dir" : "in", "size" : 10} , "slave_core_stat[rx_fec_corrected_latched]" : { "dir" : "in", "size" : 1} , "slave_core_stat[rx_frame_locked]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_txpll_lock]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_rxpll_lock]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_buffbypass_rx_done]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_buffbypass_rx_error]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_powergood]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_reset_tx_done]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_reset_rx_done]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_rxpmaresetdone]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_txpmaresetdone]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_tx_ready]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_rx_ready]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_rxprbserr]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_rxprbslocked]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_drprdy_latched]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_drpdo]" : { "dir" : "in", "size" : 16} , "slave_core_stat[mgt_hptd_tx_pi_phase]" : { "dir" : "in", "size" : 7} , "slave_core_stat[mgt_hptd_tx_fifo_fill_pd]" : { "dir" : "in", "size" : 32} , "slave_core_stat[mgt_hptd_ps_done_latched]" : { "dir" : "in", "size" : 1} , "slave_core_stat[mgt_rxeq_dmonitor]" : { "dir" : "in", "size" : 16} , "slave_firefly_modsel_b" : { "dir" : "out", "size" : 1, "init" : 0x1}, "slave_firefly_reset_b" : { "dir" : "out", "size" : 1, "init" : 0x1}, "slave_mgt_reset_all" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_mgt_reset_tx_pll_and_datapath" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_mgt_reset_rx_pll_and_datapath" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_mgt_reset_tx_datapath" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_mgt_reset_rx_datapath" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[phase_cdc40_rx_force]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[phase_cdc40_rx_calib]" : { "dir" : "out", "size" : 3, "init" : 0x0}, "slave_core_ctrl[phase_cdc40_tx_force]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[phase_cdc40_tx_calib]" : { "dir" : "out", "size" : 10, "init" : 0x0}, "slave_core_ctrl[rx_fec_corrected_clear]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_txpolarity]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxpolarity]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_loopback]" : { "dir" : "out", "size" : 3, "init" : 0x0}, "slave_core_ctrl[mgt_txprbsforceerr]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_txprbssel]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "slave_core_ctrl[mgt_rxprbscntreset]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxprbssel]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "slave_core_ctrl[mgt_drpwe]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_drpen]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_drpaddr]" : { "dir" : "out", "size" : 10, "init" : 0x0}, "slave_core_ctrl[mgt_drpdi]" : { "dir" : "out", "size" : 16, "init" : 0x0}, "slave_core_ctrl[mgt_hptd_tx_pi_phase_calib]" : { "dir" : "out", "size" : 7, "init" : 0x0}, "slave_core_ctrl[mgt_hptd_tx_ui_align_calib]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_hptd_ps_strobe]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_hptd_ps_inc_ndec]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_hptd_ps_phase_step]" : { "dir" : "out", "size" : 4, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxlpmgcovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxlpmhfovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxlpmlfklovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxlpmosovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxlpmen]" : { "dir" : "out", "size" : 1, "init" : 0x1}, "slave_core_ctrl[mgt_rxeq_rxdfelfovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxdfelpmreset]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxdfeutovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxdfevpovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxdfeagcovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0}, "slave_core_ctrl[mgt_rxeq_rxosovrden]" : { "dir" : "out", "size" : 1, "init" : 0x0} }