-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. -- -------------------------------------------------------------------------------- -- Tool Version: Vivado v.2018.3 (win64) Build 2405991 Thu Dec 6 23:38:27 MST 2018 -- Date : Sat Apr 18 12:30:30 2020 -- Host : baby running 64-bit major release (build 9200) -- Command : write_vhdl -force -mode synth_stub -- D:/Design_collection/ngFECv0x43d/ngFEC_new.srcs/sources_1/ip/gig_ethernet_pcs_pma_16_1/gig_ethernet_pcs_pma_16_1_stub.vhdl -- Design : gig_ethernet_pcs_pma_16_1 -- Purpose : Stub declaration of top-level module interface -- Device : xc7k420tffg1156-2 -- -------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; entity gig_ethernet_pcs_pma_16_1 is Port ( gtrefclk : in STD_LOGIC; gtrefclk_bufg : in STD_LOGIC; txp : out STD_LOGIC; txn : out STD_LOGIC; rxp : in STD_LOGIC; rxn : in STD_LOGIC; resetdone : out STD_LOGIC; cplllock : out STD_LOGIC; mmcm_reset : out STD_LOGIC; txoutclk : out STD_LOGIC; rxoutclk : out STD_LOGIC; userclk : in STD_LOGIC; userclk2 : in STD_LOGIC; rxuserclk : in STD_LOGIC; rxuserclk2 : in STD_LOGIC; pma_reset : in STD_LOGIC; mmcm_locked : in STD_LOGIC; independent_clock_bufg : in STD_LOGIC; gmii_txd : in STD_LOGIC_VECTOR ( 7 downto 0 ); gmii_tx_en : in STD_LOGIC; gmii_tx_er : in STD_LOGIC; gmii_rxd : out STD_LOGIC_VECTOR ( 7 downto 0 ); gmii_rx_dv : out STD_LOGIC; gmii_rx_er : out STD_LOGIC; gmii_isolate : out STD_LOGIC; configuration_vector : in STD_LOGIC_VECTOR ( 4 downto 0 ); status_vector : out STD_LOGIC_VECTOR ( 15 downto 0 ); reset : in STD_LOGIC; signal_detect : in STD_LOGIC; gt0_qplloutclk_in : in STD_LOGIC; gt0_qplloutrefclk_in : in STD_LOGIC ); end gig_ethernet_pcs_pma_16_1; architecture stub of gig_ethernet_pcs_pma_16_1 is attribute syn_black_box : boolean; attribute black_box_pad_pin : string; attribute syn_black_box of stub : architecture is true; attribute black_box_pad_pin of stub : architecture is "gtrefclk,gtrefclk_bufg,txp,txn,rxp,rxn,resetdone,cplllock,mmcm_reset,txoutclk,rxoutclk,userclk,userclk2,rxuserclk,rxuserclk2,pma_reset,mmcm_locked,independent_clock_bufg,gmii_txd[7:0],gmii_tx_en,gmii_tx_er,gmii_rxd[7:0],gmii_rx_dv,gmii_rx_er,gmii_isolate,configuration_vector[4:0],status_vector[15:0],reset,signal_detect,gt0_qplloutclk_in,gt0_qplloutrefclk_in"; attribute x_core_info : string; attribute x_core_info of stub : architecture is "gig_ethernet_pcs_pma_v16_1_5,Vivado 2018.3"; begin end;