library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.numeric_std.all; use work.ipbus.all; use work.ngFEC_pack.all; entity ngccm_tb is end ngccm_tb; architecture Behavior of ngccm_tb is signal reset : std_logic := '1'; signal fabric_clk : std_logic := '0'; signal fabric_clk_div2 : std_logic := '0'; signal QIE_RESET : std_logic := '0'; signal WTE : std_logic := '0'; signal TX_Word : std_logic_vector(83 downto 0); signal bcnt : std_logic_vector(11 downto 0); begin utt : ENTITY work.ngCCM ------------------------------------------------------------------------------ PORT MAP ( reset_IN => reset, reset_OUT => OPEN, reset_partition => (others => '0'), error_counter_reset_i => '0', ngccm_bkp_regs => open, TX_Clock_20MHz => fabric_clk_div2, RX_Clock_20MHz => '0', RX_wordCLK => '0', fabric_clk => fabric_clk, TX_Word_o => TX_WORD, RX_Word_i => (others => '0'), RX_Word_DV_i => '0', clk_6x_o => OPEN, sfp_rx_lost => '0', sfp_tx_fault => '0', QIE_RESET => QIE_RESET, WTE => WTE, ipb_clk_i => '0', ipb_miso => open, ipb_mosi => (others=>init_ipb_wbus), prescale => x"000000ff", TimeoutErrorCounter_o => open, TCK_counter => open, PRBS_rx_pattern_error_cnt_o => open, PRBS_rx_pattern_bitwise_error_cnt_o => open -- sfp_sda_i(0) => open, -- sfp_sda_i(1) => open, -- sfp_sda_o(0) => open, -- sfp_sda_o(1) => open, -- sfp_scl_i(0) => open, -- sfp_scl_i(1) => open, -- sfp_scl_o(0) => open, -- sfp_scl_o(1) => open ); fabric_clk <= not fabric_clk after 12.5ns; fabric_clk_div2 <= not bcnt(0); process(fabric_clk) begin if(fabric_clk'event and fabric_clk = '1')then -- fabric_clk_div2 <= not fabric_clk_div2; if(reset = '1' or bcnt = x"deb")then bcnt <= (others => '0'); else bcnt <= bcnt + 1; end if; if(bcnt = x"00a")then QIE_RESET <= '1'; else QIE_RESET <= '0'; end if; end if; end process; stim_proc: process begin -- hold reset state for 100 ns. wait for 150 ns; reset <= '0'; wait; end process; end Behavior;