Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. ------------------------------------------------------------------------------------------------------------------------------------------- | Tool Version : Vivado v.2018.3 (win64) Build 2405991 Thu Dec 6 23:38:27 MST 2018 | Date : Mon May 18 09:56:04 2020 | Host : baby running 64-bit major release (build 9200) | Command : report_power -file fc7_top_power_routed.rpt -pb fc7_top_power_summary_routed.pb -rpx fc7_top_power_routed.rpx | Design : fc7_top | Device : xc7k420tffg1156-2 | Design State : routed | Grade : commercial | Process : typical | Characterization : Production ------------------------------------------------------------------------------------------------------------------------------------------- Power Report Table of Contents ----------------- 1. Summary 1.1 On-Chip Components 1.2 Power Supply Summary 1.3 Confidence Level 2. Settings 2.1 Environment 2.2 Clock Constraints 3. Detailed Reports 3.1 By Hierarchy 1. Summary ---------- +--------------------------+--------------+ | Total On-Chip Power (W) | 7.356 | | Design Power Budget (W) | Unspecified* | | Power Budget Margin (W) | NA | | Dynamic (W) | 7.069 | | Device Static (W) | 0.287 | | Effective TJA (C/W) | 0.2 | | Max Ambient (C) | 83.8 | | Junction Temperature (C) | 26.2 | | Confidence Level | Low | | Setting File | --- | | Simulation Activity File | --- | | Design Nets Matched | NA | +--------------------------+--------------+ * Specify Design Power Budget using, set_operating_conditions -design_power_budget 1.1 On-Chip Components ---------------------- +-------------------------+-----------+----------+-----------+-----------------+ | On-Chip | Power (W) | Used | Available | Utilization (%) | +-------------------------+-----------+----------+-----------+-----------------+ | Clocks | 0.318 | 92 | --- | --- | | Slice Logic | 1.258 | 358780 | --- | --- | | LUT as Logic | 1.236 | 165979 | 260600 | 63.69 | | CARRY4 | 0.015 | 13330 | 74650 | 17.86 | | Register | 0.007 | 140575 | 521200 | 26.97 | | F7/F8 Muxes | <0.001 | 2275 | 298600 | 0.76 | | LUT as Shift Register | <0.001 | 181 | 108600 | 0.17 | | Others | 0.000 | 6273 | --- | --- | | Signals | 1.492 | 285969 | --- | --- | | Block RAM | 0.511 | 573 | 835 | 68.62 | | MMCM | 0.090 | 3 | 8 | 37.50 | | PLL | 0.135 | 1 | 8 | 12.50 | | I/O | 0.104 | 177 | 400 | 44.25 | | GTX | 3.161 | 13 | 32 | 40.63 | | Static Power | 0.287 | | | | | Total | 7.356 | | | | +-------------------------+-----------+----------+-----------+-----------------+ 1.2 Power Supply Summary ------------------------ +-----------+-------------+-----------+-------------+------------+ | Source | Voltage (V) | Total (A) | Dynamic (A) | Static (A) | +-----------+-------------+-----------+-------------+------------+ | Vccint | 1.000 | 3.909 | 3.780 | 0.128 | | Vccaux | 1.800 | 0.160 | 0.122 | 0.038 | | Vcco33 | 3.300 | 0.010 | 0.009 | 0.001 | | Vcco25 | 2.500 | 0.027 | 0.026 | 0.001 | | Vcco18 | 1.800 | 0.000 | 0.000 | 0.000 | | Vcco15 | 1.500 | 0.000 | 0.000 | 0.000 | | Vcco135 | 1.350 | 0.000 | 0.000 | 0.000 | | Vcco12 | 1.200 | 0.000 | 0.000 | 0.000 | | Vccaux_io | 1.800 | 0.000 | 0.000 | 0.000 | | Vccbram | 1.000 | 0.062 | 0.039 | 0.023 | | MGTAVcc | 1.000 | 1.529 | 1.519 | 0.011 | | MGTAVtt | 1.200 | 1.193 | 1.180 | 0.013 | | MGTVccaux | 1.800 | 0.000 | 0.000 | 0.000 | | Vccadc | 1.800 | 0.020 | 0.000 | 0.020 | +-----------+-------------+-----------+-------------+------------+ 1.3 Confidence Level -------------------- +-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+ | User Input Data | Confidence | Details | Action | +-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+ | Design implementation state | High | Design is routed | | | Clock nodes activity | High | User specified more than 95% of clocks | | | I/O nodes activity | Low | More than 75% of inputs are missing user specification | Provide missing input activity with simulation results or by editing the "By Resource Type -> I/Os" view | | Internal nodes activity | Medium | User specified less than 25% of internal nodes | Provide missing internal nodes activity with simulation results or by editing the "By Resource Type" views | | Device models | High | Device models are Production | | | | | | | | Overall confidence level | Low | | | +-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+ 2. Settings ----------- 2.1 Environment --------------- +-----------------------+-------------------------+ | Ambient Temp (C) | 25.0 | | ThetaJA (C/W) | 0.2 | | Airflow (LFM) | 0 | | Heat Sink | low (Low Profile) | | ThetaSA (C/W) | 2.4 | | Board Selection | Custom | | # of Board Layers | 16+ (16 or more Layers) | | Board Temperature (C) | 25.0 | +-----------------------+-------------------------+ 2.2 Clock Constraints --------------------- +------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+-----------------+ | Clock | Domain | Constraint (ns) | +------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+-----------------+ | clk125_ub | sys/clocks/clk125_ub | 8.0 | | clk62_5_ub | sys/clocks/clk62_5_ub | 16.0 | | clk_ipb_ub | sys/clocks/clk_ipb_ub | 32.0 | | clk_o_39_997 | ngFEC/dmdt_clk/mmcm2/U0/dmdt_phase_meas_clk | 25.0 | | clk_o_39_997_phase_mon_mmcm_2 | ngFEC/dmdt_clk/mmcm2/U0/clk_o_39_997_phase_mon_mmcm_2 | 25.0 | | clk_o_40_08_phase_mon_mmcm_1 | ngFEC/dmdt_clk/mmcm1/U0/clk_o_40_08_phase_mon_mmcm_1 | 24.9 | | clkfbout_phase_mon_mmcm_1 | ngFEC/dmdt_clk/mmcm1/U0/clkfbout_phase_mon_mmcm_1 | 49.9 | | clkfbout_phase_mon_mmcm_2 | ngFEC/dmdt_clk/mmcm2/U0/clkfbout_phase_mon_mmcm_2 | 74.7 | | fabric_clk | fabric_clk_p | 25.0 | | fabric_clk_FBOUT | ngFEC/fabric_clk_FBOUT | 25.0 | | fabric_clk_PSOUT | ngFEC/fabric_clk_PSOUT | 25.0 | | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[1].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[2].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[3].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[4].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/RXOUTCLK | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[4].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_rxoutclk_out | 8.3 | | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[4].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gtxe2_i/TXOUTCLK | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/gtxLatOpt_gen[4].xlx_k7v7_mgt_latopt_inst/U0/ngFEC_mgt_i/gt0_ngFEC_mgt_i/gt0_txoutclk_out | 8.3 | | osc125_a | osc125_a_p | 8.0 | | rxWordclkl12_1 | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/CLK | 8.2 | | rxWordclkl12_2 | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/bbstub_gt0_rxoutclk_out | 8.2 | | rxWordclkl12_3 | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/bbstub_gt0_rxoutclk_out_0 | 8.2 | | rxWordclkl12_4 | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/CLK | 8.2 | | rxWordclkl12_5 | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/bbstub_gt0_rxoutclk_out | 8.2 | | rxWordclkl12_6 | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/CLK | 8.2 | | rxWordclkl12_7 | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/bbstub_gt0_rxoutclk_out | 8.2 | | rxWordclkl12_8 | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/bbstub_gt0_rxoutclk_out_0 | 8.2 | | rxWordclkl8_1 | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/CLK | 8.2 | | rxWordclkl8_2 | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/bbstub_gt0_rxoutclk_out | 8.2 | | rxWordclkl8_3 | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/bbstub_gt0_rxoutclk_out_0 | 8.2 | | rxWordclkl8_4 | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/bbstub_gt0_rxoutclk_out_1 | 8.2 | | ttc_mgt_xpoint_a | ttc_mgt_xpoint_a_p | 8.3 | | ttc_mgt_xpoint_c | ttc_mgt_xpoint_c_p | 8.3 | | txWordclkl12_1 | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out | 8.2 | | txWordclkl12_2 | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out_0 | 8.2 | | txWordclkl12_3 | ngFEC/gbtbank1_l12_118/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out_1 | 8.2 | | txWordclkl12_4 | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out | 8.2 | | txWordclkl12_5 | ngFEC/gbtbank2_l12_117/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out_0 | 8.2 | | txWordclkl12_6 | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out | 8.2 | | txWordclkl12_7 | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out_0 | 8.2 | | txWordclkl12_8 | ngFEC/gbtbank3_l12_116/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out_1 | 8.2 | | txWordclkl8_1 | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out | 8.2 | | txWordclkl8_2 | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out_0 | 8.2 | | txWordclkl8_3 | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out_1 | 8.2 | | txWordclkl8_4 | ngFEC/gbtbank4_l8_112/gbt_inst/mgt_inst/bbstub_gt0_txoutclk_out_2 | 8.2 | +------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+-----------------+ 3. Detailed Reports ------------------- 3.1 By Hierarchy ---------------- +---------------------------------------+-----------+ | Name | Power (W) | +---------------------------------------+-----------+ | fc7_top | 7.069 | | fpga_config_data_IOBUF[0]_inst | 0.002 | | fpga_config_data_IOBUF[10]_inst | 0.002 | | fpga_config_data_IOBUF[11]_inst | 0.002 | | fpga_config_data_IOBUF[12]_inst | 0.002 | | fpga_config_data_IOBUF[13]_inst | 0.002 | | fpga_config_data_IOBUF[14]_inst | 0.002 | | fpga_config_data_IOBUF[15]_inst | 0.002 | | fpga_config_data_IOBUF[1]_inst | 0.002 | | fpga_config_data_IOBUF[2]_inst | 0.002 | | fpga_config_data_IOBUF[3]_inst | 0.002 | | fpga_config_data_IOBUF[4]_inst | 0.002 | | fpga_config_data_IOBUF[5]_inst | 0.002 | | fpga_config_data_IOBUF[6]_inst | 0.002 | | fpga_config_data_IOBUF[7]_inst | 0.002 | | fpga_config_data_IOBUF[8]_inst | 0.002 | | fpga_config_data_IOBUF[9]_inst | 0.002 | | ngFEC | 6.479 | | DTC | 0.006 | | Inst_TTC_decoder | 0.006 | | DTC_Counter | 0.001 | | SFP_GEN[10].ngCCM_gbt | 0.015 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[10].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[11].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[11].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[12].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[12].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[1].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[1].ngFEC_module | 0.061 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.004 | | bram_array[11].skip_SFP_SEC.RAM | 0.004 | | bram_array[12].skip_SFP_SEC.RAM | 0.004 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.004 | | bram_array[2].skip_SFP_SEC.RAM | 0.004 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[2].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[2].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[3].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[3].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[4].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[4].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[5].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[5].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[6].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[6].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[7].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[7].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[8].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[8].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | SFP_GEN[9].ngCCM_gbt | 0.014 | | LocalJTAGBridge_inst | 0.002 | | SFP_GEN[9].ngFEC_module | 0.058 | | bram_array[0].skip_SFP_SEC.RAM | 0.003 | | bram_array[10].skip_SFP_SEC.RAM | 0.003 | | bram_array[11].skip_SFP_SEC.RAM | 0.003 | | bram_array[12].skip_SFP_SEC.RAM | 0.003 | | bram_array[14].skip_SFP_SEC.RAM | 0.003 | | bram_array[15].skip_SFP_SEC.RAM | 0.003 | | bram_array[1].skip_SFP_SEC.RAM | 0.003 | | bram_array[2].skip_SFP_SEC.RAM | 0.003 | | bram_array[3].skip_SFP_SEC.RAM | 0.003 | | bram_array[4].skip_SFP_SEC.RAM | 0.003 | | bram_array[5].skip_SFP_SEC.RAM | 0.003 | | bram_array[6].skip_SFP_SEC.RAM | 0.003 | | bram_array[7].skip_SFP_SEC.RAM | 0.003 | | bram_array[8].skip_SFP_SEC.RAM | 0.003 | | bram_array[9].skip_SFP_SEC.RAM | 0.003 | | ctrl_regs_inst | 0.008 | | dmdt_meas | 0.002 | | gbtbank1_l12_118 | 1.371 | | gbt_inst | 1.369 | | gbtbank2_l12_117 | 0.914 | | gbt_inst | 0.913 | | gbtbank3_l12_116 | 1.384 | | gbt_inst | 1.382 | | gbtbank4_l8_112 | 1.800 | | gbt_inst | 1.797 | | stat_regs_inst | 0.001 | | sys | 0.489 | | clocks | 0.136 | | eth | 0.248 | | mac | 0.003 | | phy | 0.245 | | ipb | 0.080 | | trans | 0.042 | | udp_if | 0.038 | | uc_if | 0.009 | | uc_pipe_if | 0.005 | | uc_trans | 0.003 | +---------------------------------------+-----------+