# This file is automatically generated.
# It contains project source information necessary for synthesis and implementation.

# IP: D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/ttc_mgt/ttc_mgt.xci
# IP: The module: 'ttc_mgt' is the root of the design. Do not add the DONT_TOUCH constraint.

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/ttc_mgt/synth/ttc_mgt_ooc.xdc
# XDC: The top module name and the constraint reference have the same name: 'ttc_mgt'. Do not add the DONT_TOUCH constraint.
set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/ttc_mgt/synth/ttc_mgt.xdc
# XDC: The top module name and the constraint reference have the same name: 'ttc_mgt'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# IP: D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/ttc_mgt/ttc_mgt.xci
# IP: The module: 'ttc_mgt' is the root of the design. Do not add the DONT_TOUCH constraint.

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/ttc_mgt/synth/ttc_mgt_ooc.xdc
# XDC: The top module name and the constraint reference have the same name: 'ttc_mgt'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/ttc_mgt/synth/ttc_mgt.xdc
# XDC: The top module name and the constraint reference have the same name: 'ttc_mgt'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet