Device Usage Page (usage_statistics_webtalk.html)

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software_version_and_target_device
betaFALSE build_version3064766
date_generatedSat Mar 13 12:42:52 2021 os_platformWIN64
product_versionVivado v2020.2 (64-bit) project_id547eb004b26648509e84d8b4a9e677c6
project_iteration8 random_id7d231929b6a0526abd93eb4162ac00ab
registration_id174239099_207303394_210719486_840 route_designTRUE
target_devicexcku115 target_familykintexu
target_packageflva2104 target_speed-1
tool_flowVivado

user_environment
cpu_nameIntel(R) Xeon(R) CPU E5-1650 v4 @ 3.60GHz cpu_speed3592 MHz
os_nameWindows Server 2016 or Windows 10 os_releasemajor release (build 9200)
system_ram68.000 GB total_processors1

vivado_usage
gui_handlers
abstractsearchablepanel_show_search=15 addsrcwizard_specify_hdl_netlist_block_design=1 addsrcwizard_specify_simulation_specific_hdl_files=3 archiveprojectdialog_archive_name=9
archiveprojectdialog_choose_temporary_location=10 basedialog_cancel=63 basedialog_close=21 basedialog_ok=142
basedialog_yes=6 cmdmsgdialog_ok=19 commandsinput_type_tcl_command_here=1 confirmsavetexteditsdialog_cancel=1
confirmsavetexteditsdialog_no=1 createsrcfiledialog_file_name=1 expreporttreepanel_exp_report_tree_table=29 filesetpanel_file_set_panel_tree=668
flownavigatortreepanel_flow_navigator_tree=200 graphicalview_zoom_fit=11 graphicalview_zoom_in=153 graphicalview_zoom_out=92
gtwizardultrascaleconfigchannels_gen_setting_tree_table=75 hcodeeditor_search_text_combo_box=251 languagetemplatesdialog_templates_tree=23 logmonitor_monitor=1
logpanel_find=4 mainmenumgr_checkpoint=5 mainmenumgr_edit=2 mainmenumgr_export=1
mainmenumgr_file=64 mainmenumgr_ip=5 mainmenumgr_open_recent_project=28 mainmenumgr_project=33
mainmenumgr_simulation_waveform=5 mainmenumgr_text_editor=7 mainmenumgr_window=2 mainwinmenumgr_layout=2
msgtreepanel_message_view_tree=9 msgview_critical_warnings=2 msgview_error_messages=2 msgview_warning_messages=2
netlisttreeview_netlist_tree=8 openfileaction_ok=1 pacommandnames_add_sources=22 pacommandnames_archive_project=12
pacommandnames_auto_update_hier=18 pacommandnames_language_templates=1 pacommandnames_open_file=5 pacommandnames_open_ip_example_design=1
pacommandnames_project_summary=1 pacommandnames_set_as_top=17 pacommandnames_simulation_live_break=11 pacommandnames_simulation_live_restart=14
pacommandnames_simulation_live_run=81 pacommandnames_simulation_live_run_all=1 pacommandnames_simulation_run_behavioral=92 pacommandnames_src_replace_file=11
pacommandnames_upgrade_ip=4 paviews_code=89 paviews_par_report=10 paviews_project_summary=75
progressdialog_cancel=1 projectsummarydrcpanel_open_drc_report=2 projectsummaryutilizationpanel_project_summary_utilization_panel_tabbed=3 projecttab_close_design=1
rdicommands_copy=387 rdicommands_cut=58 rdicommands_delete=24 rdicommands_line_comment=117
rdicommands_paste=664 rdicommands_redo=107 rdicommands_reset_layout=1 rdicommands_save_file=268
rdicommands_save_file_as=5 rdicommands_undo=310 rdicommands_waveform_save_configuration=26 rdicommands_waveform_save_configuration_as=5
rdiviews_waveform_viewer=202 removesourcesdialog_also_delete=4 rungadget_show_error=1 rungadget_show_error_and_critical_warning_messages=8
rungadget_show_warning_and_error_messages_in_messages=10 saveprojectutils_cancel=2 saveprojectutils_dont_save=3 saveprojectutils_save=1
simpleoutputproductdialog_close_dialog_unsaved_changes_will=1 simpleoutputproductdialog_generate_output_products_immediately=22 simulationliverunforcomp_specify_time_and_units=20 simulationobjectspanel_simulation_objects_tree_table=147
simulationscopespanel_simulate_scope_table=80 srcchooserpanel_add_directories=4 srcchooserpanel_add_hdl_and_netlist_files_to_your_project=13 srcchooserpanel_create_file=3
srcmenu_ip_documentation=1 srcmenu_ip_hierarchy=19 statemonitor_reset_run=13 statemonitor_reset_step=2
syntheticastatemonitor_cancel=30 taskbanner_close=77 tclconsoleview_tcl_console_code_editor=4 touchpointsurveydialog_remind_me_later=6
touchpointsurveydialog_yes=1 vioresultstab_advisories=1 vioresultstab_warnings=1 waveformnametree_waveform_name_tree=175
waveformview_next_transition=560 waveformview_previous_transition=554
java_command_handlers
addsources=20 archiveproject=12 closeproject=4 editdelete=25
fileexit=1 openexistingreport=1 openfile=5 openipexampledesign=1
projectsummary=1 recustomizecore=37 resetlayout=1 runbitgen=13
runimplementation=50 runsynthesis=11 settopnode=17 showview=27
simulationbreak=11 simulationrestart=14 simulationrun=91 simulationrunall=1
simulationrunfortime=81 toolstemplates=21 updatesourcefiles=11 upgradeip=4
viewtaskimplementation=1 viewtasksynthesis=3 waveformsaveconfiguration=26 waveformsaveconfigurationas=5
other_data
guimode=104
project_data
constraintsetcount=1 core_container=false currentimplrun=impl_1 currentsynthesisrun=synth_1
default_library=xil_defaultlib designmode=RTL export_simulation_activehdl=21 export_simulation_ies=21
export_simulation_modelsim=21 export_simulation_questa=21 export_simulation_riviera=21 export_simulation_vcs=21
export_simulation_xsim=21 implstrategy=Vivado Implementation Defaults launch_simulation_activehdl=0 launch_simulation_ies=0
launch_simulation_modelsim=0 launch_simulation_questa=0 launch_simulation_riviera=0 launch_simulation_vcs=0
launch_simulation_xsim=111 simulator_language=Mixed srcsetcount=131 synthesisstrategy=Vivado Synthesis Defaults
target_language=VHDL target_simulator=XSim totalimplruns=5 totalsynthesisruns=5

unisim_transformation
post_unisim_transformation
bufg_gt=54 bufg_gt_sync=53 bufgce=8 bufgce_div=1
carry8=8810 dsp_a_b_data=1003 dsp_alu=1003 dsp_c_data=1003
dsp_m_data=1003 dsp_multiplier=1003 dsp_output=1003 dsp_preadd=1003
dsp_preadd_data=1003 fdce=189473 fdpe=19616 fdre=175167
fdse=5018 fifo36e2=1 gnd=15178 gthe3_channel=50
gthe3_common=1 ibufctrl=34 ibufds_gte3=6 inbuf=34
lut1=31876 lut2=66411 lut3=105244 lut4=101733
lut5=93218 lut6=151948 mmcme3_adv=2 muxf7=1057
obuf=10 obufds_gte3=1 obuft=18 ramb18e2=681
ramb36e2=1416 ramd64e=40 srl16e=127 srlc32e=44
vcc=14826
pre_unisim_transformation
bufg_gt=54 bufg_gt_sync=51 bufgce=8 bufgce_div=1
carry8=8810 dsp48e2=1003 fdce=189473 fdpe=19616
fdre=175167 fdse=5018 fifo36e2=1 gnd=15178
gthe3_channel=50 gthe3_common=1 ibuf=16 ibufds_gte3=6
iobuf=18 lut1=31876 lut2=66411 lut3=105244
lut4=101733 lut5=93218 lut6=151948 mmcme3_adv=2
muxf7=1057 obuf=10 obufds_gte3=1 ram64m8=4
ram64x1d=4 ramb18e2=681 ramb36e2=1416 srl16e=127
srlc32e=44 vcc=14826

phys_opt_design_post_place
command_line_options
-aggressive_hold_fix=default::[not_specified] -bram_register_opt=default::[not_specified] -clock_opt=default::[not_specified] -critical_cell_opt=default::[not_specified]
-critical_pin_opt=default::[not_specified] -directive=default::[not_specified] -dsp_register_opt=default::[not_specified] -effort_level=default::[not_specified]
-fanout_opt=default::[not_specified] -hold_fix=default::[not_specified] -insert_negative_edge_ffs=default::[not_specified] -multi_clock_opt=default::[not_specified]
-placement_opt=default::[not_specified] -restruct_opt=default::[not_specified] -retime=default::[not_specified] -rewire=default::[not_specified]
-shift_register_opt=default::[not_specified] -uram_register_opt=default::[not_specified] -verbose=default::[not_specified] -vhfn=default::[not_specified]

power_opt_design
command_line_options_spo
-cell_types=default::all -clocks=default::[not_specified] -exclude_cells=default::[not_specified] -include_cells=default::[not_specified]
usage
bram_ports_augmented=1 bram_ports_newly_gated=731 bram_ports_total=4194 flow_state=default
slice_registers_augmented=0 slice_registers_newly_gated=0 slice_registers_total=388136 srls_augmented=0
srls_newly_gated=0 srls_total=171

ip_statistics
aurora_64b66b_0_gt_gtwizard_top/1
c_channel_enable=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 c_common_scaling_factor=1 c_cpll_vco_frequency=2500.0 c_enable_common_usrclk=0
c_force_commons=0 c_freerun_frequency=50.0 c_gt_rev=17 c_gt_type=0
c_include_cpll_cal=2 c_locate_common=0 c_locate_in_system_ibert_core=2 c_locate_reset_controller=0
c_locate_rx_buffer_bypass_controller=0 c_locate_rx_user_clocking=1 c_locate_tx_buffer_bypass_controller=0 c_locate_tx_user_clocking=1
c_locate_user_data_width_sizing=0 c_pcie_coreclk_freq=250 c_pcie_enable=0 c_reset_controller_instance_ctrl=0
c_reset_sequence_interval=0 c_rx_buffbypass_mode=0 c_rx_buffer_bypass_instance_ctrl=0 c_rx_buffer_mode=1
c_rx_cb_disp=00000000 c_rx_cb_k=00000000 c_rx_cb_len_seq=1 c_rx_cb_max_level=1
c_rx_cb_num_seq=0 c_rx_cb_val=00000000000000000000000000000000000000000000000000000000000000000000000000000000 c_rx_cc_disp=00000000 c_rx_cc_enable=0
c_rx_cc_k=00000000 c_rx_cc_len_seq=1 c_rx_cc_num_seq=0 c_rx_cc_periodicity=5000
c_rx_cc_val=00000000000000000000000000000000000000000000000000000000000000000000000000000000 c_rx_comma_m_enable=0 c_rx_comma_m_val=1010000011 c_rx_comma_p_enable=0
c_rx_comma_p_val=0101111100 c_rx_data_decoding=2 c_rx_enable=1 c_rx_int_data_width=32
c_rx_line_rate=5.0 c_rx_master_channel_idx=96 c_rx_outclk_bufg_gt_div=1 c_rx_outclk_frequency=156.2500000
c_rx_outclk_source=1 c_rx_pll_type=2 c_rx_recclk_output=0x000000000000000000000000000000000000000000000000 c_rx_refclk_frequency=125
c_rx_slide_mode=0 c_rx_user_clocking_contents=0 c_rx_user_clocking_instance_ctrl=0 c_rx_user_clocking_ratio_fsrc_fusrclk=1
c_rx_user_clocking_ratio_fusrclk_fusrclk2=1 c_rx_user_clocking_source=0 c_rx_user_data_width=32 c_rx_usrclk2_frequency=156.2500000
c_rx_usrclk_frequency=156.2500000 c_secondary_qpll_enable=0 c_secondary_qpll_refclk_frequency=257.8125 c_sim_cpll_cal_bypass=1
c_total_num_channels=1 c_total_num_commons=0 c_total_num_commons_example=0 c_tx_buffbypass_mode=0
c_tx_buffer_bypass_instance_ctrl=0 c_tx_buffer_mode=1 c_tx_data_encoding=2 c_tx_enable=1
c_tx_int_data_width=32 c_tx_line_rate=5.0 c_tx_master_channel_idx=96 c_tx_outclk_bufg_gt_div=1
c_tx_outclk_frequency=156.2500000 c_tx_outclk_source=1 c_tx_pll_type=2 c_tx_refclk_frequency=125
c_tx_user_clocking_contents=0 c_tx_user_clocking_instance_ctrl=0 c_tx_user_clocking_ratio_fsrc_fusrclk=1 c_tx_user_clocking_ratio_fusrclk_fusrclk2=2
c_tx_user_clocking_source=0 c_tx_user_data_width=64 c_tx_usrclk2_frequency=78.125 c_tx_usrclk_frequency=156.2500000
c_txprogdiv_freq_enable=0 c_txprogdiv_freq_source=2 c_txprogdiv_freq_val=156.25 c_user_gtpowergood_delay_en=0
core_container=NA iptotal=1 x_ipcorerevision=9 x_iplanguage=VHDL
x_iplibrary=ip x_ipname=gtwizard_ultrascale x_ipproduct=Vivado 2020.2 x_ipsimlanguage=MIXED
x_ipvendor=xilinx.com x_ipversion=1.7
aurora_64b66b_v12_0_3/1
c_aurora_lanes=1 c_column_used=left c_gt_clock_1=GTHQ0 c_gt_clock_2=None
c_gt_loc_1=1 c_gt_loc_10=X c_gt_loc_11=X c_gt_loc_12=X
c_gt_loc_13=X c_gt_loc_14=X c_gt_loc_15=X c_gt_loc_16=X
c_gt_loc_17=X c_gt_loc_18=X c_gt_loc_19=X c_gt_loc_2=X
c_gt_loc_20=X c_gt_loc_21=X c_gt_loc_22=X c_gt_loc_23=X
c_gt_loc_24=X c_gt_loc_25=X c_gt_loc_26=X c_gt_loc_27=X
c_gt_loc_28=X c_gt_loc_29=X c_gt_loc_3=X c_gt_loc_30=X
c_gt_loc_31=X c_gt_loc_32=X c_gt_loc_33=X c_gt_loc_34=X
c_gt_loc_35=X c_gt_loc_36=X c_gt_loc_37=X c_gt_loc_38=X
c_gt_loc_39=X c_gt_loc_4=X c_gt_loc_40=X c_gt_loc_41=X
c_gt_loc_42=X c_gt_loc_43=X c_gt_loc_44=X c_gt_loc_45=X
c_gt_loc_46=X c_gt_loc_47=X c_gt_loc_48=X c_gt_loc_5=X
c_gt_loc_6=X c_gt_loc_7=X c_gt_loc_8=X c_gt_loc_9=X
c_gt_type=GTHE3 c_lane_width=4 c_line_rate=5.0 c_nfc=false
c_nfc_mode=IMM c_qpll=false c_refclk_frequency=125.0 c_simplex=false
c_simplex_mode=TX c_stream=true c_ufc=false c_user_k=false
core_container=false dataflow_config=Duplex flow_mode=None interface_mode=Streaming
iptotal=7
axi_chip2chip_v5_0_9/1
c_aurora_width=64 c_axi_addr_width=32 c_axi_brst_width=2 c_axi_bus_type=0
c_axi_data_width=32 c_axi_id_width=6 c_axi_len_width=8 c_axi_lite_addr_width=32
c_axi_lite_data_width=32 c_axi_lite_prot_width=2 c_axi_lite_resp_width=2 c_axi_lite_stb_width=4
c_axi_resp_width=2 c_axi_size_width=3 c_axi_stb_width=4 c_axi_wuser_width=4
c_common_clk=0 c_disable_clk_shift=0 c_disable_deskew=0 c_ecc_enable=1
c_en_axi_link_hndlr=0 c_en_legacy_mode=0 c_family=kintexu c_include_axilite=0
c_instance=axi_c2c c_interface_mode=0 c_interface_type=2 c_interrupt_width=4
c_master_fpga=0 c_num_of_io=20 c_selectio_phy_clk=100 c_simulation=0
c_use_diff_clk=0 c_use_diff_io=0 core_container=false iptotal=1
x_ipcorerevision=9 x_iplanguage=VHDL x_iplibrary=ip x_ipname=axi_chip2chip
x_ipproduct=Vivado 2020.2 x_ipsimlanguage=MIXED x_ipvendor=xilinx.com x_ipversion=5.0
fifo_generator_v13_2_5/1
c_add_ngc_constraint=0 c_application_type_axis=0 c_application_type_rach=0 c_application_type_rdch=0
c_application_type_wach=0 c_application_type_wdch=0 c_application_type_wrch=0 c_axi_addr_width=32
c_axi_aruser_width=1 c_axi_awuser_width=1 c_axi_buser_width=1 c_axi_data_width=64
c_axi_id_width=1 c_axi_len_width=8 c_axi_lock_width=1 c_axi_ruser_width=1
c_axi_type=1 c_axi_wuser_width=1 c_axis_tdata_width=8 c_axis_tdest_width=1
c_axis_tid_width=1 c_axis_tkeep_width=1 c_axis_tstrb_width=1 c_axis_tuser_width=4
c_axis_type=0 c_common_clock=0 c_count_type=0 c_data_count_width=9
c_default_value=BlankString c_din_width=72 c_din_width_axis=1 c_din_width_rach=32
c_din_width_rdch=64 c_din_width_wach=1 c_din_width_wdch=64 c_din_width_wrch=2
c_dout_rst_val=0 c_dout_width=72 c_en_safety_ckt=0 c_enable_rlocs=0
c_enable_rst_sync=1 c_error_injection_type=0 c_error_injection_type_axis=0 c_error_injection_type_rach=0
c_error_injection_type_rdch=0 c_error_injection_type_wach=0 c_error_injection_type_wdch=0 c_error_injection_type_wrch=0
c_family=kintexu c_full_flags_rst_val=0 c_has_almost_empty=0 c_has_almost_full=0
c_has_axi_aruser=0 c_has_axi_awuser=0 c_has_axi_buser=0 c_has_axi_id=0
c_has_axi_rd_channel=1 c_has_axi_ruser=0 c_has_axi_wr_channel=1 c_has_axi_wuser=0
c_has_axis_tdata=1 c_has_axis_tdest=0 c_has_axis_tid=0 c_has_axis_tkeep=0
c_has_axis_tlast=0 c_has_axis_tready=1 c_has_axis_tstrb=0 c_has_axis_tuser=1
c_has_backup=0 c_has_data_count=0 c_has_data_counts_axis=0 c_has_data_counts_rach=0
c_has_data_counts_rdch=0 c_has_data_counts_wach=0 c_has_data_counts_wdch=0 c_has_data_counts_wrch=0
c_has_int_clk=0 c_has_master_ce=0 c_has_meminit_file=0 c_has_overflow=1
c_has_prog_flags_axis=0 c_has_prog_flags_rach=0 c_has_prog_flags_rdch=0 c_has_prog_flags_wach=0
c_has_prog_flags_wdch=0 c_has_prog_flags_wrch=0 c_has_rd_data_count=0 c_has_rd_rst=0
c_has_rst=0 c_has_slave_ce=0 c_has_srst=1 c_has_underflow=1
c_has_valid=0 c_has_wr_ack=0 c_has_wr_data_count=0 c_has_wr_rst=0
c_implementation_type=6 c_implementation_type_axis=1 c_implementation_type_rach=1 c_implementation_type_rdch=1
c_implementation_type_wach=1 c_implementation_type_wdch=1 c_implementation_type_wrch=1 c_init_wr_pntr_val=0
c_interface_type=0 c_memory_type=4 c_mif_file_name=BlankString c_msgon_val=1
c_optimization_mode=0 c_overflow_low=0 c_power_saving_mode=0 c_preload_latency=2
c_preload_regs=1 c_prim_fifo_type=512x72 c_prim_fifo_type_axis=1kx18 c_prim_fifo_type_rach=512x36
c_prim_fifo_type_rdch=512x72 c_prim_fifo_type_wach=512x36 c_prim_fifo_type_wdch=512x72 c_prim_fifo_type_wrch=512x36
c_prog_empty_thresh_assert_val=8 c_prog_empty_thresh_assert_val_axis=1022 c_prog_empty_thresh_assert_val_rach=1022 c_prog_empty_thresh_assert_val_rdch=1022
c_prog_empty_thresh_assert_val_wach=1022 c_prog_empty_thresh_assert_val_wdch=1022 c_prog_empty_thresh_assert_val_wrch=1022 c_prog_empty_thresh_negate_val=9
c_prog_empty_type=1 c_prog_empty_type_axis=0 c_prog_empty_type_rach=0 c_prog_empty_type_rdch=0
c_prog_empty_type_wach=0 c_prog_empty_type_wdch=0 c_prog_empty_type_wrch=0 c_prog_full_thresh_assert_val=450
c_prog_full_thresh_assert_val_axis=1023 c_prog_full_thresh_assert_val_rach=1023 c_prog_full_thresh_assert_val_rdch=1023 c_prog_full_thresh_assert_val_wach=1023
c_prog_full_thresh_assert_val_wdch=1023 c_prog_full_thresh_assert_val_wrch=1023 c_prog_full_thresh_negate_val=449 c_prog_full_type=1
c_prog_full_type_axis=0 c_prog_full_type_rach=0 c_prog_full_type_rdch=0 c_prog_full_type_wach=0
c_prog_full_type_wdch=0 c_prog_full_type_wrch=0 c_rach_type=0 c_rd_data_count_width=9
c_rd_depth=512 c_rd_freq=1 c_rd_pntr_width=9 c_rdch_type=0
c_reg_slice_mode_axis=0 c_reg_slice_mode_rach=0 c_reg_slice_mode_rdch=0 c_reg_slice_mode_wach=0
c_reg_slice_mode_wdch=0 c_reg_slice_mode_wrch=0 c_select_xpm=0 c_synchronizer_stage=2
c_underflow_low=0 c_use_common_overflow=0 c_use_common_underflow=0 c_use_default_settings=0
c_use_dout_rst=1 c_use_ecc=0 c_use_ecc_axis=0 c_use_ecc_rach=0
c_use_ecc_rdch=0 c_use_ecc_wach=0 c_use_ecc_wdch=0 c_use_ecc_wrch=0
c_use_embedded_reg=1 c_use_fifo16_flags=0 c_use_fwft_data_count=0 c_use_pipeline_reg=0
c_valid_low=0 c_wach_type=0 c_wdch_type=0 c_wr_ack_low=0
c_wr_data_count_width=9 c_wr_depth=512 c_wr_depth_axis=1024 c_wr_depth_rach=16
c_wr_depth_rdch=1024 c_wr_depth_wach=16 c_wr_depth_wdch=1024 c_wr_depth_wrch=16
c_wr_freq=1 c_wr_pntr_width=9 c_wr_pntr_width_axis=10 c_wr_pntr_width_rach=4
c_wr_pntr_width_rdch=10 c_wr_pntr_width_wach=4 c_wr_pntr_width_wdch=10 c_wr_pntr_width_wrch=4
c_wr_response_latency=1 c_wrch_type=0 core_container=false iptotal=1
x_ipcorerevision=5 x_iplanguage=VHDL x_iplibrary=ip x_ipname=fifo_generator
x_ipproduct=Vivado 2020.2 x_ipsimlanguage=MIXED x_ipvendor=xilinx.com x_ipversion=13.2
mgt_ip_gtwizard_top/1
c_channel_enable=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 c_common_scaling_factor=1 c_cpll_vco_frequency=2404.716 c_enable_common_usrclk=0
c_force_commons=0 c_freerun_frequency=50 c_gt_rev=17 c_gt_type=0
c_include_cpll_cal=2 c_locate_common=0 c_locate_in_system_ibert_core=2 c_locate_reset_controller=0
c_locate_rx_buffer_bypass_controller=0 c_locate_rx_user_clocking=0 c_locate_tx_buffer_bypass_controller=0 c_locate_tx_user_clocking=1
c_locate_user_data_width_sizing=0 c_pcie_coreclk_freq=250 c_pcie_enable=0 c_reset_controller_instance_ctrl=0
c_reset_sequence_interval=0 c_rx_buffbypass_mode=0 c_rx_buffer_bypass_instance_ctrl=0 c_rx_buffer_mode=1
c_rx_cb_disp=00000000 c_rx_cb_k=00000000 c_rx_cb_len_seq=1 c_rx_cb_max_level=1
c_rx_cb_num_seq=0 c_rx_cb_val=00000000000000000000000000000000000000000000000000000000000000000000000000000000 c_rx_cc_disp=00000000 c_rx_cc_enable=0
c_rx_cc_k=00000000 c_rx_cc_len_seq=1 c_rx_cc_num_seq=0 c_rx_cc_periodicity=5000
c_rx_cc_val=00000000000000000000000000000000000000000000000000000000000000000000000000000000 c_rx_comma_m_enable=0 c_rx_comma_m_val=1010000011 c_rx_comma_p_enable=0
c_rx_comma_p_val=0101111100 c_rx_data_decoding=0 c_rx_enable=1 c_rx_int_data_width=20
c_rx_line_rate=2.404716 c_rx_master_channel_idx=8 c_rx_outclk_bufg_gt_div=1 c_rx_outclk_frequency=120.2358000
c_rx_outclk_source=1 c_rx_pll_type=2 c_rx_recclk_output=0x000000000000000000000000000000000000000000000000 c_rx_refclk_frequency=320.6288
c_rx_slide_mode=1 c_rx_user_clocking_contents=0 c_rx_user_clocking_instance_ctrl=0 c_rx_user_clocking_ratio_fsrc_fusrclk=1
c_rx_user_clocking_ratio_fusrclk_fusrclk2=1 c_rx_user_clocking_source=0 c_rx_user_data_width=20 c_rx_usrclk2_frequency=120.2358000
c_rx_usrclk_frequency=120.2358000 c_secondary_qpll_enable=0 c_secondary_qpll_refclk_frequency=257.8125 c_sim_cpll_cal_bypass=1
c_total_num_channels=1 c_total_num_commons=0 c_total_num_commons_example=0 c_tx_buffbypass_mode=0
c_tx_buffer_bypass_instance_ctrl=0 c_tx_buffer_mode=1 c_tx_data_encoding=0 c_tx_enable=1
c_tx_int_data_width=20 c_tx_line_rate=2.404716 c_tx_master_channel_idx=8 c_tx_outclk_bufg_gt_div=1
c_tx_outclk_frequency=120.2358000 c_tx_outclk_source=1 c_tx_pll_type=2 c_tx_refclk_frequency=320.6288
c_tx_user_clocking_contents=0 c_tx_user_clocking_instance_ctrl=0 c_tx_user_clocking_ratio_fsrc_fusrclk=1 c_tx_user_clocking_ratio_fusrclk_fusrclk2=1
c_tx_user_clocking_source=0 c_tx_user_data_width=20 c_tx_usrclk2_frequency=120.2358000 c_tx_usrclk_frequency=120.2358000
c_txprogdiv_freq_enable=0 c_txprogdiv_freq_source=2 c_txprogdiv_freq_val=120.2358 c_user_gtpowergood_delay_en=0
core_container=NA iptotal=48 x_ipcorerevision=9 x_iplanguage=VHDL
x_iplibrary=ip x_ipname=gtwizard_ultrascale x_ipproduct=Vivado 2020.2 x_ipsimlanguage=MIXED
x_ipvendor=xilinx.com x_ipversion=1.7
ttc_mgt_gtwizard_top/1
c_channel_enable=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 c_common_scaling_factor=1 c_cpll_vco_frequency=2578.125 c_enable_common_usrclk=0
c_force_commons=0 c_freerun_frequency=125 c_gt_rev=17 c_gt_type=0
c_include_cpll_cal=2 c_locate_common=0 c_locate_in_system_ibert_core=2 c_locate_reset_controller=1
c_locate_rx_buffer_bypass_controller=0 c_locate_rx_user_clocking=1 c_locate_tx_buffer_bypass_controller=0 c_locate_tx_user_clocking=1
c_locate_user_data_width_sizing=0 c_pcie_coreclk_freq=250 c_pcie_enable=0 c_reset_controller_instance_ctrl=0
c_reset_sequence_interval=0 c_rx_buffbypass_mode=0 c_rx_buffer_bypass_instance_ctrl=0 c_rx_buffer_mode=0
c_rx_cb_disp=00000000 c_rx_cb_k=00000000 c_rx_cb_len_seq=1 c_rx_cb_max_level=1
c_rx_cb_num_seq=0 c_rx_cb_val=00000000000000000000000000000000000000000000000000000000000000000000000000000000 c_rx_cc_disp=00000000 c_rx_cc_enable=0
c_rx_cc_k=00000000 c_rx_cc_len_seq=1 c_rx_cc_num_seq=0 c_rx_cc_periodicity=5000
c_rx_cc_val=00000000000000000000000000000000000000000000000000000000000000000000000000000000 c_rx_comma_m_enable=0 c_rx_comma_m_val=1010000011 c_rx_comma_p_enable=0
c_rx_comma_p_val=0101111100 c_rx_data_decoding=0 c_rx_enable=1 c_rx_int_data_width=32
c_rx_line_rate=10.260224 c_rx_master_channel_idx=99 c_rx_outclk_bufg_gt_div=1 c_rx_outclk_frequency=320.6320000
c_rx_outclk_source=1 c_rx_pll_type=1 c_rx_recclk_output=0x000000000000000000000000000000000000000000000000 c_rx_refclk_frequency=320.632
c_rx_slide_mode=1 c_rx_user_clocking_contents=0 c_rx_user_clocking_instance_ctrl=0 c_rx_user_clocking_ratio_fsrc_fusrclk=1
c_rx_user_clocking_ratio_fusrclk_fusrclk2=1 c_rx_user_clocking_source=0 c_rx_user_data_width=32 c_rx_usrclk2_frequency=320.6320000
c_rx_usrclk_frequency=320.6320000 c_secondary_qpll_enable=0 c_secondary_qpll_refclk_frequency=257.8125 c_sim_cpll_cal_bypass=1
c_total_num_channels=1 c_total_num_commons=1 c_total_num_commons_example=0 c_tx_buffbypass_mode=0
c_tx_buffer_bypass_instance_ctrl=0 c_tx_buffer_mode=1 c_tx_data_encoding=0 c_tx_enable=1
c_tx_int_data_width=32 c_tx_line_rate=10.260224 c_tx_master_channel_idx=99 c_tx_outclk_bufg_gt_div=1
c_tx_outclk_frequency=320.6320000 c_tx_outclk_source=2 c_tx_pll_type=0 c_tx_refclk_frequency=320.632
c_tx_user_clocking_contents=0 c_tx_user_clocking_instance_ctrl=0 c_tx_user_clocking_ratio_fsrc_fusrclk=1 c_tx_user_clocking_ratio_fusrclk_fusrclk2=1
c_tx_user_clocking_source=0 c_tx_user_data_width=32 c_tx_usrclk2_frequency=320.6320000 c_tx_usrclk_frequency=320.6320000
c_txprogdiv_freq_enable=0 c_txprogdiv_freq_source=0 c_txprogdiv_freq_val=320.632 c_user_gtpowergood_delay_en=0
core_container=NA iptotal=1 x_ipcorerevision=9 x_iplanguage=VHDL
x_iplibrary=ip x_ipname=gtwizard_ultrascale x_ipproduct=Vivado 2020.2 x_ipsimlanguage=MIXED
x_ipvendor=xilinx.com x_ipversion=1.7
xpm_cdc_gray/1
core_container=NA dest_sync_ff=3 init_sync_ff=1 iptotal=10
reg_output=0 sim_assert_chk=0 sim_lossless_gray_chk=0 version=0
width=9
xpm_cdc_single/1
core_container=NA dest_sync_ff=4 init_sync_ff=0 iptotal=2160
sim_assert_chk=0 src_input_reg=0 version=0
xpm_cdc_sync_rst/1
core_container=NA def_val=1'b0 dest_sync_ff=3 init=0
init_sync_ff=1 iptotal=10 sim_assert_chk=0 version=0
xpm_fifo_async/1
cascade_height=0 cdc_sync_stages=3 core_container=NA dout_reset_value=0
ecc_mode=no_ecc en_adv_feature_async=16'b0000011100000111 fifo_memory_type=block fifo_read_latency=0
fifo_write_depth=512 full_reset_value=1 iptotal=5 p_common_clock=0
p_ecc_mode=0 p_fifo_memory_type=2 p_read_mode=1 p_wakeup_time=2
prog_empty_thresh=10 prog_full_thresh=384 rd_data_count_width=9 read_data_width=41
read_mode=fwft related_clocks=0 sim_assert_chk=0 use_adv_features=0707
wakeup_time=0 wr_data_count_width=9 write_data_width=41
xpm_fifo_base/1
both_stages_valid=3 cascade_height=0 cdc_dest_sync_ff=3 common_clock=0
core_container=NA dout_reset_value=0 ecc_mode=0 en_adv_feature=16'b0000011100000111
en_ae=1'b0 en_af=1'b0 en_dvld=1'b0 en_of=1'b1
en_pe=1'b1 en_pf=1'b1 en_rdc=1'b1 en_uf=1'b1
en_wack=1'b0 en_wdc=1'b1 enable_ecc=0 fg_eq_asym_dout=1'b0
fifo_mem_type=2 fifo_memory_type=2 fifo_read_depth=512 fifo_read_latency=0
fifo_size=20992 fifo_write_depth=512 full_reset_value=1 full_rst_val=1'b1
invalid=0 iptotal=5 pe_thresh_adj=8 pe_thresh_max=507
pe_thresh_min=5 pf_thresh_adj=382 pf_thresh_max=507 pf_thresh_min=8
prog_empty_thresh=10 prog_full_thresh=384 rd_data_count_width=9 rd_dc_width_ext=10
rd_latency=2 rd_mode=1 rd_pntr_width=9 read_data_width=41
read_mode=1 read_mode_ll=1 related_clocks=0 remove_wr_rd_prot_logic=0
sim_assert_chk=0 stage1_valid=2 stage2_valid=1 use_adv_features=0707
version=0 wakeup_time=0 width_ratio=1 wr_data_count_width=9
wr_dc_width_ext=10 wr_depth_log=9 wr_pntr_width=9 wr_rd_ratio=0
wr_width_log=6 write_data_width=41
xpm_memory_base/1
write_data_width=41 addr_width_a=9 addr_width_b=9 auto_sleep_time=0
byte_write_width_a=32 byte_write_width_b=32 cascade_height=0 clocking_mode=1
core_container=NA ecc_mode=0 iptotal=1369 max_num_char=0
memory_optimization=true memory_primitive=2 memory_size=16384 memory_type=2
message_control=0 num_char_loc=0 p_ecc_mode=no_ecc p_enable_byte_write_a=0
p_enable_byte_write_b=0 p_max_depth_data=512 p_memory_opt=yes p_memory_primitive=block
p_min_width_data=32 p_min_width_data_a=32 p_min_width_data_b=32 p_min_width_data_ecc=32
p_min_width_data_ldw=4 p_min_width_data_shft=32 p_num_cols_write_a=1 p_num_cols_write_b=1
p_num_rows_read_a=1 p_num_rows_read_b=1 p_num_rows_write_a=1 p_num_rows_write_b=1
p_sdp_write_mode=yes p_width_addr_lsb_read_a=0 p_width_addr_lsb_read_b=0 p_width_addr_lsb_write_a=0
p_width_addr_lsb_write_b=0 p_width_addr_read_a=9 p_width_addr_read_b=9 p_width_addr_write_a=9
p_width_addr_write_b=9 p_width_col_write_a=32 p_width_col_write_b=32 read_data_width_a=32
read_data_width_b=32 read_latency_a=1 read_latency_b=1 read_reset_value_a=00000000
read_reset_value_b=0 rst_mode_a=SYNC rst_mode_b=SYNC rsta_loop_iter=32
rstb_loop_iter=32 sim_assert_chk=0 use_embedded_constraint=0 use_mem_init=1
use_mem_init_mmi=0 version=0 wakeup_time=0 write_data_width_a=32
write_data_width_b=32 write_mode_a=2 write_mode_b=2 write_protect=1
xpm_memory_sdpram/1
write_protect=1 addr_width_a=9 addr_width_b=9 auto_sleep_time=0
byte_write_width_a=32 cascade_height=0 clocking_mode=common_clock core_container=NA
ecc_mode=no_ecc iptotal=681 memory_optimization=true memory_primitive=block
memory_size=16384 message_control=0 p_clocking_mode=0 p_ecc_mode=0
p_memory_optimization=1 p_memory_primitive=2 p_wakeup_time=0 p_write_mode_b=2
read_data_width_b=32 read_latency_b=1 read_reset_value_b=0 rst_mode_a=SYNC
rst_mode_b=SYNC sim_assert_chk=0 use_embedded_constraint=0 use_mem_init=1
use_mem_init_mmi=0 wakeup_time=disable_sleep write_data_width_a=32 write_mode_b=no_change
write_protect=1
xpm_memory_tdpram/1
write_protect=1 addr_width_a=9 addr_width_b=9 auto_sleep_time=0
byte_write_width_a=32 byte_write_width_b=32 cascade_height=0 clocking_mode=independent_clock
core_container=NA ecc_mode=no_ecc iptotal=683 memory_optimization=true
memory_primitive=block memory_size=16384 message_control=0 p_clocking_mode=1
p_ecc_mode=0 p_memory_optimization=1 p_memory_primitive=2 p_wakeup_time=0
p_write_mode_a=2 p_write_mode_b=2 read_data_width_a=32 read_data_width_b=32
read_latency_a=1 read_latency_b=1 read_reset_value_a=00000000 read_reset_value_b=0
rst_mode_a=SYNC rst_mode_b=SYNC sim_assert_chk=0 use_embedded_constraint=0
use_mem_init=1 use_mem_init_mmi=0 wakeup_time=disable_sleep write_data_width_a=32
write_data_width_b=32 write_mode_a=no_change write_mode_b=no_change write_protect=1

report_drc
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -internal=default::[not_specified] -internal_only=default::[not_specified] -max_msgs_per_check=default::[not_specified]
-messages=default::[not_specified] -name=default::[not_specified] -no_waivers=default::[not_specified] -return_string=default::[not_specified]
-ruledecks=default::[not_specified] -upgrade_cw=default::[not_specified] -waived=default::[not_specified]
results
aval-155=382 aval-156=382 cfgbvs-1=1 dpip-2=1523
dpop-3=249 dpreg-7=478 iobusslrc-1=6 reqp-1669=2
reqp-1671=139 reqp-1673=2 reqp-1675=139 reqp-1678=386
reqp-1680=130 reqp-1681=11 reqp-1934=681 rtstat-10=1

report_methodology
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -messages=default::[not_specified] -name=default::[not_specified] -return_string=default::[not_specified]
-slack_lesser_than=default::[not_specified] -waived=default::[not_specified]
results
aval-324=1 clkc-27=1 clkc-29=2 clkc-55=2
dpir-2=4097 lutar-1=496 synth-11=218 synth-12=384
synth-13=9 timing-10=1 timing-18=44 timing-2=6
timing-24=11 timing-3=1 timing-4=6 timing-47=1
timing-6=3 timing-7=3 timing-9=1 ulmtcs-1=1
xdcb-1=2

report_power
command_line_options
-advisory=default::[not_specified] -append=default::[not_specified] -file=[specified] -format=default::text
-hier=default::power -hierarchical_depth=default::4 -l=default::[not_specified] -name=default::[not_specified]
-no_propagation=default::[not_specified] -return_string=default::[not_specified] -rpx=[specified] -verbose=default::[not_specified]
-vid=default::[not_specified] -xpe=default::[not_specified]
usage
airflow=250 (LFM) ambient_temp=25.0 (C) bi-dir_toggle=12.500000 bidir_output_enable=1.000000
board_layers=12to15 (12 to 15 Layers) board_selection=medium (10"x10") bram=2.221216 clocks=1.039772
confidence_level_clock_activity=High confidence_level_design_state=High confidence_level_device_models=High confidence_level_internal_activity=Medium
confidence_level_io_activity=Low confidence_level_overall=Low customer=TBD customer_class=TBD
devstatic=1.930606 die=xcku115-flva2104-1-c dsp=0.412273 dsp_output_toggle=12.500000
dynamic=19.927974 effective_thetaja=0.81 enable_probability=0.990000 family=kintexu
ff_toggle=12.500000 flow_state=routed gth=8.697069 heatsink=medium (Medium Profile)
i/o=0.052187 input_toggle=12.500000 junction_temp=42.6 (C) logic=3.504628
mgtavcc_dynamic_current=4.535937 mgtavcc_static_current=0.117085 mgtavcc_total_current=4.653022 mgtavcc_voltage=1.000000
mgtavtt_dynamic_current=2.876179 mgtavtt_static_current=0.135381 mgtavtt_total_current=3.011560 mgtavtt_voltage=1.200000
mgtvccaux_dynamic_current=0.013366 mgtvccaux_static_current=0.000186 mgtvccaux_total_current=0.013552 mgtvccaux_voltage=1.800000
mgtyavcc_dynamic_current=0.000000 mgtyavcc_static_current=0.000000 mgtyavcc_total_current=0.000000 mgtyavcc_voltage=1.000000
mgtyavtt_dynamic_current=0.000000 mgtyavtt_static_current=0.000000 mgtyavtt_total_current=0.000000 mgtyavtt_voltage=1.200000
mgtyvccaux_dynamic_current=0.000000 mgtyvccaux_static_current=0.000000 mgtyvccaux_total_current=0.000000 mgtyvccaux_voltage=1.800000
mmcm=0.127209 netlist_net_matched=NA off-chip_power=0.000000 on-chip_power=21.858580
output_enable=1.000000 output_load=5.000000 output_toggle=12.500000 package=flva2104
pct_clock_constrained=543.000000 pct_inputs_defined=0 platform=nt64 process=typical
ram_enable=50.000000 ram_write=50.000000 read_saif=False set/reset_probability=0.000000
signal_rate=False signals=3.873619 simulation_file=None speedgrade=-1
static_prob=False temp_grade=commercial thetajb=1.7 (C/W) thetasa=1.2 (C/W)
toggle_rate=False user_board_temp=25.0 (C) user_effective_thetaja=0.81 user_junc_temp=42.6 (C)
user_thetajb=1.7 (C/W) user_thetasa=1.2 (C/W) vccadc_dynamic_current=0.000000 vccadc_static_current=0.027600
vccadc_total_current=0.027600 vccadc_voltage=1.800000 vccaux_dynamic_current=0.070406 vccaux_io_dynamic_current=0.006948
vccaux_io_static_current=0.162504 vccaux_io_total_current=0.169451 vccaux_io_voltage=1.800000 vccaux_static_current=0.252372
vccaux_total_current=0.322777 vccaux_voltage=1.800000 vccbram_dynamic_current=0.082732 vccbram_static_current=0.103093
vccbram_total_current=0.185826 vccbram_voltage=0.950000 vccint_dynamic_current=12.272684 vccint_io_dynamic_current=0.003627
vccint_io_static_current=0.062377 vccint_io_total_current=0.066004 vccint_io_voltage=0.950000 vccint_static_current=0.733307
vccint_total_current=13.005991 vccint_voltage=0.950000 vcco10_dynamic_current=0.000000 vcco10_static_current=0.000000
vcco10_total_current=0.000000 vcco10_voltage=1.000000 vcco12_dynamic_current=0.000000 vcco12_static_current=0.000000
vcco12_total_current=0.000000 vcco12_voltage=1.200000 vcco135_dynamic_current=0.000000 vcco135_static_current=0.000000
vcco135_total_current=0.000000 vcco135_voltage=1.350000 vcco15_dynamic_current=0.000000 vcco15_static_current=0.000000
vcco15_total_current=0.000000 vcco15_voltage=1.500000 vcco18_dynamic_current=0.020052 vcco18_static_current=0.000085
vcco18_total_current=0.020137 vcco18_voltage=1.800000 vcco25_dynamic_current=0.000000 vcco25_static_current=0.000000
vcco25_total_current=0.000000 vcco25_voltage=2.500000 vcco33_dynamic_current=0.000043 vcco33_static_current=0.000085
vcco33_total_current=0.000129 vcco33_voltage=3.300000 version=2020.2

report_utilization
io_standard
analog=0 blvds_25=0 diff_hstl_i=0 diff_hstl_i_12=0
diff_hstl_i_18=1 diff_hstl_i_dci=0 diff_hstl_i_dci_12=0 diff_hstl_i_dci_18=0
diff_hstl_ii=0 diff_hstl_ii_18=0 diff_hsul_12=0 diff_hsul_12_dci=0
diff_pod10=0 diff_pod10_dci=0 diff_pod12=0 diff_pod12_dci=0
diff_sstl12=0 diff_sstl12_dci=0 diff_sstl135=0 diff_sstl135_dci=0
diff_sstl135_r=0 diff_sstl15=0 diff_sstl15_dci=0 diff_sstl15_r=0
diff_sstl18_i=0 diff_sstl18_i_dci=0 diff_sstl18_ii=0 hslvdci_15=0
hslvdci_18=0 hstl_i=0 hstl_i_12=0 hstl_i_18=0
hstl_i_dci=0 hstl_i_dci_12=0 hstl_i_dci_18=0 hstl_ii=0
hstl_ii_18=0 hsul_12=0 hsul_12_dci=0 lvcmos12=0
lvcmos15=0 lvcmos18=1 lvcmos25=0 lvcmos33=0
lvdci_15=0 lvdci_18=0 lvds=0 lvds_25=0
lvpecl=0 lvttl=1 mini_lvds_25=0 pod10=0
pod10_dci=0 pod12=0 pod12_dci=0 ppds_25=0
rsds_25=0 slvs_400_18=0 slvs_400_25=0 sstl12=0
sstl12_dci=0 sstl135=0 sstl135_dci=0 sstl135_r=0
sstl15=0 sstl15_dci=0 sstl15_r=0 sstl18_i=0
sstl18_i_dci=0 sstl18_ii=0 sub_lvds=0 tmds_33=0
primitives
bufg_gt_functional_category=Clock bufg_gt_sync_functional_category=Clock bufg_gt_sync_used=53 bufg_gt_used=54
bufgce_div_functional_category=Clock bufgce_div_used=1 bufgce_functional_category=Clock bufgce_used=10
carry8_functional_category=CLB carry8_used=8780 dsp48e2_functional_category=Arithmetic dsp48e2_used=1003
fdce_functional_category=Register fdce_used=189469 fdpe_functional_category=Register fdpe_used=19616
fdre_functional_category=Register fdre_used=174334 fdse_functional_category=Register fdse_used=4908
fifo36e2_functional_category=BLOCKRAM fifo36e2_used=1 gthe3_channel_functional_category=Advanced gthe3_channel_used=50
gthe3_common_functional_category=Advanced gthe3_common_used=1 ibufctrl_functional_category=Others ibufctrl_used=34
ibufds_gte3_functional_category=Advanced ibufds_gte3_used=6 inbuf_functional_category=I/O inbuf_used=34
lut1_functional_category=CLB lut1_used=26956 lut2_functional_category=CLB lut2_used=65950
lut3_functional_category=CLB lut3_used=105566 lut4_functional_category=CLB lut4_used=101282
lut5_functional_category=CLB lut5_used=93038 lut6_functional_category=CLB lut6_used=151749
mmcme3_adv_functional_category=Clock mmcme3_adv_used=2 muxf7_functional_category=CLB muxf7_used=1057
obuf_functional_category=I/O obuf_used=10 obufds_gte3_functional_category=Advanced obufds_gte3_used=1
obuft_functional_category=I/O obuft_used=18 ramb18e2_functional_category=BLOCKRAM ramb18e2_used=681
ramb36e2_functional_category=BLOCKRAM ramb36e2_used=1416 ramd64e_functional_category=CLB ramd64e_used=40
srl16e_functional_category=CLB srl16e_used=164 srlc32e_functional_category=CLB srlc32e_used=7

synthesis
command_line_options
-assert=default::[not_specified] -bufg=default::12 -cascade_dsp=default::auto -constrset=default::[not_specified]
-control_set_opt_threshold=default::auto -debug_log=default::[not_specified] -directive=default::default -fanout_limit=default::10000
-flatten_hierarchy=default::rebuilt -fsm_extraction=default::auto -gated_clock_conversion=default::off -generic=default::[not_specified]
-include_dirs=default::[not_specified] -keep_equivalent_registers=default::[not_specified] -lint=default::[not_specified] -max_bram=default::-1
-max_bram_cascade_height=default::-1 -max_dsp=default::-1 -max_uram=default::-1 -max_uram_cascade_height=default::-1
-mode=default::default -name=default::[not_specified] -no_lc=default::[not_specified] -no_srlextract=default::[not_specified]
-no_timing_driven=default::[not_specified] -os=default::[not_specified] -part=xcku115-flva2104-1-c -resource_sharing=default::auto
-retiming=default::[not_specified] -rtl=default::[not_specified] -rtl_skip_constraints=default::[not_specified] -rtl_skip_ip=default::[not_specified]
-seu_protect=default::none -sfcu=default::[not_specified] -shreg_min_size=default::3 -top=ngFEC_top
-verilog_define=default::[not_specified]
usage
elapsed=00:51:11s hls_ip=0 memory_gain=6958.551MB memory_peak=7969.586MB

xsim
command_line_options
-sim_mode=default::behavioral -sim_type=default::