Q Command: %s 53* vivadotcl2 place_design2default:defaultZ4-113hpx  @Attempting to get a license for feature '%s' and/or device '%s' 308*common2" Implementation2default:default2 xcku1152default:defaultZ17-347hpx  0Got license for feature '%s' and/or device '%s' 310*common2" Implementation2default:default2 xcku1152default:defaultZ17-349hpx  The version limit for your license is '%s' and has expired for new software. A version limit expiration means that, although you may be able to continue to use the current version of tools or IP with this license, you will not be eligible for any updates or new releases. 719*common2 2021.012default:defaultZ17-1540hpx P Running DRC with %s threads 24*drc2 22default:defaultZ23-27hpx V DRC finished with %s 79* vivadotcl2 0 Errors2default:defaultZ4-198hpx e BPlease refer to the DRC report (report_drc) for more information. 80* vivadotclZ4-199hpx p ,Running DRC as a precondition to command %s 22* vivadotcl2 place_design2default:defaultZ4-22hpx P Running DRC with %s threads 24*drc2 22default:defaultZ23-27hpx V DRC finished with %s 79* vivadotcl2 0 Errors2default:defaultZ4-198hpx e BPlease refer to the DRC report (report_drc) for more information. 80* vivadotclZ4-199hpx U  Starting %s Task 103* constraints2 Placer2default:defaultZ18-103hpx } BMultithreading enabled for place_design using a maximum of %s CPUs12* placeflow2 22default:defaultZ30-611hpx v Phase %s%s 101* constraints2 1 2default:default2) Placer Initialization2default:defaultZ18-101hpx  Phase %s%s 101* constraints2 1.1 2default:default29 %Placer Initialization Netlist Sorting2default:defaultZ18-101hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:012default:default2 00:00:00.4202default:default2 13867.9492default:default2 0.0002default:defaultZ17-268hp x  Z EPhase 1.1 Placer Initialization Netlist Sorting | Checksum: 90841470 *commonhpx   %s * constraints2t `Time (s): cpu = 00:00:01 ; elapsed = 00:00:00.724 . Memory (MB): peak = 13867.949 ; gain = 0.0002default:defaulthpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:002default:default2 00:00:00.4272default:default2 13867.9492default:default2 0.0002default:defaultZ17-268hp x   Phase %s%s 101* constraints2 1.2 2default:default2F 2IO Placement/ Clock Placement/ Build Placer Device2default:defaultZ18-101hpx h SPhase 1.2 IO Placement/ Clock Placement/ Build Placer Device | Checksum: 170987bc2 *commonhpx   %s * constraints2p \Time (s): cpu = 00:02:02 ; elapsed = 00:01:31 . Memory (MB): peak = 13867.949 ; gain = 0.0002default:defaulthpx } Phase %s%s 101* constraints2 1.3 2default:default2. Build Placer Netlist Model2default:defaultZ18-101hpx P ;Phase 1.3 Build Placer Netlist Model | Checksum: 1f41bb22d *commonhpx   %s * constraints2q ]Time (s): cpu = 00:09:16 ; elapsed = 00:06:22 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx z Phase %s%s 101* constraints2 1.4 2default:default2+ Constrain Clocks/Macros2default:defaultZ18-101hpx M 8Phase 1.4 Constrain Clocks/Macros | Checksum: 1f41bb22d *commonhpx   %s * constraints2q ]Time (s): cpu = 00:09:18 ; elapsed = 00:06:24 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx I 4Phase 1 Placer Initialization | Checksum: 1f41bb22d *commonhpx   %s * constraints2q ]Time (s): cpu = 00:09:24 ; elapsed = 00:06:31 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx q Phase %s%s 101* constraints2 2 2default:default2$ Global Placement2default:defaultZ18-101hpx p Phase %s%s 101* constraints2 2.1 2default:default2! Floorplanning2default:defaultZ18-101hpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx C .Phase 2.1 Floorplanning | Checksum: 182a4d8c3 *commonhpx   %s * constraints2q ]Time (s): cpu = 00:11:55 ; elapsed = 00:08:08 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx  Phase %s%s 101* constraints2 2.2 2default:default25 !Update Timing before SLR Path Opt2default:defaultZ18-101hpx W BPhase 2.2 Update Timing before SLR Path Opt | Checksum: 1971af5e3 *commonhpx   %s * constraints2q ]Time (s): cpu = 00:13:18 ; elapsed = 00:08:58 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx x Phase %s%s 101* constraints2 2.3 2default:default2) Global Placement Core2default:defaultZ18-101hpx  %s* constraints2 lSLR(matching) [0-1] 12 11 15 81 522 1440 1049 83 52 16 7 0 Total: 3288 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 20 13 29 30 984 895 1014 267 12 10 4 10 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 14 22 14 21 966 937 1113 174 6 6 10 5 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 11 22 19 20 820 1062 1245 58 8 9 5 9 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 11 22 19 19 792 1116 1227 51 8 9 5 9 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 12 21 19 19 753 1142 1244 47 8 7 6 10 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 13 18 18 11 722 1190 1246 41 8 4 11 6 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 9 18 18 14 716 1204 1240 38 8 8 6 9 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 14 17 12 15 702 1197 1265 40 7 4 9 6 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 13 20 14 19 683 1162 1309 46 8 5 4 5 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 12 21 19 16 686 1114 1339 50 8 8 6 9 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 13 20 14 14 684 1086 1382 44 8 8 9 6 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 12 21 18 17 792 960 1388 49 8 8 6 9 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 20 13 22 64 881 850 1285 125 6 10 12 0 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 15 25 21 94 816 836 1040 387 38 8 6 2 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 20 34 66 164 827 746 888 445 77 4 11 6 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 28 25 141 123 741 820 836 352 181 28 7 6 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 45 29 139 137 735 801 797 294 252 38 18 3 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 44 17 144 136 736 776 811 298 228 62 30 6 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 44 17 128 145 747 736 820 293 244 66 41 7 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 47 44 108 173 800 657 843 313 187 56 56 4 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 47 46 113 217 782 632 806 294 237 55 48 11 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 50 57 116 232 797 575 812 284 239 60 52 14 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 62 40 114 236 828 571 789 294 235 60 47 12 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 68 52 89 235 813 562 788 324 228 63 52 14 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 70 51 92 235 821 582 772 303 233 67 48 14 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 72 44 97 224 815 607 749 289 254 80 45 12 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 74 49 94 254 811 592 751 299 221 84 47 12 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 76 44 110 244 814 588 761 272 238 80 49 12 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 75 50 96 242 832 583 750 307 212 82 44 15 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 45 101 240 815 591 753 308 211 82 47 14 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 76 47 101 245 827 580 750 293 213 93 47 16 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 84 43 100 253 830 570 748 286 214 100 48 12 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 85 51 94 257 813 576 749 280 235 86 49 13 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 48 98 257 827 571 756 264 233 87 53 13 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 78 47 94 246 828 582 761 289 192 105 52 14 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 76 49 92 252 822 589 761 277 210 102 44 14 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 78 47 104 235 837 572 766 263 227 101 45 13 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 76 44 99 249 826 576 764 277 213 109 41 14 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 46 103 243 820 575 765 288 211 96 48 12 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 78 49 97 246 828 564 773 281 222 87 50 13 Total: 3288 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 76 50 92 265 813 578 759 282 222 89 49 13 Total: 3288 2default:defaulthpx  Phase %s%s 101* constraints2 2.3.1 2default:default20 Physical Synthesis In Placer2default:defaultZ18-101hpx  FFound %s LUTNM shape to break, %s LUT instances to create LUTNM shape 553*physynth2 82default:default2 144692default:defaultZ32-1035hpx  YBreak lutnm for timing: one critical %s, two critical %s, total %s, new lutff created %s 561*physynth2 62default:default2 22default:default2 82default:default2 02default:defaultZ32-1044hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 12default:default2 63172default:default2! nets or cells2default:default2 82default:default2 cells2default:default2 63092default:default2 cells2default:default2 02default:default2 cell2default:defaultZ32-775hpx  =Pass %s. Identified %s candidate %s for fanout optimization. 76*physynth2 12default:default2 102default:default2 nets2default:defaultZ32-76hpx  'Processed net %s. Replicated %s times. 81*physynth2@ i_AXI4_to_ipbus/Q[8]i_AXI4_to_ipbus/Q[8]2default:default2 122default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2B i_AXI4_to_ipbus/Q[12]i_AXI4_to_ipbus/Q[12]2default:default2 152default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2@ i_AXI4_to_ipbus/Q[9]i_AXI4_to_ipbus/Q[9]2default:default2 72default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2j )i_AXI4_to_ipbus/ipb_mosi[0][ipb_addr][18])i_AXI4_to_ipbus/ipb_mosi[0][ipb_addr][18]2default:default2 122default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2B i_AXI4_to_ipbus/Q[13]i_AXI4_to_ipbus/Q[13]2default:default2 152default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2B i_AXI4_to_ipbus/Q[10]i_AXI4_to_ipbus/Q[10]2default:default2 72default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2j )i_AXI4_to_ipbus/ipb_mosi[0][ipb_addr][11])i_AXI4_to_ipbus/ipb_mosi[0][ipb_addr][11]2default:default2 202default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2j )i_AXI4_to_ipbus/ipb_mosi[0][ipb_addr][19])i_AXI4_to_ipbus/ipb_mosi[0][ipb_addr][19]2default:default2 132default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2j )i_AXI4_to_ipbus/ipb_mosi[0][ipb_addr][26])i_AXI4_to_ipbus/ipb_mosi[0][ipb_addr][26]2default:default2 122default:default8Z32-81hpx  'Processed net %s. Replicated %s times. 81*physynth2( TX_CLKENTX_CLKEN2default:default2 682default:default8Z32-81hpx  $Optimized %s %s. Created %s new %s. 216*physynth2 102default:default2 nets2default:default2 1812default:default2 instances2default:defaultZ32-232hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 12default:default2 102default:default2! nets or cells2default:default2 1812default:default2 cells2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:102default:default2 00:00:102default:default2 13929.0942default:default2 0.0002default:defaultZ17-268hp x   =Pass %s. Identified %s candidate %s for fanout optimization. 76*physynth2 12default:default2 12default:default2 net2default:defaultZ32-76hpx  'Processed net %s. Replicated %s times. 81*physynth2< stat_regs_inst/weastat_regs_inst/wea2default:default2 92default:default8Z32-81hpx  $Optimized %s %s. Created %s new %s. 216*physynth2 12default:default2 net2default:default2 92default:default2 instances2default:defaultZ32-232hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 12default:default2 12default:default2 net or cell2default:default2 92default:default2 cells2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:012default:default2 00:00:00.6592default:default2 13929.0942default:default2 0.0002default:defaultZ17-268hp x   DNet %s could not be optimized because driver %s could not be cloned 117*physynth2 wSFP_GEN[45].ngFEC_module/bram_array[11].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2_n_0wSFP_GEN[45].ngFEC_module/bram_array[11].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2_n_02default:default2 sSFP_GEN[45].ngFEC_module/bram_array[11].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2 sSFP_GEN[45].ngFEC_module/bram_array[11].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_22default:default8Z32-117hpx  DNet %s could not be optimized because driver %s could not be cloned 117*physynth2 vSFP_GEN[45].ngFEC_module/bram_array[8].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2_n_0vSFP_GEN[45].ngFEC_module/bram_array[8].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2_n_02default:default2 rSFP_GEN[45].ngFEC_module/bram_array[8].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2 rSFP_GEN[45].ngFEC_module/bram_array[8].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_22default:default8Z32-117hpx  DNet %s could not be optimized because driver %s could not be cloned 117*physynth2 vSFP_GEN[45].ngFEC_module/bram_array[3].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2_n_0vSFP_GEN[45].ngFEC_module/bram_array[3].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2_n_02default:default2 rSFP_GEN[45].ngFEC_module/bram_array[3].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_2 rSFP_GEN[45].ngFEC_module/bram_array[3].RAM/BRAM_l/xpm_memory_base_inst/gen_wr_b.gen_word_narrow.mem_reg_bram_1_i_22default:default8Z32-117hpx P .No nets found for critical-cell optimization. 68*physynthZ32-68hpx  $Optimized %s %s. Created %s new %s. 216*physynth2 02default:default2 net2default:default2 02default:default2 instance2default:defaultZ32-232hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 12default:default2 02default:default2 net or cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx j FNo candidate cells for DSP register optimization found in the design. 274*physynthZ32-456hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 22default:default2 02default:default2 net or cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx i DNo candidate cells found for Shift Register to Pipeline optimization564*physynthZ32-1123hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 12default:default2 02default:default2 net or cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx h DNo candidate cells for SRL register optimization found in the design349*physynthZ32-677hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 12default:default2 02default:default2 net or cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx i ENo candidate cells for BRAM register optimization found in the design297*physynthZ32-526hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 12default:default2 02default:default2 net or cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx j FNo candidate cells for URAM register optimization found in the design 437*physynthZ32-846hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 22default:default2 02default:default2 net or cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx o KNo candidate nets found for dynamic/static region interface net replication521*physynthZ32-949hpx  aEnd %s Pass. Optimized %s %s. Created %s new %s, deleted %s existing %s and moved %s existing %s 415*physynth2 12default:default2 02default:default2 net or cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:default2 02default:default2 cell2default:defaultZ32-775hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:012default:default2 00:00:00.4062default:default2 13929.0942default:default2 0.0002default:defaultZ17-268hp x  B - Summary of Physical Synthesis Optimizations *commonhpx B -============================================ *commonhpx   *commonhpx   *commonhpx  ----------------------------------------------------------------------------------------------------------------------------------------------------------- *commonhpx  | Optimization | Added Cells | Removed Cells | Optimized Cells/Nets | Dont Touch | Iterations | Elapsed | ----------------------------------------------------------------------------------------------------------------------------------------------------------- *commonhpx  | LUT Combining | 8 | 6309 | 6317 | 0 | 1 | 00:00:26 | | Very High Fanout | 181 | 0 | 10 | 0 | 1 | 00:00:37 | | Fanout | 9 | 0 | 1 | 0 | 1 | 00:00:02 | | Critical Cell | 0 | 0 | 0 | 0 | 1 | 00:00:00 | | DSP Register | 0 | 0 | 0 | 0 | 1 | 00:00:01 | | Shift Register to Pipeline | 0 | 0 | 0 | 0 | 1 | 00:00:00 | | Shift Register | 0 | 0 | 0 | 0 | 1 | 00:00:01 | | BRAM Register | 0 | 0 | 0 | 0 | 1 | 00:00:01 | | URAM Register | 0 | 0 | 0 | 0 | 1 | 00:00:01 | | Dynamic/Static Region Interface Net Replication | 0 | 0 | 0 | 0 | 1 | 00:00:00 | | Total | 198 | 6309 | 6328 | 0 | 10 | 00:01:08 | ----------------------------------------------------------------------------------------------------------------------------------------------------------- *commonhpx   *commonhpx   *commonhpx T ?Phase 2.3.1 Physical Synthesis In Placer | Checksum: 1a23a745e *commonhpx   %s * constraints2q ]Time (s): cpu = 00:40:21 ; elapsed = 00:28:03 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 114 44 101 304 821 633 737 253 176 76 28 11 Total: 3298 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx K 6Phase 2.3 Global Placement Core | Checksum: 1f212ae24 *commonhpx   %s * constraints2q ]Time (s): cpu = 00:41:39 ; elapsed = 00:29:04 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx D /Phase 2 Global Placement | Checksum: 1f212ae24 *commonhpx   %s * constraints2q ]Time (s): cpu = 00:41:41 ; elapsed = 00:29:06 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx q Phase %s%s 101* constraints2 3 2default:default2$ Detail Placement2default:defaultZ18-101hpx } Phase %s%s 101* constraints2 3.1 2default:default2. Commit Multi Column Macros2default:defaultZ18-101hpx P ;Phase 3.1 Commit Multi Column Macros | Checksum: 2a565b8bf *commonhpx   %s * constraints2q ]Time (s): cpu = 00:43:54 ; elapsed = 00:30:32 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx  Phase %s%s 101* constraints2 3.2 2default:default20 Commit Most Macros & LUTRAMs2default:defaultZ18-101hpx  %s* constraints2 lSLR(matching) [0-1] 112 50 120 274 813 637 737 255 187 72 30 11 Total: 3298 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx R =Phase 3.2 Commit Most Macros & LUTRAMs | Checksum: 1fecabe16 *commonhpx   %s * constraints2q ]Time (s): cpu = 00:46:58 ; elapsed = 00:32:42 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx q Phase %s%s 101* constraints2 3.3 2default:default2" Small Shape DP2default:defaultZ18-101hpx { Phase %s%s 101* constraints2 3.3.1 2default:default2* Small Shape Clustering2default:defaultZ18-101hpx  %s* constraints2 lSLR(matching) [0-1] 110 47 113 292 823 588 800 310 269 73 53 10 Total: 3488 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx N 9Phase 3.3.1 Small Shape Clustering | Checksum: 24a823f0b *commonhpx   %s * constraints2q ]Time (s): cpu = 00:55:00 ; elapsed = 00:38:18 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx t Phase %s%s 101* constraints2 3.3.2 2default:default2# DP Optimization2default:defaultZ18-101hpx  %s* constraints2 lSLR(matching) [0-1] 111 49 100 299 838 566 803 309 273 76 52 12 Total: 3488 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 111 49 99 299 838 567 805 307 273 76 52 12 Total: 3488 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 84 45 105 259 823 516 840 334 309 93 67 13 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 76 42 101 265 832 508 834 338 321 102 58 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 71 48 108 261 817 517 831 336 318 93 77 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 79 48 93 262 828 520 839 346 307 89 67 10 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 79 46 101 260 817 509 824 355 313 95 80 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 80 48 104 259 820 509 830 354 316 94 65 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 80 45 104 258 816 508 819 362 313 94 80 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 80 47 103 257 815 515 827 356 319 93 67 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 80 45 105 260 817 518 813 363 313 94 71 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 78 45 102 262 815 517 813 368 312 92 75 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 49 106 258 808 518 816 363 317 92 71 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 80 46 107 258 812 519 805 375 313 91 73 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 80 47 106 265 810 517 802 374 310 93 75 9 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 80 46 107 267 807 515 801 377 309 93 76 10 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 83 48 107 266 807 515 813 364 314 95 66 10 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 82 45 107 268 804 523 797 374 319 86 73 10 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 45 104 263 810 529 799 373 316 87 70 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 84 48 102 265 803 529 811 368 316 85 66 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 82 46 103 262 808 535 802 369 316 84 70 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 47 101 263 808 540 797 371 315 83 70 12 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 83 49 102 268 799 536 811 362 316 85 65 12 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 83 47 101 265 805 539 806 363 311 85 72 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 83 47 99 264 804 543 809 356 313 86 73 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 79 56 96 249 819 548 816 358 310 81 64 12 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 71 48 102 264 833 536 811 353 309 80 68 13 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 79 46 115 263 807 545 814 350 308 85 65 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 50 105 264 811 529 817 355 314 85 66 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 70 53 102 267 819 534 814 348 318 84 66 13 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 49 103 265 812 534 815 351 310 88 69 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 81 51 102 266 811 535 812 351 312 87 69 11 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 71 55 99 272 815 541 812 343 318 86 63 13 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 83 48 103 259 821 545 813 348 312 79 65 12 Total: 3488 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 77 61 91 258 827 547 808 345 314 82 65 13 Total: 3488 2default:defaulthpx G 2Phase 3.3.2 DP Optimization | Checksum: 2580128e1 *commonhpx   %s * constraints2q ]Time (s): cpu = 01:27:18 ; elapsed = 01:01:07 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx  Phase %s%s 101* constraints2 3.3.3 2default:default20 Flow Legalize Slice Clusters2default:defaultZ18-101hpx T ?Phase 3.3.3 Flow Legalize Slice Clusters | Checksum: 1e268081c *commonhpx   %s * constraints2q ]Time (s): cpu = 01:27:28 ; elapsed = 01:01:14 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx t Phase %s%s 101* constraints2 3.3.4 2default:default2# Slice Area Swap2default:defaultZ18-101hpx  %s* constraints2 lSLR(matching) [0-1] 111 50 105 299 833 574 798 306 271 77 52 12 Total: 3488 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx  %s* constraints2 lSLR(matching) [0-1] 111 50 118 286 833 588 812 311 267 75 56 12 Total: 3519 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx 2 %s* constraints2 2default:defaulthpx G 2Phase 3.3.4 Slice Area Swap | Checksum: 1fbe610c9 *commonhpx   %s * constraints2q ]Time (s): cpu = 01:32:10 ; elapsed = 01:04:16 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx D /Phase 3.3 Small Shape DP | Checksum: 295d3e3fb *commonhpx   %s * constraints2q ]Time (s): cpu = 01:36:09 ; elapsed = 01:06:25 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx u Phase %s%s 101* constraints2 3.4 2default:default2& Re-assign LUT pins2default:defaultZ18-101hpx H 3Phase 3.4 Re-assign LUT pins | Checksum: 1d166b82c *commonhpx   %s * constraints2q ]Time (s): cpu = 01:37:10 ; elapsed = 01:07:41 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx  Phase %s%s 101* constraints2 3.5 2default:default22 Pipeline Register Optimization2default:defaultZ18-101hpx T ?Phase 3.5 Pipeline Register Optimization | Checksum: 2a729f503 *commonhpx   %s * constraints2q ]Time (s): cpu = 01:37:26 ; elapsed = 01:07:58 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx t Phase %s%s 101* constraints2 3.6 2default:default2% Fast Optimization2default:defaultZ18-101hpx G 2Phase 3.6 Fast Optimization | Checksum: 297a08900 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:02:47 ; elapsed = 01:27:23 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx D /Phase 3 Detail Placement | Checksum: 297a08900 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:02:52 ; elapsed = 01:27:28 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx  Phase %s%s 101* constraints2 4 2default:default2< (Post Placement Optimization and Clean-Up2default:defaultZ18-101hpx { Phase %s%s 101* constraints2 4.1 2default:default2, Post Commit Optimization2default:defaultZ18-101hpx E %Done setting XDC timing constraints. 35*timingZ38-35hpx  The instance '%s' has %s pins that are not tied constant, so the corresponding mux will select the input(s) having the worst case (highest frequency) clock(s) for automatic derivation of generated clocks184*timing2 i_tcds2_if/i_mgt_wrapper/i_mgt/inst/gen_gtwizard_gthe3_top.ttc_mgt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_common.gen_common_container[24].gen_enabled_common.gthe3_common_wrapper_inst/common_inst/gthe3_common_gen.GTHE3_COMMON_PRIM_INST i_tcds2_if/i_mgt_wrapper/i_mgt/inst/gen_gtwizard_gthe3_top.ttc_mgt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_common.gen_common_container[24].gen_enabled_common.gthe3_common_wrapper_inst/common_inst/gthe3_common_gen.GTHE3_COMMON_PRIM_INST2default:default2" QPLL1REFCLKSEL2default:default8Z38-277hpx  Phase %s%s 101* constraints2 4.1.1 2default:default2/ Post Placement Optimization2default:defaultZ18-101hpx V APost Placement Optimization Initialization | Checksum: 1bf81c123 *commonhpx u Phase %s%s 101* constraints2 4.1.1.1 2default:default2" BUFG Insertion2default:defaultZ18-101hpx a  Starting %s Task 103* constraints2& Physical Synthesis2default:defaultZ18-103hpx  Phase %s%s 101* constraints2 1 2default:default25 !Physical Synthesis Initialization2default:defaultZ18-101hpx  EMultithreading enabled for phys_opt_design using a maximum of %s CPUs380*physynth2 22default:defaultZ32-721hpx  (%s %s Timing Summary | WNS=%s | TNS=%s |333*physynth2 Estimated2default:default2 2default:default2 0.1262default:default2 0.0002default:defaultZ32-619hpx U @Phase 1 Physical Synthesis Initialization | Checksum: 1a38a7008 *commonhpx   %s * constraints2p \Time (s): cpu = 00:01:19 ; elapsed = 00:00:43 . Memory (MB): peak = 13929.094 ; gain = 0.0002default:defaulthpx  2Processed net %s, inserted BUFG to drive %s loads.34* placeflow2# fabric_clk_div22default:default2 52522default:defaultZ46-35hpx m Replicated bufg driver %s39* placeflow2/ fabric_clk_div2_reg_replica2default:defaultZ46-45hpx  2Processed net %s, inserted BUFG to drive %s loads.34* placeflow2? +SFP_GEN[5].ngCCM_gbt/fabric_clk_div2_reg[0]2default:default2 13922default:defaultZ46-35hpx  BUFG insertion identified %s candidate nets. Inserted BUFG: %s, Replicated BUFG Driver: %s, Skipped due to Placement/Routing Conflicts: %s, Skipped due to Timing Degradation: %s, Skipped due to Illegal Netlist: %s.43* placeflow2 22default:default2 22default:default2 12default:default2 02default:default2 02default:default2 02default:defaultZ46-56hpx J 5Ending Physical Synthesis Task | Checksum: 18f9d080b *commonhpx   %s * constraints2p \Time (s): cpu = 00:02:12 ; elapsed = 00:01:15 . Memory (MB): peak = 13929.094 ; gain = 0.0002default:defaulthpx H 3Phase 4.1.1.1 BUFG Insertion | Checksum: 14de17a80 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:25:03 ; elapsed = 01:43:41 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx w Phase %s%s 101* constraints2 4.1.1.2 2default:default2$ BUFG Replication2default:defaultZ18-101hpx  XProcessed net %s, BUFG replication was skipped in SLR %s as timing constraints are met. 53* placeflow2# fabric_clk_div22default:default2 02default:defaultZ46-68hpx  BUFG replication identified %s candidate nets: Replicated nets: %s, Replicated BUFGs: %s, Replicated BUFG Driver: %s, Skipped due to Placement / Routing Conflict: %s, Skipped due to Timing: %s, Skipped due to constraints: %s 48* placeflow2 12default:default2 02default:default2 02default:default2 02default:default2 02default:default2 12default:default2 02default:defaultZ46-63hpx J 5Phase 4.1.1.2 BUFG Replication | Checksum: 14de17a80 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:25:18 ; elapsed = 01:43:54 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx  hPost Placement Timing Summary WNS=%s. For the most accurate timing information please run report_timing.610*place2 0.4002default:defaultZ30-746hpx r Phase %s%s 101* constraints2 4.1.1.3 2default:default2 Replication2default:defaultZ18-101hpx  kPost Replication Timing Summary WNS=%s. For the most accurate timing information please run report_timing. 24* placeflow2 0.4002default:defaultZ46-19hpx E 0Phase 4.1.1.3 Replication | Checksum: 1e10a5bb4 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:30:46 ; elapsed = 01:47:36 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx   %s * constraints2q ]Time (s): cpu = 02:30:46 ; elapsed = 01:47:36 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx N 9Phase 4.1 Post Commit Optimization | Checksum: 1e10a5bb4 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:30:51 ; elapsed = 01:47:42 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:022default:default2 00:00:022default:default2 13929.0942default:default2 0.0002default:defaultZ17-268hp x  y Phase %s%s 101* constraints2 4.2 2default:default2* Post Placement Cleanup2default:defaultZ18-101hpx L 7Phase 4.2 Post Placement Cleanup | Checksum: 1fd33e372 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:31:16 ; elapsed = 01:48:05 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx s Phase %s%s 101* constraints2 4.3 2default:default2$ Placer Reporting2default:defaultZ18-101hpx  Phase %s%s 101* constraints2 4.3.1 2default:default2. Print Estimated Congestion2default:defaultZ18-101hpx  'Post-Placement Estimated Congestion %s 38* placeflow2  ____________________________________________________ | | Global Congestion | Short Congestion | | Direction | Region Size | Region Size | |___________|___________________|___________________| | North| 16x16| 8x8| |___________|___________________|___________________| | South| 8x8| 8x8| |___________|___________________|___________________| | East| 1x1| 4x4| |___________|___________________|___________________| | West| 1x1| 8x8| |___________|___________________|___________________| 2default:defaultZ30-612hpx R =Phase 4.3.1 Print Estimated Congestion | Checksum: 1fd33e372 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:31:22 ; elapsed = 01:48:12 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx F 1Phase 4.3 Placer Reporting | Checksum: 1fd33e372 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:31:28 ; elapsed = 01:48:17 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx z Phase %s%s 101* constraints2 4.4 2default:default2+ Final Placement Cleanup2default:defaultZ18-101hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:012default:default2 00:00:00.4372default:default2 13929.0942default:default2 0.0002default:defaultZ17-268hp x    %s * constraints2q ]Time (s): cpu = 02:31:29 ; elapsed = 01:48:18 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx \ GPhase 4 Post Placement Optimization and Clean-Up | Checksum: 218da79b8 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:31:34 ; elapsed = 01:48:23 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx > )Ending Placer Task | Checksum: 1430d30c8 *commonhpx   %s * constraints2q ]Time (s): cpu = 02:31:34 ; elapsed = 01:48:23 . Memory (MB): peak = 13929.094 ; gain = 61.1452default:defaulthpx Z Releasing license: %s 83*common2" Implementation2default:defaultZ17-83hpx  G%s Infos, %s Warnings, %s Critical Warnings and %s Errors encountered. 28* vivadotcl2 1132default:default2 52default:default2 02default:default2 02default:defaultZ4-41hpx ^ %s completed successfully 29* vivadotcl2 place_design2default:defaultZ4-42hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2" place_design: 2default:default2 02:32:232default:default2 01:48:572default:default2 13929.0942default:default2 61.1452default:defaultZ17-268hp x  H &Writing timing data to binary archive.266*timingZ38-480hpx D Writing placer database... 1603* designutilsZ20-1893hpx = Writing XDEF routing. 211* designutilsZ20-211hpx J #Writing XDEF routing logical nets. 209* designutilsZ20-209hpx J #Writing XDEF routing special nets. 210* designutilsZ20-210hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2) Write XDEF Complete: 2default:default2 00:02:502default:default2 00:00:542default:default2 13929.0942default:default2 0.0002default:defaultZ17-268hp x   The %s '%s' has been generated. 621*common2 checkpoint2default:default2i UD:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.runs/impl_1/ngFEC_top_placed.dcp2default:defaultZ17-1381hpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2& write_checkpoint: 2default:default2 00:05:062default:default2 00:02:282default:default2 13929.0942default:default2 0.0002default:defaultZ17-268hp x  d %s4*runtcl2H 4Executing : report_io -file ngFEC_top_io_placed.rpt 2default:defaulthpx  lreport_io: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.508 . Memory (MB): peak = 13929.094 ; gain = 0.000 *commonhpx  %s4*runtcl2~ jExecuting : report_utilization -file ngFEC_top_utilization_placed.rpt -pb ngFEC_top_utilization_placed.pb 2default:defaulthpx  I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2( report_utilization: 2default:default2 00:00:262default:default2 00:00:262default:default2 13929.0942default:default2 0.0002default:defaultZ17-268hp x   %s4*runtcl2e QExecuting : report_control_sets -verbose -file ngFEC_top_control_sets_placed.rpt 2default:defaulthpx  rreport_control_sets: Time (s): cpu = 00:00:03 ; elapsed = 00:00:03 . Memory (MB): peak = 13929.094 ; gain = 0.000 *commonhpx  End Record