Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. -------------------------------------------------------------------------------------- | Tool Version : Vivado v.2020.2 (win64) Build 3064766 Wed Nov 18 09:12:45 MST 2020 | Date : Sat Mar 13 09:38:35 2021 | Host : baby running 64-bit major release (build 9200) | Command : report_control_sets -verbose -file ngFEC_top_control_sets_placed.rpt | Design : ngFEC_top | Device : xcku115 -------------------------------------------------------------------------------------- Control Set Information Table of Contents ----------------- 1. Summary 2. Histogram 3. Flip-Flop Distribution 4. Detailed Control Set Information 1. Summary ---------- +----------------------------------------------------------+-------+ | Status | Count | +----------------------------------------------------------+-------+ | Total control sets | 20801 | | Minimum number of control sets | 20592 | | Addition due to synthesis replication | 0 | | Addition due to physical synthesis replication | 209 | | Unused register locations in slices containing registers | 21713 | +----------------------------------------------------------+-------+ * Control sets can be merged at opt_design using control_set_merge or merge_equivalent_drivers ** Run report_qor_suggestions for automated merging and remapping suggestions 2. Histogram ------------ +--------------------+-------+ | Fanout | Count | +--------------------+-------+ | Total control sets | 20801 | | >= 0 to < 4 | 4112 | | >= 4 to < 6 | 2962 | | >= 6 to < 8 | 1468 | | >= 8 to < 10 | 1857 | | >= 10 to < 12 | 1622 | | >= 12 to < 14 | 1573 | | >= 14 to < 16 | 683 | | >= 16 | 6524 | +--------------------+-------+ * Control sets can be remapped at either synth_design or opt_design 3. Flip-Flop Distribution ------------------------- +--------------+-----------------------+------------------------+-----------------+--------------+ | Clock Enable | Synchronous Set/Reset | Asynchronous Set/Reset | Total Registers | Total Slices | +--------------+-----------------------+------------------------+-----------------+--------------+ | No | No | No | 69851 | 18147 | | No | No | Yes | 14436 | 7883 | | No | Yes | No | 5741 | 2403 | | Yes | No | No | 70650 | 22473 | | Yes | No | Yes | 194404 | 38640 | | Yes | Yes | No | 33245 | 7737 | +--------------+-----------------------+------------------------+-----------------+--------------+ 4. Detailed Control Set Information ----------------------------------- +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+----------------+--------------+ | Clock Signal | Enable Signal | Set/Reset Signal | Slice Load Count | Bel Load Count | Bels / Slice | +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+----------------+--------------+ | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[41].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[41].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[42].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[42].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[43].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[43].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[10].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[10].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[3] | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[10] | ctrl_regs_inst/regs_reg[5][31]_0[10] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[11] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[10] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/cbcc_reset_cbstg2_rd_clk | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[45].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[45].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[40].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[40].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[10] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[12] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[5] | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_13 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_13 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[44].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[44].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[9] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_8 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[9].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[9].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_8 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_8 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[8] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[9] | ctrl_regs_inst/regs_reg[5][31]_0[9] | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[9] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[46].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[46].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_62 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[4] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[38].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[38].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[47].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[47].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_59 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_59 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_57 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_54 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_54 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_55 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_52 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_52 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_52 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[14] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[15] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/resetOnEven_gen.sta_headerLocked_o_bit_synchronizer/i_in_out | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_50 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_50 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[2] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[35].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[35].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/timer0 | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/clkSlipProcess.timer[5]_i_1_n_0 | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_56 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_56 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_49 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_49 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/i_mgt_wrapper/i_mgt/inst/gen_gtwizard_gthe3_top.ttc_mgt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_buffer_bypass_internal.gen_single_instance.gtwiz_buffbypass_rx_inst/gen_gtwiz_buffbypass_rx_main.gen_auto_mode.reset_synchronizer_resetdone_inst/FSM_sequential_gen_gtwiz_buffbypass_rx_main.gen_auto_mode.sm_buffbypass_rx_reg[0] | i_tcds2_if/i_mgt_wrapper/i_buffbypass_rx_reset/gtwiz_buffbypass_rx_reset_in[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | i_tcds2_if/i_mgt_wrapper/i_txusrclk/bbstub_txoutclk_out[0] | | | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[37].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[37].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[6] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[13] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[36].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[36].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/mgtRxReset_s0__0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[34].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[34].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[1] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[33].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[33].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[0] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[32].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[32].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[31] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[31].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[31].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[30] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[30].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[30].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[29] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_18 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[29].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[29].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_18 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[28] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[28].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[28].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[27] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[27].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[27].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[26] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[26].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[26].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[25] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[25].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[25].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[24] | 1 | 1 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[24].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[24].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[23] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[23].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[23].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[22] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[22].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[22].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[21] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[21].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[21].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[7] | 1 | 1 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[39].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[39].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[20] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[20].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[20].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[19] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[19].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[19].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[18] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[18].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[18].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[17] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[17].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[17].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[16] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[16].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[16].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[15] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[15].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[15].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[14] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[14].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[14].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[13] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[13].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[13].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[12] | 1 | 1 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[12].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[12].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[8] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[8] | ctrl_regs_inst/regs_reg[5][31]_0[8] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[8].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[8].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[7] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[7] | ctrl_regs_inst/regs_reg[5][31]_0[7] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[7].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[7].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[6] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[6] | ctrl_regs_inst/regs_reg[5][31]_0[6] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[6].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[6].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[5] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[5] | ctrl_regs_inst/regs_reg[5][31]_0[5] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[5].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[5].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[11] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[11] | ctrl_regs_inst/regs_reg[5][31]_0[11] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[11].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[11].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[2] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[2] | ctrl_regs_inst/regs_reg[5][31]_0[2] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[2].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[2].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[3] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[3] | ctrl_regs_inst/regs_reg[5][31]_0[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[3].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[3].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[1] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[1] | ctrl_regs_inst/regs_reg[5][31]_0[1] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[1].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[1].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[4] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[4] | ctrl_regs_inst/regs_reg[5][31]_0[4] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[4].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[4].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[0] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbtRxReset_s0 | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[0] | ctrl_regs_inst/regs_reg[5][31]_0[0] | 1 | 1 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[0].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[0].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_63 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_6 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_47 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_45 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_45 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_44 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_43 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_42 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_42 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_37 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_37 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_35 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_19 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_19 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_19 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_19 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_18 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 1 | 1.00 | | tx_wordclk | TX_CLKEN_repN_18 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtTxReset_s0 | 1 | 1 | 1.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__405_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__378_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__46_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__151_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__368_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip_i_2__46_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__398_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__393_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__406_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__134_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_clr__0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__479_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__289_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__273_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_clr__0 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/FSM_sequential_state[1]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__14_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__14_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__581_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__15_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__15_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/Q[6] | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_clr__0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_clr__0 | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__59_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_clr__0 | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_clr__0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__141_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__176_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_clr__0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_clr__0 | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__31_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_clr__0 | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__288_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_clr__0 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip_i_1__32_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__197_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_2_58 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__209_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__35_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__208_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__26_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__207_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__580_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/Q[5] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__196_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_clr__0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__186_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_clr__0 | 2 | 2 | 1.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_clr__0 | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__60_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_clr__0 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/FSM_sequential_state[1]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_clr__0 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__440_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_clr__0 | 2 | 2 | 1.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__287_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_clr__0 | 2 | 2 | 1.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/any_vld_btf_fifo_din_detect_dlyd_i_1_n_0 | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_1_57 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__187_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__206_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__195_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__128_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/FSM_sequential_state[1]_i_1__35_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/wdth_conv_count[1]_i_1_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/any_vld_btf_fifo_din_detect_dlyd_i_1_n_0 | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_5 | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/E[0] | i_I2C_if/I2C_array[0].buffer_server/SS[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__579_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/Q[4] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__282_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__194_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__578_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__286_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__168_n_0 | | 1 | 2 | 2.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/pre_r1_rxheadervalid_i | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__450_n_0 | | 1 | 2 | 2.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/u_rst_sync_cbcc_only_reset_rd_clk/stg5_reg_0 | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__193_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/FSM_sequential_sm_init[1]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip_i_1__36_n_0 | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/FSM_sequential_sm_init[1]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[0]_inv_3[0] | i_I2C_if/I2C_array[4].buffer_server/SS[0] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/FSM_sequential_sm_init[1]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/FSM_sequential_sm_init[1]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/FSM_sequential_sm_init[1]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__192_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/FSM_sequential_sm_init[1]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__285_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/FSM_sequential_sm_init[1]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__283_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/FSM_sequential_sm_init[1]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[0]_inv_0[0] | i_I2C_if/I2C_array[7].buffer_server/SS[0] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/FSM_sequential_sm_init[1]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__142_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/FSM_sequential_sm_init[1]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__133_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/FSM_sequential_sm_init[1]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__38_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/FSM_sequential_sm_init[1]_i_1__11_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__272_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__577_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__190_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_4 | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_6 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__51_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__189_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__451_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__294_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/FSM_sequential_sm_init[1]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__90_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__31_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/FSM_sequential_sm_init[1]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/FSM_sequential_sm_init[1]_i_1__23_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__38_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/FSM_sequential_sm_init[1]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__143_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_7 | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/FSM_sequential_sm_init[1]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/FSM_sequential_sm_init[1]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_5_61 | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/FSM_sequential_sm_init[1]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__199_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/FSM_sequential_sm_init[1]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__576_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/FSM_sequential_sm_init[1]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip_i_1__40_n_0 | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/FSM_sequential_sm_init[1]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/FSM_sequential_sm_init[1]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/FSM_sequential_sm_init[1]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__284_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__402_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__399_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__198_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__441_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__256_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__169_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__487_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_11_67 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__57_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__188_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__575_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/FSM_sequential_state[1]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/FSM_sequential_sm_init[1]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__132_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__347_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/FSM_sequential_sm_init[1]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/FSM_sequential_sm_init[1]_i_1__35_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__80_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/FSM_sequential_sm_init[1]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__144_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/FSM_sequential_sm_init[1]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/FSM_sequential_sm_init[1]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__442_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/FSM_sequential_sm_init[1]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/FSM_sequential_state[1]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/FSM_sequential_sm_init[1]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__37_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/FSM_sequential_sm_init[1]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/FSM_sequential_sm_init[1]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/FSM_sequential_sm_init[1]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_7_51 | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/FSM_sequential_sm_init[1]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__452_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_3_59 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__409_n_0 | | 1 | 2 | 2.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/core_reset_logic_i/SYSTEM_RESET_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__574_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_4_60 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__462_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__27_n_0 | | 1 | 2 | 2.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_init_sm_i/CHANNEL_UP_TX_IF_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__443_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_9_53 | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/FSM_sequential_sm_init[1]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__348_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/FSM_sequential_sm_init[1]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__400_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_9_41 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__463_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/FSM_sequential_sm_init[1]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__573_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/FSM_sequential_sm_init[1]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__31_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__410_n_0 | | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/FSM_sequential_sm_init[1]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/FSM_sequential_sm_init[1]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/FSM_sequential_sm_init[1]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__39_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/FSM_sequential_sm_init[1]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip_i_1__41_n_0 | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/FSM_sequential_sm_init[1]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_9 | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/FSM_sequential_sm_init[1]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 2 | 1.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/FSM_sequential_sm_init[1]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__453_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__478_n_0 | | 1 | 2 | 2.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.user_reset_sync_inst/SR[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__482_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__32_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_8_40 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__411_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__454_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__583_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__39_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/intr_flop | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__444_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cdr_reset_fsm_lnkreset_i_1_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/LINK_RESET_reg[0]_0[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__5_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__455_n_0 | | 1 | 2 | 2.00 | | clk250 | | stat_regs_inst/i_cntr_rst_ctrl/SR[32]_i_1_n_0 | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__62_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__497_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__392_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__412_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_3_47 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__582_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__456_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_8_64 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__5_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__394_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__445_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_8_52 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__457_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__145_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__131_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__346_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__164_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__572_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__170_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__458_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip_i_1__37_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__496_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_10_54 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__41_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__459_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__41_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_6_62 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__89_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__446_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_6_50 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/FSM_sequential_state[1]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__23_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__460_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__521_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__480_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__28_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_3_35 | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__485_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__461_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__146_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__130_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__447_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__36_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__520_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__36_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__88_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_5_37 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[0]_inv_6[0] | i_I2C_if/I2C_array[1].buffer_server/SS[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__54_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__174_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__495_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_10_42 | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__171_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__519_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/FSM_sequential_state[1]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip_i_1__38_n_0 | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[0]_inv_1[0] | i_I2C_if/I2C_array[6].buffer_server/SS[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__401_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__147_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__448_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__494_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__33_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[0]_inv_4[0] | i_I2C_if/I2C_array[3].buffer_server/SS[0] | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[0]_inv_5[0] | i_I2C_if/I2C_array[2].buffer_server/SS[0] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_0_44 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__518_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__476_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_11_43 | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_8 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__21_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__46_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__9_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__349_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__21_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__1_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__9_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__516_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__9_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__281_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__493_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[0]_inv[0] | i_I2C_if/I2C_array[8].buffer_server/SS[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__477_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__10_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__449_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_5_49 | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__29_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__517_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__34_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__280_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__395_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__0_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_11 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__129_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__484_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__492_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__137_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__515_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__1_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_7_39 | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[0]_inv_2[0] | i_I2C_if/I2C_array[5].buffer_server/SS[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__148_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__35_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__2_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__205_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__279_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__177_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__175_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/FSM_sequential_state[1]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__35_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__403_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__351_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__204_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__3_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__178_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__491_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__396_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__523_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__172_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__4_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_3 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__203_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/gtwiz_userclk_rx_reset_in | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__179_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__149_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__35_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__514_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__278_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_7_63 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__5_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__1_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_4_48 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__165_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__24_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__6_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__277_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__352_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_0_56 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__345_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__513_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__202_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__180_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__87_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__490_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__7_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__139_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__201_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__10_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__489_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__181_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_6_38 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip_i_1__33_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__36_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip_i_1__39_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__212_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__40_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__222_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__223_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__58_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__213_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__214_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__39_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__215_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__354_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__216_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_11_55 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__4_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__217_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__4_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_0_32 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__218_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__64_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__77_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__219_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__220_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__76_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__221_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__536_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__355_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__75_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__41_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__547_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__74_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__546_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__73_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__428_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__72_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__438_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__439_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__71_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__42_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_2_34 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__429_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__81_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__430_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_2 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__431_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__91_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_1_45 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__432_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__433_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__70_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__434_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__69_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__43_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__435_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__436_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__79_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__437_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | ipb_clk | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__65_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__34_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__34_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__78_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__52_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__44_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__68_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__92_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__103_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__102_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__293_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_10_66 | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_10 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__22_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__22_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__94_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__2_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__93_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__2_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__96_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__344_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__95_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__44_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__48_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__44_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__66_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__97_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__98_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__557_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__99_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__556_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__100_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__101_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__6_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__6_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__555_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__554_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__67_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__553_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__152_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__162_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__552_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__163_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__153_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__551_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__154_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__550_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__155_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__156_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__549_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__157_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__158_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__559_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__159_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__160_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__558_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__161_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__11_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__11_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__623_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__548_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__416_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__260_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__270_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__271_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__53_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__261_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__426_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__262_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__263_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__264_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__624_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__265_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__311_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__266_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__312_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__267_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__49_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__268_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__83_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__269_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__309_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__427_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__310_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__20_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__20_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__625_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__308_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__512_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__522_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__417_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__84_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__85_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__626_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__339_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__317_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__418_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__24_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__24_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__82_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__113_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__3_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/FSM_sequential_sm_init[1]_i_1__47_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__26_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__26_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__7_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__341_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__7_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__8_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__419_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__340_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__338_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__112_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__627_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__337_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__336_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__111_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__335_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__334_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__110_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__3_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/gtwiz_userclk_rx_reset_in | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__109_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__420_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__333_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__108_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__343_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__342_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__107_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__332_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__531_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__628_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__28_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__28_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__106_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__365_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[10] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__50_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__364_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__421_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__105_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__363_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__362_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__376_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__361_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__211_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__115_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__360_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/FSM_sequential_state[1]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__359_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__422_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__114_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__358_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__27_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__27_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__56_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__182_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__104_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__629_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__357_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/FSM_sequential_state[1]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__367_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__366_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__356_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__275_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__319_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__318_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__25_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_13 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__423_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__314_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_13 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__323_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__313_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__30_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__316_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__30_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__315_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_8 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__10_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__630_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__389_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__537_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__538_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__375_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__388_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__539_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_8 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__540_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip_i_1__8_n_0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__541_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__542_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__387_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__543_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__386_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__424_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__544_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__385_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__55_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__545_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__43_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__43_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_ngccm/ngccm_mosi[ipb_addr][12]_i_1__631_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__384_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__383_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__23_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_62 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[9] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_62 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__524_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__382_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__534_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__350_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__525_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__535_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__47_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__381_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__425_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__374_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__526_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__527_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/FSM_sequential_state[1]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__391_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__528_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__529_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__530_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__390_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__33_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__377_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__29_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__29_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__16_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/gtwiz_userclk_rx_reset_in | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__407_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_59 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/FSM_sequential_state[1]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__33_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip_i_1__30_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__560_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_52 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__570_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__561_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_52 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__571_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__562_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/FSM_sequential_state[1]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__563_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_52 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__564_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__565_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip_i_1__29_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__566_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__567_n_0 | | 1 | 2 | 2.00 | | i_tcds2_if/fabric_clk_in | i_tcds2_if/prbs_checker/cmp_prbs_gen/E[0] | ctrl_regs_inst/prbschk_reset | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__568_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_52 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__569_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__45_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__45_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/FSM_sequential_state[1]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__532_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip_i_1__28_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_server/ngccm_state_o_reg[1]_1 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/i_mgt_wrapper/i_buffbypass_rx_reset/gtwiz_buffbypass_rx_reset_in[0] | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/FSM_sequential_state[1]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__248_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__16_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__258_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__259_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip_i_1__27_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__249_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/i_mgt_wrapper/i_mgt/inst/gen_gtwizard_gthe3_top.ttc_mgt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[24].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rxpmaresetdone_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__250_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__136_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__251_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__252_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__253_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/FSM_sequential_state[1]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__254_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/consecCorrectHeaders0 | | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__173_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__373_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__257_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip_i_1__26_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__19_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__19_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__45_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__499_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/FSM_sequential_state[1]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/nbCheckedHeaders0 | | 2 | 2 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip_i_1__25_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__86_n_0 | | 1 | 2 | 2.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/state | i_tcds2_if/rx_uplinkRst_n_bit_sync_320/i_in_out | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__464_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__475_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/FSM_sequential_state[1]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__474_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__466_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__465_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_50 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__468_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__467_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip_i_1__24_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__470_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_50 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__469_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_50 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/FSM_sequential_state[1]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__472_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__471_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__473_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__37_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__37_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_56 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip_i_1__23_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_56 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_49 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/FSM_sequential_state[1]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_49 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__500_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip_i_1__22_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__510_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__511_n_0 | | 1 | 2 | 2.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/i_mgt_wrapper/i_mgt/inst/gen_gtwizard_gthe3_top.ttc_mgt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_buffer_bypass_internal.gen_single_instance.gtwiz_buffbypass_rx_inst/gen_gtwiz_buffbypass_rx_main.gen_auto_mode.reset_synchronizer_resetdone_inst/E[0] | i_tcds2_if/i_mgt_wrapper/i_buffbypass_rx_reset/gtwiz_buffbypass_rx_reset_in[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__501_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__502_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__503_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/FSM_sequential_state[1]_i_1__23_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__504_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__505_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__506_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__507_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip_i_1__21_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__508_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__30_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__509_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__40_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__40_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/FSM_sequential_state[1]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | i_tcds2_if/i_mgt_wrapper/i_txusrclk/bbstub_txoutclk_out[0] | | i_tcds2_if/i_mgt_wrapper/i_mgt/inst/gen_gtwizard_gthe3_top.ttc_mgt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[24].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/txpmaresetdone_out[0] | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip_i_2__22_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__183_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/FSM_sequential_state[1]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__224_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__234_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__408_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__235_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__225_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/gtwiz_userclk_rx_reset_in | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__226_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__227_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__210_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__228_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__229_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__230_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/FSM_sequential_state[1]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__231_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__232_n_0 | | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__63_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__233_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__17_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__17_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 2 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip_i_1__19_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__414_n_0 | | 1 | 2 | 2.00 | | CLKFBIN | | i_AXI4_to_ipbus/FIFO_reset_reg_n_0 | 2 | 2 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/FSM_sequential_state[1]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__483_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__296_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip_i_1__35_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__166_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__498_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__307_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__306_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/FSM_sequential_state[1]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__298_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__297_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__300_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__380_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__299_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__302_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip_i_1__18_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__301_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_4_36 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__140_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__304_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__303_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__305_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/FSM_sequential_state[1]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__23_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__23_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__200_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip_i_1__17_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__372_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip_i_2__34_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/FSM_sequential_state[1]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_mgt_init/timer_clr | 2 | 2 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip_i_1__16_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__11_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__413_n_0 | | 1 | 2 | 2.00 | | CLKFBIN | | ctrl_regs_inst/AR[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__21_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__22_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__12_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/FSM_sequential_state[1]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__13_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__14_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__415_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__15_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__16_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__17_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip_i_1__15_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__18_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__481_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__19_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__20_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__0_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__0_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/FSM_sequential_state[1]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__533_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip_i_1__14_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__61_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/FSM_sequential_state[1]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/FSM_sequential_state[1]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__236_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__246_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip_i_1__13_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__247_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__237_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/FSM_sequential_state[1]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__238_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__239_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__240_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/FSM_sequential_state[1]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__241_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__242_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__184_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__243_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__244_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip_i_1__12_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__245_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__18_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__18_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__291_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/FSM_sequential_state[1]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__32_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip_i_1__11_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__255_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__116_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__32_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/FSM_sequential_state[1]_i_1__11_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__127_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__126_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__118_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__117_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__120_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip_i_1__10_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__119_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__122_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__121_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/FSM_sequential_state[1]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__124_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__123_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[8] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__38_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__125_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__404_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__8_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__8_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip_i_1__7_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/FSM_sequential_state[1]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[7] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | CLKFBIN | i_AXI4_to_ipbus/timer0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__320_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip_i_1__6_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__330_n_0 | | 1 | 2 | 2.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[12].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 2 | 1.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__331_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__321_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/FSM_sequential_state[1]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__322_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_2_46 | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[6] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__324_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__371_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__325_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip_i_1__34_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__326_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__327_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip_i_1__5_n_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__328_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__329_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__25_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__25_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/FSM_sequential_state[1]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__13_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[5] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__397_n_0 | | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 2 | 1.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 2 | 1.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | fabric_clk | fabric_clk_div2 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | ipb_clk | | fabric_clk_LOCKED | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip_i_1__4_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/FSM_sequential_state[1]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__290_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[11] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__13_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip_i_2__10_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/FSM_sequential_state[1]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__150_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[2] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__135_n_0 | | 1 | 2 | 2.00 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_mgt_init/FSM_sequential_sm_init[1]_i_1_n_0 | i_tcds2_if/i_mgt_wrapper/i_mgt_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip_i_1__1_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/FSM_sequential_state[1]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 2 | 1.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 2 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[3] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__12_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__185_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip_i_1__2_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/FSM_sequential_state[1]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__138_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[1] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__276_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip_i_1__0_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/FSM_sequential_state[1]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__353_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[4] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_9_65 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__295_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip_i_1__3_n_0 | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/FSM_sequential_state[1]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__370_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_pi_phase_step[3]_i_1__11_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 2 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/FSM_sequential_state[1]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip_i_1_n_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_63 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_63 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__274_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__369_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__167_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__379_n_0 | | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__486_n_0 | | 1 | 2 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/FSM_sequential_state[1]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_1_33 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 2 | 1.00 | | tx_wordclk | TX_CLKEN_repN | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_clr__0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_45 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGCtrl[1]_i_1__42_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__42_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_43 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 2 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_42 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_42 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_42 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_42 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__191_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_39 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__46_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_37 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_37 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_37 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__292_n_0 | | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_40 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_33 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_clr__0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__488_n_0 | | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/genReset_s | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 2 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/rx_reset_i_1 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_19 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | | ctrl_regs_inst/Q[7] | 1 | 2 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_clr__0 | 1 | 2 | 2.00 | | tx_wordclk | TX_CLKEN_repN_18 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/tx_aligned_o_reg_0 | 1 | 2 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGTDO[1]_i_1__12_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 2 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/DONE_o_reg | 1 | 2 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_185[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_186[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_208[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_211[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_201[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_608[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_218[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_219[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_223[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_251[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_247[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_23[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__32_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_209[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_234[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_89[0] | | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_213[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_228[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_216[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_237[0] | | 3 | 3 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_233[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_244[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_203[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_212[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_22[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_222[0] | | 1 | 3 | 3.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/gtwiz_userclk_rx_reset_in_r | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_229[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_24[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_255[0] | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_239[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_25[0] | | 2 | 3 | 1.50 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[24].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/txpmaresetdone_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_202[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_92[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_253[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_254[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_230[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__5_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_257[0] | | 2 | 3 | 1.50 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/wait_for_rd_en[2]_i_1_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/cbcc_fifo_reset_rd_clk | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_258[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_232[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_205[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_605[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_221[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_249[0] | | 1 | 3 | 3.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_lane_0_i/sym_dec_i/remote_rdy_cntr01_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_lane_0_i/sym_dec_i/remote_rdy_cntr[0]_i_1_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_81[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__9_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_245[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_215[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_259[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__35_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_204[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__1_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_217[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_238[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_214[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_220[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_210[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_236[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_226[0] | | 3 | 3 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_240[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_248[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_250[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_614[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_252[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_242[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_617[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_227[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_256[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_206[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_207[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_619[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_224[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_225[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_91[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_241[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_231[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_612[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_243[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_235[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_85[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_246[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_21[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_303[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_94[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_280[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_606[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_287[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_304[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_267[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__10_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_310[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_311[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_261[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_285[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_278[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_29[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_271[0] | | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_272[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_296[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_300[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_28[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_277[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_266[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_302[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_307[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_275[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_305[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_260[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_308[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_26[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_276[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_306[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_31[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_312[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_299[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_289[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_283[0] | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__31_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_284[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_265[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_262[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_293[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_294[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_297[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_279[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_286[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_309[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__12_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_313[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_314[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_3[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_282[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_315[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_27[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_281[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_301[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_316[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_30[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_292[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_270[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_290[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_268[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_274[0] | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_273[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_263[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_269[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_288[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_291[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_295[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_298[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_264[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_329[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_341[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_317[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_319[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_32[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_320[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__38_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_325[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_324[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_337[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_338[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_345[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_347[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_35[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_351[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_352[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_353[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_357[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_358[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_620[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_330[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_336[0] | | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_596[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_33[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_342[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_356[0] | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 3 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_361[0] | | 3 | 3 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | TX_CLKEN_repN_13 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_343[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_362[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_363[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__4_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_333[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | tx_wordclk | TX_CLKEN_repN_59 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 3 | 3 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_364[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_332[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_326[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_322[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_568[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_323[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/FSM_onehot_stateBitSlip[2]_i_1_n_0 | i_tcds2_if/rx_uplinkRst_n_bit_sync_320/i_in_out | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/shiftPsAddr | i_tcds2_if/rx_uplinkRst_n_bit_sync_320/i_in_out | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_339[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/lockFSM_proc.consecFalseHeaders[2]_i_1_n_0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_349[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_359[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | i_tcds2_if/i_mgt_wrapper/i_txusrclk/bbstub_txoutclk_out[0] | | i_tcds2_if/txgearbox_inst/gearboxCounter[2]_i_1_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_365[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_367[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_37[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_334[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_335[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_331[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_327[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_328[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_321[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_34[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_340[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_344[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_346[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_354[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | CLKFBIN | | i_AXI4_to_ipbus/ipb_phase[3]_i_1_n_0 | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_348[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_555[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_355[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_36[0] | | 3 | 3 | 1.00 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/reset_synchronizer_gtwiz_reset_tx_any_inst/rst_out | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_360[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_366[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_368[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_369[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_318[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_350[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_370[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_371[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_372[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_373[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | CLKFBIN | i_AXI4_to_ipbus/i_r_FIFO/E[0] | clk125_MMCM_locked | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_374[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_394[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_397[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_414[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_417[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_427[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__34_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_428[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_429[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_406[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_409[0] | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_395[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_415[0] | | 2 | 3 | 1.50 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/FSM_sequential_sm_reset_all[2]_i_1_n_0 | i_tcds2_if/i_mgt_wrapper/i_reset_sm/reset_synchronizer_gtwiz_reset_all_inst/rst_out | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_43[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_398[0] | | 1 | 3 | 3.00 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/FSM_sequential_sm_reset_rx_reg[2]_i_1_n_0 | i_tcds2_if/i_mgt_wrapper/i_reset_sm/reset_synchronizer_gtwiz_reset_rx_any_inst/rst_out | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_384[0] | | 2 | 3 | 1.50 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/FSM_sequential_sm_reset_tx[2]_i_1_n_0 | i_tcds2_if/i_mgt_wrapper/i_reset_sm/reset_synchronizer_gtwiz_reset_tx_any_inst/rst_out | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_418[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_387[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_all_timer_ctr0_n_0 | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_430[0] | | 2 | 3 | 1.50 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/p_0_in | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_38[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_39[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_rx_timer_ctr0_n_0 | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_375[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_4[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__22_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_410[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__2_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_42[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_423[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_431[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_422[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_389[0] | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__44_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_426[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_565[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_376[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_571[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__42_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_40[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_562[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_381[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_41[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_551[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_408[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_377[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_391[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__6_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_378[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_382[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_386[0] | | 2 | 3 | 1.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_400[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_385[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_388[0] | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_390[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_566[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_379[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_399[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_401[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_402[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_403[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_407[0] | | 3 | 3 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_411[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_572[0] | | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_574[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_560[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_419[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_420[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_589[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_421[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_424[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_404[0] | | 2 | 3 | 1.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/consecFalseHeaders0 | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_392[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_383[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__15_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_593[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_393[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_380[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_96[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_76[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_396[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_405[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_412[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_413[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_416[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_90[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_425[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_483[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_45[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__11_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_44[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_484[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_434[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_486[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_487[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_445[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_488[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_477[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_459[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_442[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_97[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_451[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_457[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_478[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_456[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_98[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_485[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_480[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_435[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_450[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_73[0] | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__35_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_489[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_49[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_439[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_444[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_443[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_46[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_460[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_465[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_461[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_437[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_463[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__20_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_47[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_476[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_454[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_446[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_464[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_471[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_453[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_473[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_440[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_441[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_433[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_436[0] | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_452[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_432[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_449[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_455[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_438[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_466[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_468[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_472[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_475[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_469[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_474[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_48[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_481[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_462[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__24_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_447[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_470[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_467[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_479[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_482[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_458[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__7_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_448[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_5[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__26_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_501[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_525[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_529[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_535[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_544[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_545[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_494[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_520[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_50[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_512[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_523[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_502[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_513[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_526[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_52[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_530[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_519[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__3_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_53[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_504[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_496[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_516[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_536[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_537[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_54[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_547[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_511[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_546[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_505[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_538[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_495[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_498[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_492[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_506[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__28_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_509[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_507[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_518[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_490[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_532[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_503[0] | | 3 | 3 | 1.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/u_rst_sync_blocksyncall_initclk_sync/E[0] | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/LINK_RESET_reg[0]_0[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_540[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_497[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_508[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_493[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_510[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_522[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__27_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_528[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_531[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_533[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_539[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_541[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_542[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_543[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_491[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_51[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_499[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_500[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_517[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_524[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_514[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_534[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_515[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_521[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_527[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_595[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_60[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_550[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_552[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_598[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_600[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__30_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_602[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/next_state | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.user_reset_sync_inst/AS[0] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_603[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_548[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_558[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_577[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_569[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_575[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_559[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_58[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_601[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_604[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_564[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_570[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_576[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_561[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_6[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_586[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_587[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__43_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_597[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_591[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_557[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_599[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_588[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_578[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_59[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_55[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_585[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_554[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_563[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_57[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_582[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_580[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_590[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_581[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_583[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_594[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_553[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_592[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_556[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_56[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_567[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_573[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__33_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_584[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_579[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_549[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__29_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_63[0] | | 3 | 3 | 1.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_74[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_84[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_621[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[9].gbt_txgearbox_inst/address[2]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[8].gbt_txgearbox_inst/address[2]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[7].gbt_txgearbox_inst/address[2]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[6].gbt_txgearbox_inst/address[2]_i_1__35_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[5].gbt_txgearbox_inst/address[2]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[4].gbt_txgearbox_inst/address[2]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[3].gbt_txgearbox_inst/address[2]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__45_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[2].gbt_txgearbox_inst/address[2]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[1].gbt_txgearbox_inst/address[2]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/consecFalseHeaders0 | | 2 | 3 | 1.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[11].gbt_txgearbox_inst/address[2]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[10].gbt_txgearbox_inst/address[2]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[0].gbt_txgearbox_inst/address[2]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_66[0] | | 2 | 3 | 1.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_78[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_87[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_83[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/consecFalseHeaders0 | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[9].gbt_txgearbox_inst/address[2]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[8].gbt_txgearbox_inst/address[2]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[7].gbt_txgearbox_inst/address[2]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[6].gbt_txgearbox_inst/address[2]_i_1__23_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[5].gbt_txgearbox_inst/address[2]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[4].gbt_txgearbox_inst/address[2]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__19_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[3].gbt_txgearbox_inst/address[2]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[2].gbt_txgearbox_inst/address[2]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[1].gbt_txgearbox_inst/address[2]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[11].gbt_txgearbox_inst/address[2]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[10].gbt_txgearbox_inst/address[2]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[0].gbt_txgearbox_inst/address[2]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_9[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_615[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_77[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_622[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__13_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_61[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__37_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_93[0] | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 3 | 1.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[9].gbt_txgearbox_inst/address[2]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[8].gbt_txgearbox_inst/address[2]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[7].gbt_txgearbox_inst/address[2]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__46_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[6].gbt_txgearbox_inst/address[2]_i_1__11_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[5].gbt_txgearbox_inst/address[2]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[4].gbt_txgearbox_inst/address[2]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[3].gbt_txgearbox_inst/address[2]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[2].gbt_txgearbox_inst/address[2]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__23_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[1].gbt_txgearbox_inst/address[2]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__14_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/p_0_in | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_95[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[11].gbt_txgearbox_inst/address[2]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_610[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[10].gbt_txgearbox_inst/address[2]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__40_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_99[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[0].gbt_txgearbox_inst/address[2]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[10].gbt_txgearbox_inst/address[2]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_140[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[0].gbt_txgearbox_inst/address[2]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_142[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_72[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[1].gbt_txgearbox_inst/address[2]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_111[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[11].gbt_txgearbox_inst/address[2]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_134[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[2].gbt_txgearbox_inst/address[2]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_141[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_611[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__17_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[4].gbt_txgearbox_inst/address[2]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_143[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[3].gbt_txgearbox_inst/address[2]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_100[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[5].gbt_txgearbox_inst/address[2]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_118[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[6].gbt_txgearbox_inst/address[2]_i_1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_128[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[7].gbt_txgearbox_inst/address[2]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_1[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[9].gbt_txgearbox_inst/address[2]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_110[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_txgearbox_multilink_gen[8].gbt_txgearbox_inst/address[2]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_13[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_115[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_12[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_613[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_122[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/consecFalseHeaders0 | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_616[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_10[0] | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_64[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__23_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_107[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_71[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_123[0] | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_129[0] | | 2 | 3 | 1.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_108[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_607[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_130[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/consecFalseHeaders0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_131[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_132[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_69[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_133[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_609[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_116[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_135[0] | | 2 | 3 | 1.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__0_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_136[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_618[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_137[0] | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_139[0] | | 3 | 3 | 1.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_67[0] | | 2 | 3 | 1.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_117[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_121[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_101[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__36_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_0[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_8[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_106[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_109[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_119[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_102[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_11[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_120[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_103[0] | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_105[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__18_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1][0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__21_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_113[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_104[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_68[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/p_0_in | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_124[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__11_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_114[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_125[0] | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_7[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_112[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_126[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_82[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_127[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__8_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_138[0] | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_14[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_189[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_147[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_15[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_162[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_79[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_188[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_19[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_190[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_195[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_199[0] | | 2 | 3 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__25_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__16_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_16[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_168[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_86[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_175[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_177[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_180[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_181[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_ctr0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_all_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_161[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_timer_clr_reg_n_0 | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_182[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_153[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_170[0] | | 3 | 3 | 1.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_178[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_userclk_rx_active_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_192[0] | | 2 | 3 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtwiz_reset_tx_datapath_dly_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_158[0] | | 1 | 3 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/bit_synchronizer_gtpowergood_inst/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_184[0] | | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_2[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_70[0] | | 3 | 3 | 1.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_20[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_200[0] | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_191[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_146[0] | | 2 | 3 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_167[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_156[0] | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_169[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 3 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_171[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_187[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_75[0] | | 3 | 3 | 1.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_157[0] | | 2 | 3 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_183[0] | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_197[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_173[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_144[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_160[0] | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/consecFalseHeaders0 | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_152[0] | | 2 | 3 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 3 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/p_0_in | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_179[0] | | 2 | 3 | 1.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_62[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_155[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_194[0] | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_196[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_193[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__39_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_198[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_80[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_148[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_151[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_165[0] | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_166[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | TX_CLKEN_repN_47 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_164[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_159[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/FSM_sequential_StateJTAGIO[2]_i_1__41_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_163[0] | | 1 | 3 | 3.00 | | tx_wordclk | TX_CLKEN_repN_41 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 1 | 3 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/FSM_onehot_clkSlipProcess.state[2]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_174[0] | | 2 | 3 | 1.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/consecFalseHeaders0 | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_176[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_145[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_88[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_17[0] | | 2 | 3 | 1.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/p_0_in | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_150[0] | | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_154[0] | | 2 | 3 | 1.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/FSM_sequential_fe_status[2]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | tx_wordclk | TX_CLKEN_repN_25 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_149[0] | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_172[0] | | 3 | 3 | 1.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_18[0] | | 2 | 3 | 1.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_65[0] | | 1 | 3 | 3.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_tx_any_inst/gtwiz_reset_tx_any_sync | 2 | 3 | 1.50 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | | 1 | 3 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__202_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__203_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__204_n_0 | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__205_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__206_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[36].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__207_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[36].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[36].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__208_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__209_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__15_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__15_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[47].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[47].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[47].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__368_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__378_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__379_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[35].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__369_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[35].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[35].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__370_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__371_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__373_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__372_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__375_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__374_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__376_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__377_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[10].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[10].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[10].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[34].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[9].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[9].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[9].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | i_tcds2_if/fabric_clk_in | | ctrl_regs_inst/prbs_rst_reg[3] | 1 | 4 | 4.00 | | tx_wordclk | TX_CLKEN_repN_51 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__29_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[34].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[34].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__29_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/sta_gbRdy_o | 2 | 4 | 2.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/consecCorrectHeaders0 | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/lockFSM_proc.consecCorrectHeaders[5]_i_1_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/timer0 | | 1 | 4 | 4.00 | | CLKFBIN | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 | 3 | 4 | 1.33 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/reset_synchronizer_gtwiz_reset_all_inst/rst_out | 1 | 4 | 4.00 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/reset_synchronizer_gtwiz_reset_rx_any_inst/rst_out | 3 | 4 | 1.33 | | CLKFBIN | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_r_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 | 1 | 4 | 4.00 | | CLKFBIN | i_AXI4_to_ipbus/i_w_FIFO/a[3]_i_1_n_0 | i_AXI4_to_ipbus/FIFO_reset_reg_n_0 | 1 | 4 | 4.00 | | CLKFBIN | i_AXI4_to_ipbus/i_r_FIFO/FSM_sequential_axi_state_reg[1][0] | i_AXI4_to_ipbus/FIFO_reset_reg_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[33].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | CLKFBIN | i_AXI4_to_ipbus/i_r_FIFO/a[3]_i_1__0_n_0 | i_AXI4_to_ipbus/FIFO_reset_reg_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[33].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[33].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 2 | 4 | 2.00 | | CLKFBIN | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/sta_headerLocked_o_bit_synchronizer/E[0] | ctrl_regs_inst/AR[0] | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 4 | 4 | 1.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/reset_synchronizer_reset_all_inst/rst_out | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__560_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__570_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__571_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__561_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__562_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__563_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[32].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__564_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[32].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[32].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__565_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__566_n_0 | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 3 | 4 | 1.33 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__567_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__568_n_0 | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__569_n_0 | 1 | 4 | 4.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/reset_synchronizer_reset_all_inst/rst_out | 2 | 4 | 2.00 | | DRPclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/reset_synchronizer_reset_all_inst/rst_out | 1 | 4 | 4.00 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__45_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__45_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[31].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[31].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[31].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | clk250 | stat_regs_inst/wea_repN_2 | stat_regs_inst/S1_rate[6]_i_1_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[30].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__248_n_0 | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[30].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[30].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__258_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__35_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__259_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__35_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__249_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__250_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__251_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__252_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__253_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__23_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__254_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__23_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[29].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__255_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__414_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[29].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[29].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__256_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__415_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__257_n_0 | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 3 | 4 | 1.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__404_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__19_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__19_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[28].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[28].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[28].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 3 | 4 | 1.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__11_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__11_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__191_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__405_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__406_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__464_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__14_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__475_n_0 | 2 | 4 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__59_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__14_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__197_n_0 | 1 | 4 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__60_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__196_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__474_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__195_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__194_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__193_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__192_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__190_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[27].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__466_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__189_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__465_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__199_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__188_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__452_n_0 | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[27].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[27].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__468_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__462_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 4 | 1.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__467_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__463_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__453_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__454_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__470_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__455_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__456_n_0 | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__457_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__458_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__469_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__459_n_0 | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__472_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__460_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__461_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__471_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__36_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__36_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__473_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__9_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__0_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[26].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__10_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__2_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__37_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[26].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[26].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__37_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__1_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__3_n_0 | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__4_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__5_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__6_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[25].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/FSM_sequential_gen_drp_interface.drp_tx_pi_state[3]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[25].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[25].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__500_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__7_n_0 | 1 | 4 | 4.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/FSM_sequential_phase_aligner_state[3]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__8_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__510_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__16_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__16_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__290_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__295_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__289_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__288_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__511_n_0 | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__287_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__286_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__501_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__285_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__294_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__284_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__502_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__409_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__503_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__410_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__411_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__412_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__41_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__504_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__41_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__521_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[24].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__505_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__520_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__519_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__518_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__506_n_0 | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__516_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[24].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[24].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__517_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__507_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__515_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__513_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__508_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__514_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__407_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__408_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__413_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__509_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__32_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__32_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__440_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__450_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__40_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__451_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__441_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__40_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__442_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[23].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[23].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[23].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__443_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__444_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__445_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__446_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__447_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__224_n_0 | 4 | 4 | 1.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__448_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__449_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__35_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__35_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__234_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[22].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__140_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__235_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__150_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__151_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[22].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[22].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__225_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__141_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__142_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__143_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__144_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__226_n_0 | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__97_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 4 | 4 | 1.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__145_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__146_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__227_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__147_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__148_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__149_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__228_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__10_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__10_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__229_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__291_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__292_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__230_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__164_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__174_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__175_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__165_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__231_n_0 | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__166_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__232_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__167_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__168_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__169_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[21].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__171_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__233_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__170_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[21].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[21].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__172_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__173_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__12_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__17_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__12_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__17_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 4 | 1.33 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__476_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__486_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__487_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__477_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[39].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__478_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[39].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[39].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__296_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__479_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__480_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__481_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__482_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__307_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__483_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__484_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__485_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__306_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__38_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__38_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__212_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__298_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__297_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__222_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__223_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__213_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__214_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__300_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__215_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[20].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__216_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 4 | 4 | 1.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__217_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__299_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__218_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__219_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[20].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[20].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__302_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__220_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__221_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__301_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__536_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__547_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__546_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__428_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__438_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__303_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__439_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__429_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__430_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__304_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__431_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__432_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__305_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__433_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__434_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__435_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__436_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__437_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__34_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__23_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[19].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[19].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[19].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__23_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__34_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 3 | 4 | 1.33 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__92_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__102_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__103_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__293_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[18].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__94_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[18].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[18].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__93_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__96_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__95_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__11_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__99_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__98_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__101_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__21_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__100_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__22_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__6_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__6_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__12_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__152_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__162_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__163_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__13_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__153_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__154_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__14_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__155_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__156_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__157_n_0 | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[17].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__158_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__159_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__15_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__160_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__161_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[17].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[17].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__16_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__11_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__17_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__11_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__260_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__18_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__270_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__271_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__261_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__262_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__19_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__263_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__264_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__265_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__266_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__20_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__267_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__268_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__269_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__20_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__0_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__20_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__0_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[16].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__512_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[16].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[16].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__523_n_0 | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__522_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__84_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__85_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__339_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[15].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__236_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__317_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__24_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__24_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[15].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[15].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__246_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__26_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__26_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__341_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__247_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__340_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__338_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__337_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__237_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__336_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__335_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__334_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__22_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__22_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__333_n_0 | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__238_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__343_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__342_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__239_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__332_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__28_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__28_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__365_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__240_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__364_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__363_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__362_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__361_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__360_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__359_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__241_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__358_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__27_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__27_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__357_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__242_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__367_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__366_n_0 | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[14].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__356_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__243_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__319_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__318_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__314_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[14].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[14].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__244_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__313_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__315_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__316_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__538_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__245_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__537_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__540_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__539_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__541_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__542_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__543_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__544_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__545_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__18_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__43_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__43_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__524_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__18_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__534_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__535_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__525_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[13].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__526_n_0 | 3 | 4 | 1.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[13].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[13].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__527_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__528_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__529_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__116_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__530_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__531_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__532_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__533_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__42_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__127_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__42_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__176_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__186_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__187_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__126_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__177_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__178_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__179_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__180_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__181_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[12].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__182_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__118_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__183_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__117_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__184_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__185_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__13_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[12].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[12].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__13_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__120_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__23_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__34_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__33_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__24_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__119_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__25_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__26_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__27_n_0 | 2 | 4 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__122_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__28_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__29_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__30_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__31_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__32_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__1_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__121_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__1_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__61_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__35_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__45_n_0 | 1 | 4 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__62_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__46_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__123_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__36_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__37_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__38_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__40_n_0 | 1 | 4 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__63_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__124_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__39_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__42_n_0 | 1 | 4 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__64_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__41_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__125_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__44_n_0 | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__43_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[8].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__65_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__2_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__2_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__66_n_0 | 4 | 4 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[8].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[8].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__8_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__8_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 3 | 4 | 1.33 | | ipb_clk | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__67_n_0 | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 3 | 4 | 1.33 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__416_n_0 | 2 | 4 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__426_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__427_n_0 | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_all_inst/gtwiz_reset_all_sync | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[7].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any_sync | 4 | 4 | 1.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[7].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[7].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__417_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__320_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__418_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__419_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__420_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__421_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__330_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__422_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__423_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__424_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__425_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__33_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__331_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__33_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__47_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__57_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__58_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__321_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__48_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__49_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__50_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__51_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__322_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__198_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__52_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__53_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__54_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__323_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__55_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__56_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__324_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__82_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__83_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__3_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__3_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[6].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__325_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__344_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__354_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__355_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__346_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[6].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[6].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__326_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__345_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__348_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__347_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__327_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__350_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__349_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__352_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__351_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__353_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__328_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__86_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__87_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__380_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__329_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__390_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__391_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__381_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__382_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__383_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__384_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__385_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__386_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__387_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__25_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__388_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__389_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__25_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__30_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__30_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[5].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__104_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__114_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__115_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__105_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__106_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__107_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__108_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__109_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__110_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__111_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__112_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__113_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__7_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__7_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__308_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__310_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__309_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__312_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__311_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__548_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__558_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__559_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__549_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__550_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__551_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__552_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__553_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__554_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__555_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__556_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__557_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__44_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__44_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__68_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__78_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__79_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__69_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__70_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__91_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__81_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__71_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__72_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__73_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__74_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__75_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__76_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__77_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__4_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__4_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[5].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[5].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/I2C_array[0].ipb_cycle_reg_n_0_[0] | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/I2C_array[2].ipb_cycle_reg_n_0_[2] | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/I2C_array[3].ipb_cycle_reg_n_0_[3] | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/I2C_array[4].ipb_cycle_reg_n_0_[4] | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/I2C_array[5].ipb_cycle_reg_n_0_[5] | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/I2C_array[6].ipb_cycle_reg_n_0_[6] | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/I2C_array[7].ipb_cycle_reg_n_0_[7] | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/I2C_array[8].ipb_cycle_reg_n_0_[8] | 1 | 4 | 4.00 | | ipb_clk | | i_I2C_if/p_0_in | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[10].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 2 | 4 | 2.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[47].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[0].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[9].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 2 | 4 | 2.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[20].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[11].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[12].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[13].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[14].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[15].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[21].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 2 | 4 | 2.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[16].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[17].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[18].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[1].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[19].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[36].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[35].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[22].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[23].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[24].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[25].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[26].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[27].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[28].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[2].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[29].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[30].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[31].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[32].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[33].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[34].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[37].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[38].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[3].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[39].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[40].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[41].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[42].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[43].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[44].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[45].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[46].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[4].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[5].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[6].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 2 | 4 | 2.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[7].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/clear | 1 | 4 | 4.00 | | ipb_clk | | SFP_GEN[8].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/clear | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__392_n_0 | 2 | 4 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__402_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__403_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__394_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__393_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__396_n_0 | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__395_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__397_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__398_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[11].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[11].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[11].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__399_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__400_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__401_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__31_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__31_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__128_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__138_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__139_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__129_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[2].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__130_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[2].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[2].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__131_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__132_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__133_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__134_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__135_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__136_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__137_n_0 | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/next_state | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.user_reset_sync_inst/SR[0] | 2 | 4 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[3].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/pat_count[3]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.user_reset_sync_inst/SR[0] | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[3].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[3].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 4 | 4 | 1.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__9_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__9_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/txseq_counter_i_reg[1]_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_lane_0_i/sym_gen_i/TX_DATA[62]_i_1_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__88_n_0 | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/txseq_counter_i_reg[1]_0 | | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__89_n_0 | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ch0_ctrl_inst/sync_intr_sent_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.user_reset_sync_inst/AS[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__5_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[1].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/support_reset_logic_i/u_rst_sync_gt/SS[0] | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[1].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[1].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_init_sm_i/CHANNEL_UP_RX_IF_reg_0 | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__5_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_lane_0_i/lane_init_sm_i/reset_count_r | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__80_n_0 | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_w_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__90_n_0 | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/do_rd_en | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_aw_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[4].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ar_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[4].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[4].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 1 | 4 | 4.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/dbg_extend_srst0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/dbg_srst_assert | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__488_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__498_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[46].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__499_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[46].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[46].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__489_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__490_n_0 | 3 | 4 | 1.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[0].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[0].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[0].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__491_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__492_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__493_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__494_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__495_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__496_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[45].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__39_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__497_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[45].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[45].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__39_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[44].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[44].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[44].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__272_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__282_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__283_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__273_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[43].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__274_n_0 | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[43].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[43].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__275_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__276_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__277_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__278_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__279_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__280_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__281_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[42].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[42].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[42].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__21_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__21_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[41].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[41].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[41].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | tx_wordclk | TX_CLKEN_repN_38 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__572_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__582_n_0 | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__583_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__573_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__574_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__575_n_0 | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[40].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | tx_wordclk | TX_CLKEN_repN_40 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 3 | 4 | 1.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__576_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[40].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[40].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__577_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__578_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__579_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__580_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__581_n_0 | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TMS_StateCurr[3]_i_1__46_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/tmsStateCntr[3]_i_1__46_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[38].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[38].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[38].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[37].ngCCM_gbt/RX_Clock_40MHz | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 4 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__200_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[37].ngCCM_gbt/RX_Clock_40MHz | SFP_GEN[37].ngCCM_gbt/CrossClock_DV_cnt/shiftA_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__210_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_2 | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__211_n_0 | 1 | 4 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/bus_status_ctrl.ial_reg_1 | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/cr[7]_i_1__201_n_0 | 2 | 4 | 2.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__49_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__338_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__120_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__142_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__340_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__395_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__341_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__113_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[3].rx_data_good_cntr[3][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[3].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__464_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__89_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__475_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__141_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__317_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/bitSlipCmd_to_bitSlipCtrller_4 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__474_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__417_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__477_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/bitSlipCmd_to_bitSlipCtrller_3 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__36_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__466_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__339_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__134_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__85_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__465_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__121_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__487_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__84_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__522_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__523_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__323_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__83_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__467_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__512_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__468_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__308_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__310_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__469_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__397_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__486_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__446_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[2].rx_data_good_cntr[2][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[2].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__470_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__472_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[3].rx_data_good_cntr[3][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[3].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__309_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__41_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__471_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__269_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/bitSlipCmd_to_bitSlipCtrller_3 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__476_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__268_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__427_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/bitSlipCmd_to_bitSlipCtrller_2 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__267_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__151_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__473_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__398_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__266_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__311_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__236_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__122_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__265_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__312_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__264_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__263_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[1].rx_data_good_cntr[1][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[1].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/bitSlipCmd_to_bitSlipCtrller_1 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__246_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__262_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__261_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__135_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__500_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/bitSlipCmd_to_bitSlipCtrller_8 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__399_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__271_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__38_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__510_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__270_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__260_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__511_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__548_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__247_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__331_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[0].rx_data_good_cntr[0][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[0].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__501_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__123_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__161_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__502_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__558_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__442_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/bitSlipCmd_to_bitSlipCtrller_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__503_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__160_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__400_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__42_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__559_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__237_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__445_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__159_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__504_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__150_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__172_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__158_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__173_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__549_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__505_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__426_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__157_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__354_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__238_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__401_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__506_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__156_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__52_n_0 | | 3 | 5 | 1.67 | | ipb_clk | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__62_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__550_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__53_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__507_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__155_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__140_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[8].rx_data_good_cntr[8][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[8].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[2].rx_data_good_cntr[2][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[2].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/bitSlipCmd_to_bitSlipCtrller_2 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__154_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__508_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__551_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__239_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__170_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__153_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__509_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__171_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__552_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__163_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[11].rx_data_good_cntr[11][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[11].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__162_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__124_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__553_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__152_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/bitSlipCmd_to_bitSlipCtrller_11 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__240_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__136_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__554_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | ipb_clk | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__63_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__168_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[10].rx_data_good_cntr[10][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[10].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/bitSlipCmd_to_bitSlipCtrller_10 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__555_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__224_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__416_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__169_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__234_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__241_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__125_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__556_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__235_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__100_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__167_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__101_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__225_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__557_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__242_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__166_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__226_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__98_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__99_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__96_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__227_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__95_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__228_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__243_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__93_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__175_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[9].rx_data_good_cntr[9][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[9].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__229_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__94_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__165_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__48_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__293_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__103_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__230_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__137_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__102_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/bitSlipCmd_to_bitSlipCtrller_9 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__231_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__92_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__244_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__68_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__232_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__164_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__233_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__78_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__174_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__437_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__79_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__245_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__436_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[3].rx_data_good_cntr[3][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[3].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__69_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/bitSlipCmd_to_bitSlipCtrller_3 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__435_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__321_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__128_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__434_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__70_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__325_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__433_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__296_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__307_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__432_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__91_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[8].rx_data_good_cntr[8][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[8].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | ipb_clk | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__67_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__45_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__292_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__306_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[1].rx_data_good_cntr[1][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[1].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__138_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__431_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__81_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__298_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/bitSlipCmd_to_bitSlipCtrller_8 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__430_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/bitSlipCmd_to_bitSlipCtrller_1 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__449_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__39_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__297_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__429_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__71_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__444_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__300_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__439_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__291_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__438_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__72_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__299_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__139_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__324_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__428_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__73_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__301_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/bitSlipCmd_to_bitSlipCtrller_7 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/aurora_ecc_io_stage.tdm_out_reg_slice_inst/state[0]_i_2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/aurora_ecc_io_stage.tdm_out_reg_slice_inst/state[0]_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__74_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__302_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__546_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__149_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__345_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[0].rx_data_good_cntr[0][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[0].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__547_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__303_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__536_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__129_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__75_n_0 | | 3 | 5 | 1.67 | | ipb_clk | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__66_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[7].rx_data_good_cntr[7][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[7].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/bitSlipCmd_to_bitSlipCtrller_7 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__304_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__80_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__305_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__148_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__116_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[7].rx_data_good_cntr[7][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[7].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__76_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__221_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__127_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_bond_gen_i/data_v_r | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_bond_gen_i/free_count_r[0]_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__220_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/bitSlipCmd_to_bitSlipCtrller_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__40_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__77_n_0 | | 5 | 5 | 1.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__219_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/bitSlipCmd_to_bitSlipCtrller_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__130_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__126_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__218_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__147_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[6].rx_data_good_cntr[6][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[6].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__217_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__44_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/bitSlipCmd_to_bitSlipCtrller_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 5 | 1.67 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_lane_0_i/sym_dec_i/RX_NA_IDLE | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_lane_0_i/sym_dec_i/rx_na_idles_cntr[4]_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__216_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__448_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__215_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__146_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__37_n_0 | | 5 | 5 | 1.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__214_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__11_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__118_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__213_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__131_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__21_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__223_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__441_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[5].rx_data_good_cntr[5][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[5].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__22_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__222_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__355_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__392_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__320_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__212_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__12_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__145_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__117_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__13_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__97_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/bitSlipCmd_to_bitSlipCtrller_5 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__322_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__14_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__58_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__132_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__402_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__485_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__88_n_0 | | 2 | 5 | 2.50 | | ipb_clk | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__65_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__15_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__144_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__484_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__90_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__403_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__43_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__16_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__394_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__443_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__447_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__17_n_0 | | 5 | 5 | 1.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__483_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__46_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__119_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__482_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__393_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__18_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__143_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__344_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__133_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__330_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__481_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__346_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__396_n_0 | | 4 | 5 | 1.25 | | ipb_clk | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__64_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__19_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__480_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[6].rx_data_good_cntr[6][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[6].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/core_reset_logic_i/ready_r_reg0 | 2 | 5 | 2.50 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/aurora_ecc_io_stage.ecc_in_reg_slice_inst/FSM_onehot_state[3]_i_2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/aurora_ecc_io_stage.ecc_in_reg_slice_inst/FSM_onehot_state[3]_i_1_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/g_rx_data_good[4].rx_data_good_cntr[4][4]_i_2__0_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[4].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__479_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__478_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__20_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__326_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__451_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__347_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__327_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__450_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__328_n_0 | | 3 | 5 | 1.67 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/wr_monitor_flag | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/u_rst_sync_reset_to_fifo_wr_clk/stg9_reg_0[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__440_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__329_n_0 | | 4 | 5 | 1.25 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[10].rx_data_good_cntr[10][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[10].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/bitSlipCmd_to_bitSlipCtrller_10 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__488_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__35_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/bitSlipCmd_to_bitSlipCtrller_5 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[5].rx_data_good_cntr[5][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[5].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__498_n_0 | | 3 | 5 | 1.67 | | ipb_clk | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__61_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__413_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__499_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__32_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__408_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__407_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__348_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__350_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__489_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__514_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__490_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__54_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__515_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__491_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__31_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__513_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__516_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__492_n_0 | | 5 | 5 | 1.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__518_n_0 | | 5 | 5 | 1.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__517_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[9].rx_data_good_cntr[9][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[9].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__30_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__493_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__519_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/bitSlipCmd_to_bitSlipCtrller_9 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__494_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__520_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__495_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__521_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__497_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__496_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__349_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__29_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__412_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__411_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__28_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__410_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__409_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[8].rx_data_good_cntr[8][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[8].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/bitSlipCmd_to_bitSlipCtrller_8 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__27_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__352_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__284_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__294_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[7].rx_data_good_cntr[7][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[7].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__272_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__285_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/bitSlipCmd_to_bitSlipCtrller_7 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__282_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__26_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__286_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__287_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__283_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__288_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__273_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__289_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_tx_done_inst/rst_in_out_i_1_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_rx_pll_and_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__24_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__274_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__295_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__57_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__290_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__275_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__351_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__8_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__276_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__25_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__7_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__277_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__5_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[6].rx_data_good_cntr[6][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[6].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__278_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__6_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__3_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__4_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__279_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__33_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__1_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/bitSlipCmd_to_bitSlipCtrller_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__280_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__2_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__10_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__281_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__34_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__0_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__23_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__9_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__353_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__461_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[5].rx_data_good_cntr[5][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[5].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/bitSlipCmd_to_bitSlipCtrller_5 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__460_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__459_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__185_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__572_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__458_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__457_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__582_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__184_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__456_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__455_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[4].rx_data_good_cntr[4][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[4].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__583_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__454_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__453_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__573_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__86_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__463_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/bitSlipCmd_to_bitSlipCtrller_4 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__574_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__462_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__47_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__452_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__575_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__183_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__188_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__198_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__576_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__199_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__189_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__182_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__577_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__190_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__192_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__578_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__181_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__193_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__87_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__579_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__194_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__195_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__580_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__196_n_0 | | 3 | 5 | 1.67 | | ipb_clk | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__60_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__197_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[2].rx_data_good_cntr[2][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[2].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__581_n_0 | | 3 | 5 | 1.67 | | ipb_clk | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__59_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__406_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/bitSlipCmd_to_bitSlipCtrller_2 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__405_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__191_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__180_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__179_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_5 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__404_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[1].rx_data_good_cntr[1][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[1].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/bitSlipCmd_to_bitSlipCtrller_1 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__200_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__415_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__414_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__178_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__210_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_2 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__211_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__201_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__177_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__202_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_8 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[0].rx_data_good_cntr[0][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[0].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__203_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__204_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__187_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/bitSlipCmd_to_bitSlipCtrller_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__205_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/reset_all_in | 1 | 5 | 5.00 | | DRPclk | | i_axi_slave/i_aurora/inst/support_reset_logic_i/gt_reset_out | 1 | 5 | 5.00 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[24].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_datapath_inst/rst_in0_1 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__206_n_0 | | 3 | 5 | 1.67 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_pll_and_datapath_inst/p_0_in_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_10 | 1 | 5 | 5.00 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_gtwiz_reset_rx_any_inst/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_1 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__207_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__186_n_0 | | 4 | 5 | 1.25 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_0 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_9 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_5 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_7 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_10 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__208_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_1 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_4 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/reset_all_in | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_8 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__209_n_0 | | 2 | 5 | 2.50 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_7 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_2 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_6 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_3 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__176_n_0 | | 3 | 5 | 1.67 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_6 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_3 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_10 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_8 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_4 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_9 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/reset_all_in | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_4 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/g_rx_data_good[11].rx_data_good_cntr[11][4]_i_2__2_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[11].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_9 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_0 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_1 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_7 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/bitSlipCmd_to_bitSlipCtrller_11 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_6 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_5 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_3 | 1 | 5 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/reset_all_in | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_9 | 2 | 5 | 2.50 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_10 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_6 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[11].rx_data_good_cntr[11][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[11].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_4 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/bitSlipCmd_to_bitSlipCtrller_11 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__368_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__380_n_0 | | 3 | 5 | 1.67 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_5 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_2 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_3 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_8 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__378_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__533_n_0 | | 3 | 5 | 1.67 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_7 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_0 | 2 | 5 | 2.50 | | DRPclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_1 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_3 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__369_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__379_n_0 | | 3 | 5 | 1.67 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_6 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_4 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_9 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_1 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__55_n_0 | | 3 | 5 | 1.67 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_7 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_10 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/reset_all_in | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__532_n_0 | | 2 | 5 | 2.50 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_8 | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__370_n_0 | | 2 | 5 | 2.50 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_2 | 2 | 5 | 2.50 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_5 | 1 | 5 | 5.00 | | DRPclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_0 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__371_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__531_n_0 | | 3 | 5 | 1.67 | | CLKFBIN | i_axi_slave/aurora_pma_init_in | clk125_MMCM_locked | 1 | 5 | 5.00 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_mgt/inst/gen_gtwizard_gthe3_top.ttc_mgt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_common.gen_common_container[24].gen_enabled_common.gthe3_common_wrapper_inst/common_inst/qpll0lock_out[0] | 1 | 5 | 5.00 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_mgt_init/reset_synchronizer_reset_all_inst/rst_out | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__373_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__390_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__372_n_0 | | 4 | 5 | 1.25 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/p_0_in_1 | 1 | 5 | 5.00 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/gtwiz_reset_rx_datapath_int_reg_n_0 | 1 | 5 | 5.00 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/gtwiz_reset_rx_any | 1 | 5 | 5.00 | | i_tcds2_if/i_mgt_wrapper/i_txusrclk/bbstub_txoutclk_out[0] | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/gtwiz_reset_tx_done_int_reg_n_0 | 1 | 5 | 5.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/nbCheckedHeaders0 | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/lockFSM_proc.nbCheckedHeaders[5]_i_1_n_0 | 1 | 5 | 5.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/i_mgt_wrapper/i_mgt/inst/gen_gtwizard_gthe3_top.ttc_mgt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_buffer_bypass_internal.gen_single_instance.gtwiz_buffbypass_rx_inst/gen_gtwiz_buffbypass_rx_main.gen_auto_mode.reset_synchronizer_resetdone_inst/rst_in_meta_i_1_n_0 | 1 | 5 | 5.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/gtwiz_reset_rx_done_int_reg_n_0 | 1 | 5 | 5.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/gen_gtwiz_userclk_rx_main.gtwiz_userclk_rx_active_sync | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__375_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[10].rx_data_good_cntr[10][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[10].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__51_n_0 | | 5 | 5 | 1.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__374_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__530_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/bitSlipCmd_to_bitSlipCtrller_9 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[9].rx_data_good_cntr[9][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[9].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/bitSlipCmd_to_bitSlipCtrller_10 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/bitSlipCmd_to_bitSlipCtrller_10 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__377_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__376_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[10].rx_data_good_cntr[10][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[10].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__529_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__391_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__425_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__528_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__527_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__526_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__381_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__525_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__535_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__382_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[9].rx_data_good_cntr[9][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[9].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__534_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/bitSlipCmd_to_bitSlipCtrller_9 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__524_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_1 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__383_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__424_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__560_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_7 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__384_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_8 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__570_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_3 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_5 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__385_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[8].rx_data_good_cntr[8][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[8].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__545_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__571_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__423_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_4 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_6 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__561_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__544_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__386_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__56_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/bitSlipCmd_to_bitSlipCtrller_8 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__562_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_10 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__543_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_9 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/reset_all_in | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__563_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__387_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__542_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__541_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__564_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__388_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__539_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__565_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__540_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__566_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__389_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__537_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__538_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__316_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__567_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__315_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__314_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__568_n_0 | | 5 | 5 | 1.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__313_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__422_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[7].rx_data_good_cntr[7][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[7].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__569_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__319_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__318_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_5 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_2 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_7 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_1 | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__356_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/bitSlipCmd_to_bitSlipCtrller_7 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_9 | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/bitSlipCmd_to_bitSlipCtrller_11 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[11].rx_data_good_cntr[11][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[11].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__366_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/reset_all_in | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__367_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_4 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__104_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__421_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/bitSlipCmd_to_bitSlipCtrller_2 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[6].rx_data_good_cntr[6][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[6].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[2].rx_data_good_cntr[2][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[2].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__357_n_0 | | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_8 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/bitSlipCmd_to_bitSlipCtrller_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_10 | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_3 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__248_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__114_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/bitSlipCmd_to_bitSlipCtrller_3 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[3].rx_data_good_cntr[3][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[3].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_6 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__358_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__258_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__359_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__115_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/bitSlipCmd_to_bitSlipCtrller_1 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 5 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[1].rx_data_good_cntr[1][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[1].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__259_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__420_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__360_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__361_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__362_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__249_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__105_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/bitSlipCmd_to_bitSlipCtrller_4 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[4].rx_data_good_cntr[4][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[4].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__363_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__250_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__364_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__419_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/consecCorrectHeaders0 | | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/bitSlipCmd_to_bitSlipCtrller_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__106_n_0 | | 2 | 5 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[5].rx_data_good_cntr[5][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[5].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/g_rx_data_good[0].rx_data_good_cntr[0][4]_i_2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[0].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__251_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__365_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 5 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_3 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/bitSlipCmd_to_bitSlipCtrller_5 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__252_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__332_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__107_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_channel_container[2].gen_enabled_channel.gthe3_channel_wrapper_inst/channel_inst/rst_in0 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_6 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__253_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__342_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_2 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__50_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__108_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__254_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__343_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_7 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__333_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__255_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_8 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__109_n_0 | | 4 | 5 | 1.25 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__82_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/reset_all_in | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__256_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_4 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_10 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_5 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__110_n_0 | | 4 | 5 | 1.25 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/rst_in_out_i_1__0_n_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__257_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__334_n_0 | | 3 | 5 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_9 | 1 | 5 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_0 | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__111_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__335_n_0 | | 4 | 5 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/mgtTxReset_s_reg_1 | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/g_rx_data_good[4].rx_data_good_cntr[4][4]_i_2__1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxdatapath_multilink_gen[4].gbt_rxdatapath_inst/decoder/gbtFrame_gen.reedSolomonDecoder0to50/SR[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__336_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__112_n_0 | | 3 | 5 | 1.67 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__337_n_0 | | 3 | 5 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/consecCorrectHeaders0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/ngccmPinsOutReg[sec_jtag_tdi] | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 1 | 5 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/bitSlipCmd_to_bitSlipCtrller_4 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 1 | 5 | 5.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/FSM_sequential_c_state[4]_i_1__418_n_0 | | 2 | 5 | 2.50 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__7_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__351_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__81_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__298_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__34_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__6_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__277_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__5_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__429_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__297_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__439_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__33_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__20_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__20_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__278_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__4_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__3_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__71_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__438_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__300_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__299_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__2_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__279_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__1_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__72_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__0_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__428_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__302_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__280_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__23_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__10_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | ipb_clk | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__66_n_0 | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__73_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__301_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__546_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__74_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__281_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__9_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__42_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__42_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__53_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__547_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__304_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__303_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__75_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__536_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__221_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__305_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__185_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__461_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__76_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__344_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__220_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__460_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__19_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__19_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__219_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__77_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__459_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__41_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__41_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__353_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__44_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__47_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__458_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__218_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__217_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__216_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__572_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__184_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__457_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__18_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__18_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__456_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__215_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | ipb_clk | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__65_n_0 | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__582_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__455_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__214_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__11_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__213_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__183_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__454_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__583_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__223_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__453_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__21_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__222_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__22_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__463_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__573_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__212_n_0 | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__462_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__43_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__12_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__13_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__392_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__574_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__17_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__17_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__452_n_0 | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__485_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__40_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__40_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__14_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__403_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__188_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__575_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__402_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__198_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__484_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__86_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__15_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__182_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__199_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__576_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__483_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__189_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__16_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__190_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__42_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__181_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__17_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__577_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__192_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__482_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__393_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__193_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__18_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__481_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__480_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__194_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__578_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__394_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__19_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__479_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__579_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__425_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__195_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__20_n_0 | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__60_n_0 | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__196_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__396_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__41_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__580_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__180_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__477_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__197_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__395_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__271_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__87_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__478_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | ipb_clk | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__59_n_0 | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__487_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__581_n_0 | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__406_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__16_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__16_n_0 | 2 | 6 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__405_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__486_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__191_n_0 | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__398_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__397_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__15_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__15_n_0 | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__355_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__38_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__38_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__476_n_0 | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__179_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__236_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__246_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__400_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__404_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__64_n_0 | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__399_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__247_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__173_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__37_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__37_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__415_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__172_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__178_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__237_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__238_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__200_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__414_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__171_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__401_n_0 | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__170_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__210_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__239_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__169_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__168_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__177_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__211_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__240_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__51_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__39_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__201_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__241_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__167_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__202_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__166_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__14_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__14_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__187_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__203_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__242_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__165_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__175_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__204_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__243_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__174_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__205_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__164_n_0 | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__244_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__245_n_0 | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__354_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__128_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__206_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__292_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__138_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__291_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__36_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__36_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__186_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__13_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__13_n_0 | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__40_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__207_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__139_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__149_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__116_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__148_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | ipb_clk | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__63_n_0 | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__129_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__147_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__208_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__127_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__146_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__126_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__176_n_0 | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__130_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__12_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__12_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__209_n_0 | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__145_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__131_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__118_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__117_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__144_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__48_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__132_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__120_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__143_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__119_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__142_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__133_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__8_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__8_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__141_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__122_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__134_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__121_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__47_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__47_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__38_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__151_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__124_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__150_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__135_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__123_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__140_n_0 | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 6 | 6 | 1.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__136_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__533_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__125_n_0 | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__137_n_0 | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__449_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__37_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__448_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__7_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__7_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__346_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_init_sm_i/idle_xmit_cntr | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_init_sm_i/wait_for_lane_up_r_reg_0[0] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__368_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__58_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__345_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__320_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__447_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__88_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__446_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__378_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__36_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__330_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__6_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__6_n_0 | 2 | 6 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__35_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__35_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__89_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__380_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__445_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__331_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__444_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__379_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__62_n_0 | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__321_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__46_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__532_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__443_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__369_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__322_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__45_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__323_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__442_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__324_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__531_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__80_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__441_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__370_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | ipb_clk | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__61_n_0 | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__325_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__348_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__338_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__451_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__371_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | CLKFBIN | i_AXI4_to_ipbus/timer0 | i_AXI4_to_ipbus/i_r_FIFO/FSM_sequential_axi_state_reg[2]_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__90_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__340_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__341_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__530_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__450_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__390_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__326_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__372_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__113_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__464_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__317_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/lpgbtfpga_framealigner_inst/bitSlipCounter_s | i_tcds2_if/rx_uplinkRst_n_bit_sync_320/i_in_out | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__373_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__475_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__52_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__35_n_0 | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__327_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__417_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__347_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/wait_for_wr_en[5]_i_1_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/SR[0] | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__474_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__9_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__9_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__339_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__374_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__328_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__27_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__27_n_0 | 2 | 6 | 3.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/block_sync_sm_gtx0_i/system_reset_r2 | 3 | 6 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__375_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__440_n_0 | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__10_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__10_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__85_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__5_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__5_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__466_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__529_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__84_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__465_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__376_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__329_n_0 | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__522_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__512_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__34_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__34_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__528_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__377_n_0 | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__468_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__308_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__391_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__527_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__467_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__526_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__470_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__469_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__424_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__49_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__310_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__381_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__535_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__427_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__525_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__534_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__269_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__309_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__472_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__488_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__382_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__55_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__471_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__268_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__524_n_0 | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__33_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__33_n_0 | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__46_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__46_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__267_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__26_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__26_n_0 | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__413_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__312_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__498_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__266_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__383_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__408_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__32_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__560_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__473_n_0 | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__311_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__83_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__384_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__499_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__423_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__265_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__570_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__407_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__561_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__545_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__264_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__263_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__262_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__25_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__25_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__385_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__261_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__571_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__489_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__544_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__500_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__270_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__513_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__490_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__510_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__514_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__386_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__562_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__543_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__260_n_0 | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__31_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__32_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__32_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__511_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__50_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__548_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__523_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__563_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__542_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__387_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__161_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__541_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__491_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__540_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__501_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__502_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__422_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__564_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__539_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__515_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__160_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__388_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__538_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__565_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__558_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__492_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__537_n_0 | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__30_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__503_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__566_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__517_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__389_n_0 | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__56_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__159_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__426_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__24_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__24_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__315_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__567_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__559_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__316_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__504_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__493_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__313_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__568_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__516_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__158_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__314_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__518_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__157_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__505_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__549_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__569_n_0 | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__318_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__494_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__421_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__319_n_0 | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__350_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__156_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__506_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__155_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__519_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__356_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__29_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__507_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__550_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__11_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__11_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__495_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__31_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__31_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__520_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__366_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__154_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__521_n_0 | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__508_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__551_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__367_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__153_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__163_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__496_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__509_n_0 | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__552_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__2_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__2_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__357_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__45_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__45_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__162_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__349_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__152_n_0 | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__57_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__412_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__23_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__23_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__104_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__497_n_0 | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__553_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__28_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__30_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__30_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__411_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__554_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__3_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__3_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__358_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__416_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__410_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__420_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__224_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__555_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__248_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__22_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__22_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__114_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__27_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__409_n_0 | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__359_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__101_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__258_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__234_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__360_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__1_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__100_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__556_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__235_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__99_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__225_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__98_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__44_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__44_n_0 | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__259_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__115_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__361_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__284_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__557_n_0 | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__362_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__4_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__4_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__226_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__97_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__95_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__227_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__249_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__26_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__419_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__363_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__96_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__105_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__294_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__364_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__93_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__228_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__250_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__365_n_0 | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__0_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__0_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__94_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__229_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__54_n_0 | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__293_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__102_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__272_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__230_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__285_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__106_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__283_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__251_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__103_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__332_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__92_n_0 | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__286_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | TX_CLKEN_repN_67 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 3 | 6 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__231_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__21_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__21_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__282_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__252_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | TX_CLKEN_repN_3 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__68_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__232_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__342_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__287_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__107_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__233_n_0 | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__288_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__253_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__78_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__343_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__25_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__437_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__79_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__108_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__254_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__43_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__43_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__333_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__29_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__29_n_0 | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__436_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__24_n_0 | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__289_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__273_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__255_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__435_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__39_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__39_n_0 | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__109_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__352_n_0 | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__69_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__434_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__256_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__295_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__274_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__296_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 5 | 6 | 1.20 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__276_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__334_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__257_n_0 | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__110_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__418_n_0 | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__290_n_0 | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | ipb_clk | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__67_n_0 | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__335_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__70_n_0 | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__433_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__432_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__111_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__82_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__307_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__336_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__91_n_0 | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/ui_align_cntr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__337_n_0 | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__275_n_0 | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__8_n_0 | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/reset_synchronizer_rx_done_inst/gtwiz_reset_rx_done_out[0] | 4 | 6 | 1.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__431_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__112_n_0 | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 2 | 6 | 3.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__306_n_0 | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait_cnt[1]_i_1__430_n_0 | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/slave_wait | 1 | 6 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/clkSlipProcess.timer[5]_i_2__28_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].rxBitSlipControl/clkSlipProcess.timer[5]_i_1__28_n_0 | 1 | 6 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/nbCheckedHeaders0 | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 7 | 1.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/nbCheckedHeaders0 | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/nbCheckedHeaders0 | | 4 | 7 | 1.75 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/u_rst_sync_gtx_reset_comb/SR[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | DRPclk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.standard_cc_module_inst/reset_count_start_reg_n_0 | | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | ipb_clk | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | ipb_clk | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | ipb_clk | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | ipb_clk | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | ipb_clk | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | ipb_clk | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | ipb_clk | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | ipb_clk | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | ipb_clk | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_pi_ctrl/phase_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_reset_tx_done_sync/syncstages_ff[3] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | tx_wordclk | TX_CLKEN_repN_45 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 6 | 7 | 1.17 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/AR[0] | 2 | 7 | 3.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/AR[0] | 2 | 7 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 7 | 1.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/nbCheckedHeaders0 | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 7 | 1.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/AR[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 1 | 7 | 7.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/nbCheckedHeaders0 | | 4 | 7 | 1.75 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/nbCheckedHeaders0 | | 4 | 7 | 1.75 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/nbCheckedHeaders0 | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 5 | 7 | 1.40 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/nbCheckedHeaders0 | | 2 | 7 | 3.50 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/nbCheckedHeaders0 | | 5 | 7 | 1.40 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 2 | 7 | 3.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/AR[0] | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/nbCheckedHeaders0 | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 3 | 7 | 2.33 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/bit_ctrl/E[0] | | 4 | 7 | 1.75 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][24]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/gbtBank_Clk_gen[10].cnt_reg[10][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[29].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/gbtBank_Clk_gen[9].cnt_reg[9][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__59_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__69_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__70_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__60_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__61_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__548_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__82_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__72_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__62_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__63_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__64_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__65_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__66_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__67_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[52][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__68_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][24]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | CLKFBIN | | clk125_MMCM_locked | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[37].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[12].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | CLKFBIN | i_AXI4_to_ipbus/i_r_FIFO/empty_i_reg_1[0] | | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | CLKFBIN | i_AXI4_to_ipbus/length_cntr0 | | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__383_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__393_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__394_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__384_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__385_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__386_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__387_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__388_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__389_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__390_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__391_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[53][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__392_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[19].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][10]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__119_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__129_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__130_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__120_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__121_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__122_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__123_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__124_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__125_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__126_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__127_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__128_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[28].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/u_cdc_hard_err_init/E[0] | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/u_rst_sync_reset_initclk/stg5_reg_0[0] | 2 | 8 | 4.00 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cdr_reset_fsm_cntr_r[7]_i_1_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/LINK_RESET_reg[0]_0[0] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[45].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[2] | 2 | 8 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_1__1_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[2] | 1 | 8 | 8.00 | | ipb_clk | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[3] | 2 | 8 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_1__2_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[3] | 1 | 8 | 8.00 | | ipb_clk | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[4] | 2 | 8 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_1__3_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[4] | 2 | 8 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[5] | 1 | 8 | 8.00 | | ipb_clk | i_I2C_if/I2C_array[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_1__4_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[5] | 3 | 8 | 2.67 | | ipb_clk | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_1__6_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[7] | 1 | 8 | 8.00 | | ipb_clk | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[6] | 2 | 8 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_1__5_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[6] | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[7] | 2 | 8 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[8] | 2 | 8 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_1__7_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[8] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][24]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__79_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][25]_0 | 2 | 8 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/usrclk_tx_active_in_extend_cntr[7]_i_1_n_0 | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/mmcm_not_locked_out | 2 | 8 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ch0_ctrl_inst/auto_neg_intr_gen.tx_ch0_data[46]_i_1_n_0 | | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__80_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/gen_fwft.ram_regout_en | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__547_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__81_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__71_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][26]_0 | 2 | 8 | 4.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/gtx_rx_pcsreset_comb | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_active_out | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][25]_0 | 2 | 8 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/gbtBank_Clk_gen[10].cnt_reg[10][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__479_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][10]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__489_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][11]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__490_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__480_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__481_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__482_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__483_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__395_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__405_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/gbtBank_Clk_gen[9].cnt_reg[9][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__484_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__485_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][7]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__486_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__487_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[58][9]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__488_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/gbtBank_Clk_gen[8].cnt_reg[8][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/gbtBank_Clk_gen[7].cnt_reg[7][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][16]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__263_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__181_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__406_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__396_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__273_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__188_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__187_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__186_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__185_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__184_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][21]_0 | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__183_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__182_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__180_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__190_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][26]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__189_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[29][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__179_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__274_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[44].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__264_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__265_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__266_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__443_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][26]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__453_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__454_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__444_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__445_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__446_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__447_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__448_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__449_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__450_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__451_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[67][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__452_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__267_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__268_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/gbtBank_Clk_gen[6].cnt_reg[6][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__269_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][23]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__270_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__271_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[23][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__272_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[15].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/gbtBank_Clk_gen[5].cnt_reg[5][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__563_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__573_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/gbtBank_Clk_gen[4].cnt_reg[4][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__574_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__9_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__10_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__0_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__1_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__2_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__3_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__4_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__5_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__6_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__7_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__564_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[20][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__8_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][18]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__565_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][19]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__566_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][20]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][22]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__567_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__568_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__569_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__570_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][6]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__281_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__286_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__571_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/gbtBank_Clk_gen[2].cnt_reg[2][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[59][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__572_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__280_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__279_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__278_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__277_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__276_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/gbtBank_Clk_gen[1].cnt_reg[1][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__285_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__275_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__191_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][10]_0 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__201_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__202_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__399_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__400_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__401_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__402_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][1]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__192_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__193_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 3 | 8 | 2.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/E[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/AR[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[16].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__194_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__512_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__511_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__510_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__509_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][20]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__507_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__508_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__506_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__514_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__505_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__504_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__397_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__398_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__403_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[30][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__404_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__195_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][5]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__196_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][6]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__197_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][7]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__198_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][8]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__199_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[60][9]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__200_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/gbtBank_Clk_gen[11].cnt_reg[11][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__441_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__431_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__432_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__442_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__433_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__434_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__435_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__436_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__437_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__438_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__439_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[31][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__440_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/gbtBank_Clk_gen[11].cnt_reg[11][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][16]_1 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__359_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][26]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__369_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][27]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__370_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][17]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__131_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__141_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__142_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__132_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__133_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__134_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__135_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__87_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__136_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__137_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__138_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][8]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__139_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[32][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__140_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__360_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][18]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__282_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__283_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__361_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][19]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__362_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][20]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__363_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][21]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__364_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][22]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/gbtBank_Clk_gen[10].cnt_reg[10][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__365_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__366_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__155_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__165_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__166_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__156_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__157_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__158_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__159_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][21]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__160_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__161_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__162_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__163_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[33][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__164_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__367_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[61][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__368_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/gbtBank_Clk_gen[9].cnt_reg[9][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][0]_1 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__551_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__561_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/gbtBank_Clk_gen[8].cnt_reg[8][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][11]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__562_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__552_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__553_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__554_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][5]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__467_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__477_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__478_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__468_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__469_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__470_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__471_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__472_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__473_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__474_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__475_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[34][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__476_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__555_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__556_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__557_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__558_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__559_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[62][9]_0 | 2 | 8 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/gbtBank_Clk_gen[7].cnt_reg[7][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__560_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/gbtBank_Clk_gen[6].cnt_reg[6][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][16]_1 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__239_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][26]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__249_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][27]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__203_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__213_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][26]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__214_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__204_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__206_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__205_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__207_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__208_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__210_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__209_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__211_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[35][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__212_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__250_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__240_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__527_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__537_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__241_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][19]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__242_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][20]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__243_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][21]_0 | 2 | 8 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/gbtBank_Clk_gen[5].cnt_reg[5][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__419_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__429_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__430_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][1]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__420_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__421_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__422_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__423_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__424_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__425_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__426_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__427_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[36][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__428_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__244_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__245_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][23]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__246_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][24]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__247_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[63][25]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__248_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/gbtBank_Clk_gen[4].cnt_reg[4][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/gbtBank_Clk_gen[3].cnt_reg[3][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__83_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__93_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[40][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__284_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__455_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__94_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__84_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__85_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__86_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][21]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__88_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__89_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__90_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][24]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__91_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[37][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__92_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][10]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__465_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__466_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__456_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__457_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__458_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][4]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__459_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][5]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__460_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__143_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][1]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__153_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__154_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__144_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__145_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__146_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__147_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__148_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__149_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__150_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__151_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[38][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__152_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/gbtBank_Clk_gen[2].cnt_reg[2][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__461_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][7]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__462_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][8]_0 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__463_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[64][9]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__464_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][16]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__251_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__261_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__262_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__252_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__253_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__254_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__255_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__256_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__257_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__258_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__259_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[21][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__260_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/gbtBank_Clk_gen[1].cnt_reg[1][7][0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][16]_1 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__491_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][26]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__501_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][17]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__502_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__492_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__493_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__494_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/E[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/AR[0] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__495_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__503_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[39][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__513_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__75_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__76_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__496_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][22]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__497_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__330_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__307_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__308_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__498_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][24]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__499_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__500_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[65][25]_0 | 2 | 8 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/gbtBank_Clk_gen[11].cnt_reg[11][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].patternSearch/gbtBank_Clk_gen[10].cnt_reg[10][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__215_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__225_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__226_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__332_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__331_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__329_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__328_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__327_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__326_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__325_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__216_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__217_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__324_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__334_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__333_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[56][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__323_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__218_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][4]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].patternSearch/gbtBank_Clk_gen[9].cnt_reg[9][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__219_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__220_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][6]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__221_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][7]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__222_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][8]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__223_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[66][9]_0 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__356_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__355_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__354_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__353_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][21]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__352_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__351_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__350_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__349_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__224_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/gbtBank_Clk_gen[3].cnt_reg[3][7][0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][0]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__348_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__358_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__357_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[55][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__347_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/gbtBank_Clk_gen[8].cnt_reg[8][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__287_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][10]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__297_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__299_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__309_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][11]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__298_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][1]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__288_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__303_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__304_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__305_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__306_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__538_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__528_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][18]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__529_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__530_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__531_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__532_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__533_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__534_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__535_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[41][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__536_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][2]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__289_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__290_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][4]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__291_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__292_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__293_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][7]_0 | 1 | 8 | 8.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/gbtBank_Clk_gen[7].cnt_reg[7][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__294_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][8]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__295_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[24][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__515_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__525_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__526_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__516_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__517_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__518_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__519_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__520_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__521_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__522_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__523_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[42][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__524_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__296_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/gbtBank_Clk_gen[6].cnt_reg[6][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][26]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__11_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__21_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 3 | 8 | 2.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/gbtBank_Clk_gen[5].cnt_reg[5][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__22_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][17]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__12_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__13_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__14_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__15_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__16_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][16]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__167_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__178_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__177_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__168_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__169_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__170_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__171_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__172_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__173_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__174_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__175_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[43][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__176_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__17_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__18_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[25][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__19_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/gbtBank_Clk_gen[4].cnt_reg[4][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__20_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/gbtBank_Clk_gen[3].cnt_reg[3][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__227_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__237_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__238_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][1]_0 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__228_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][2]_0 | 2 | 8 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/gbtBank_Clk_gen[2].cnt_reg[2][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__229_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__230_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__231_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__23_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__33_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__34_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__24_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__25_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__26_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__27_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__28_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__29_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__30_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__31_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[44][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__32_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__232_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__233_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__234_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][8]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__235_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[26][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__236_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/gbtBank_Clk_gen[1].cnt_reg[1][7][0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/E[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/AR[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][16]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__107_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][26]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__117_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__35_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__45_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__46_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__36_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__37_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__38_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__39_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__40_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__41_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__42_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__118_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__43_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__108_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[45][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__44_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__109_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][19]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__110_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][20]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].patternSearch/gbtBank_Clk_gen[8].cnt_reg[8][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__111_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][21]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__112_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][0]_1 | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][10]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__407_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__417_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][1]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__418_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__408_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__409_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__410_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__411_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__412_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__413_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__414_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[46][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__415_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__416_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__113_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__114_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__115_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[27][25]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__116_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].patternSearch/gbtBank_Clk_gen[7].cnt_reg[7][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__311_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__47_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__57_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__58_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__48_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__49_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__50_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__51_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__52_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__53_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__54_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__55_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[47][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__56_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].patternSearch/gbtBank_Clk_gen[6].cnt_reg[6][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__73_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__74_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__321_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__322_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__312_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][2]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__313_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__314_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__315_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][0]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__335_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][10]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__345_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__346_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__336_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__337_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__338_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__339_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][5]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__340_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__341_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__342_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__343_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[48][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__344_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__77_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[57][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__78_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 1 | 8 | 8.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__316_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][6]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__317_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__318_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][8]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__319_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 3 | 8 | 2.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].patternSearch/gbtBank_Clk_gen[5].cnt_reg[5][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[28][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][10]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][0]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__371_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__381_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__382_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__372_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__373_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__374_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][4]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__375_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][5]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__376_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][6]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__377_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][7]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__378_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][8]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__379_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[22][9]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__380_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__320_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].patternSearch/gbtBank_Clk_gen[11].cnt_reg[11][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].patternSearch/gbtBank_Clk_gen[2].cnt_reg[2][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].patternSearch/gbtBank_Clk_gen[3].cnt_reg[3][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].patternSearch/gbtBank_Clk_gen[1].cnt_reg[1][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].patternSearch/gbtBank_Clk_gen[4].cnt_reg[4][7][0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/DONE_o_reg[0] | 3 | 8 | 2.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].patternSearch/E[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_tx_phase_aligner_fsm/AR[0] | 3 | 8 | 2.67 | | tx_wordclk | TX_CLKEN_repN_2 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 4 | 8 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[0] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_1_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[0] | 3 | 8 | 2.67 | | ipb_clk | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[8][24]_0[1] | 2 | 8 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_1__0_n_0 | ctrl_regs_inst/regs_reg[8][24]_0[1] | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[54][9]_0 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__95_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__105_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__106_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__96_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__97_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__98_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][20]_0 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__99_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__100_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__101_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__102_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][24]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[8].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__103_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_8 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[49][25]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/i2c_gen[9].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__104_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_9 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][11]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__310_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][1]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__300_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][2]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__301_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[50][3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__302_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 2 | 8 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[36].ngFEC_module/bkp_buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 8 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 8 | 1.33 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 8 | 2.67 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 8 | 1.60 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][16]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[0].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__539_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][26]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[10].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__549_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_10 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][27]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[11].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__550_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_11 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][17]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[1].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__540_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_1 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][18]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[2].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__541_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_2 | 3 | 8 | 2.67 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][19]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[3].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__542_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_3 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][20]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[4].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__543_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_4 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__544_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_5 | 1 | 8 | 8.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[5].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][21]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][22]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[6].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__545_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_6 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/byte_ctrl/dcnt | ctrl_regs_inst/regs_reg[51][23]_0 | 2 | 8 | 4.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/i2c_gen[7].LocalI2CBridge_fe/i2c_master/txr[7]_i_2__546_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m_reg[3]_7 | 2 | 8 | 4.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/rx_uplinkRst_n_bit_sync_320/i_in_out | 4 | 9 | 2.25 | | CLKFBIN | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 3 | 9 | 3.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/core_reset_logic_i/SR[0] | 6 | 9 | 1.50 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/new_gtx_rx_pcsreset_comb | 2 | 9 | 4.50 | | tx_wordclk | TX_CLKEN_repN_27 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 5 | 9 | 1.80 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_444[0] | SFP_GEN[13].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_298[0] | SFP_GEN[24].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_443[0] | SFP_GEN[13].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_46[0] | SFP_GEN[44].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_295[0] | SFP_GEN[25].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_291[0] | SFP_GEN[25].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_288[0] | SFP_GEN[25].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_269[0] | SFP_GEN[27].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_263[0] | SFP_GEN[27].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_460[0] | SFP_GEN[12].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_465[0] | SFP_GEN[12].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_273[0] | SFP_GEN[26].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_274[0] | SFP_GEN[26].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_461[0] | SFP_GEN[12].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_437[0] | SFP_GEN[14].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_268[0] | SFP_GEN[27].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_463[0] | SFP_GEN[12].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_290[0] | SFP_GEN[25].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_47[0] | SFP_GEN[44].ngFEC_module/bram_array[3].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_270[0] | SFP_GEN[27].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_292[0] | SFP_GEN[25].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_30[0] | SFP_GEN[45].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_476[0] | SFP_GEN[11].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_454[0] | SFP_GEN[12].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_316[0] | SFP_GEN[23].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_446[0] | SFP_GEN[13].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_464[0] | SFP_GEN[12].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_471[0] | SFP_GEN[11].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_453[0] | SFP_GEN[13].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_473[0] | SFP_GEN[11].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_440[0] | SFP_GEN[14].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_441[0] | SFP_GEN[13].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_433[0] | SFP_GEN[14].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_436[0] | SFP_GEN[14].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_452[0] | SFP_GEN[13].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_432[0] | SFP_GEN[14].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_449[0] | SFP_GEN[13].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_455[0] | SFP_GEN[12].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_438[0] | SFP_GEN[14].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_466[0] | SFP_GEN[12].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_468[0] | SFP_GEN[11].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_472[0] | SFP_GEN[11].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_475[0] | SFP_GEN[11].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_469[0] | SFP_GEN[11].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_301[0] | SFP_GEN[24].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_474[0] | SFP_GEN[11].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_48[0] | SFP_GEN[44].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_281[0] | SFP_GEN[26].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_27[0] | SFP_GEN[45].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | CLKFBIN | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/p_1_in_0 | 2 | 10 | 5.00 | | CLKFBIN | | ctrl_regs_inst/rst_in | 2 | 10 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | CLKFBIN | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_r_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_315[0] | SFP_GEN[23].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_282[0] | SFP_GEN[26].ngFEC_module/bram_array[2].buffer_server/SR[0] | 2 | 10 | 5.00 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/gen_sdpram.xpm_memory_base_inst/gen_wr_a.gen_word_narrow.mem_reg_0_63_0_6_i_1_n_0 | | 2 | 10 | 5.00 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/gen_sdpram.xpm_memory_base_inst/gen_wr_a.gen_word_narrow.mem_reg_128_191_0_6_i_1_n_0 | | 2 | 10 | 5.00 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/gen_sdpram.xpm_memory_base_inst/gen_wr_a.gen_word_narrow.mem_reg_192_255_0_6_i_1_n_0 | | 2 | 10 | 5.00 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/gen_sdpram.xpm_memory_base_inst/gen_wr_a.gen_word_narrow.mem_reg_64_127_0_6_i_1_n_0 | | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_3[0] | SFP_GEN[47].ngFEC_module/bram_array[8].buffer_server/SR[0] | 5 | 10 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_481[0] | SFP_GEN[10].ngFEC_module/bram_array[11].buffer_server/SR[0] | 5 | 10 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | CLKFBIN | i_AXI4_to_ipbus/axi_addr0 | | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_314[0] | SFP_GEN[23].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_462[0] | SFP_GEN[12].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | CLKFBIN | i_AXI4_to_ipbus/ipb_addr[9] | | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_313[0] | SFP_GEN[23].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_447[0] | SFP_GEN[13].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_tx_pll_timer_ctr[9]_i_1_n_0 | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_470[0] | SFP_GEN[11].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_467[0] | SFP_GEN[11].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_309[0] | SFP_GEN[24].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_479[0] | SFP_GEN[11].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_286[0] | SFP_GEN[25].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_279[0] | SFP_GEN[26].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_297[0] | SFP_GEN[25].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_294[0] | SFP_GEN[25].ngFEC_module/bram_array[3].buffer_server/SR[0] | 6 | 10 | 1.67 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_482[0] | SFP_GEN[10].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_458[0] | SFP_GEN[12].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_448[0] | SFP_GEN[13].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_293[0] | SFP_GEN[25].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_5[0] | SFP_GEN[47].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_262[0] | SFP_GEN[27].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_501[0] | SFP_GEN[9].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_525[0] | SFP_GEN[7].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_265[0] | SFP_GEN[27].ngFEC_module/bram_array[6].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_529[0] | SFP_GEN[7].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_535[0] | SFP_GEN[6].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_284[0] | SFP_GEN[26].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_544[0] | SFP_GEN[6].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_545[0] | SFP_GEN[5].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_283[0] | SFP_GEN[26].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_494[0] | SFP_GEN[9].ngFEC_module/bram_array[11].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_520[0] | SFP_GEN[7].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_50[0] | SFP_GEN[44].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_512[0] | SFP_GEN[8].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_523[0] | SFP_GEN[7].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_502[0] | SFP_GEN[9].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_513[0] | SFP_GEN[8].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_526[0] | SFP_GEN[7].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_52[0] | SFP_GEN[43].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_530[0] | SFP_GEN[7].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_519[0] | SFP_GEN[7].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_53[0] | SFP_GEN[43].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_504[0] | SFP_GEN[9].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_496[0] | SFP_GEN[9].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_516[0] | SFP_GEN[8].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_289[0] | SFP_GEN[25].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_536[0] | SFP_GEN[6].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_537[0] | SFP_GEN[6].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_299[0] | SFP_GEN[24].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_54[0] | SFP_GEN[43].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_547[0] | SFP_GEN[5].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_511[0] | SFP_GEN[8].ngFEC_module/bram_array[7].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_546[0] | SFP_GEN[5].ngFEC_module/bram_array[11].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_312[0] | SFP_GEN[23].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_505[0] | SFP_GEN[9].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_538[0] | SFP_GEN[6].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_31[0] | SFP_GEN[45].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_495[0] | SFP_GEN[9].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_498[0] | SFP_GEN[9].ngFEC_module/bram_array[7].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_492[0] | SFP_GEN[10].ngFEC_module/bram_array[0].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_306[0] | SFP_GEN[24].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_506[0] | SFP_GEN[8].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_509[0] | SFP_GEN[8].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_276[0] | SFP_GEN[26].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_507[0] | SFP_GEN[8].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_518[0] | SFP_GEN[8].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_26[0] | SFP_GEN[45].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_490[0] | SFP_GEN[10].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_532[0] | SFP_GEN[6].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_308[0] | SFP_GEN[24].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_503[0] | SFP_GEN[9].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_260[0] | SFP_GEN[27].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_540[0] | SFP_GEN[6].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_497[0] | SFP_GEN[9].ngFEC_module/bram_array[8].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_508[0] | SFP_GEN[8].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_493[0] | SFP_GEN[9].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_510[0] | SFP_GEN[8].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_522[0] | SFP_GEN[7].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_528[0] | SFP_GEN[7].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_531[0] | SFP_GEN[7].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_533[0] | SFP_GEN[6].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_539[0] | SFP_GEN[6].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_305[0] | SFP_GEN[24].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_541[0] | SFP_GEN[6].ngFEC_module/bram_array[3].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_542[0] | SFP_GEN[6].ngFEC_module/bram_array[2].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_543[0] | SFP_GEN[6].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_491[0] | SFP_GEN[10].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_51[0] | SFP_GEN[43].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_499[0] | SFP_GEN[9].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_500[0] | SFP_GEN[9].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_517[0] | SFP_GEN[8].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_524[0] | SFP_GEN[7].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_514[0] | SFP_GEN[8].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_275[0] | SFP_GEN[26].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_534[0] | SFP_GEN[6].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_515[0] | SFP_GEN[8].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_521[0] | SFP_GEN[7].ngFEC_module/bram_array[10].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_527[0] | SFP_GEN[7].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_307[0] | SFP_GEN[24].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_595[0] | SFP_GEN[2].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_302[0] | SFP_GEN[24].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_60[0] | SFP_GEN[43].ngFEC_module/bram_array[3].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_550[0] | SFP_GEN[5].ngFEC_module/bram_array[7].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_266[0] | SFP_GEN[27].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_552[0] | SFP_GEN[5].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_598[0] | SFP_GEN[1].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_600[0] | SFP_GEN[1].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_277[0] | SFP_GEN[26].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_28[0] | SFP_GEN[45].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_602[0] | SFP_GEN[1].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_300[0] | SFP_GEN[24].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_296[0] | SFP_GEN[25].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_272[0] | SFP_GEN[26].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_271[0] | SFP_GEN[27].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_29[0] | SFP_GEN[45].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_278[0] | SFP_GEN[26].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_285[0] | SFP_GEN[25].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_261[0] | SFP_GEN[27].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_311[0] | SFP_GEN[23].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_310[0] | SFP_GEN[24].ngFEC_module/bram_array[0].buffer_server/SR[0] | 5 | 10 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_603[0] | SFP_GEN[1].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_548[0] | SFP_GEN[5].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_267[0] | SFP_GEN[27].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_558[0] | SFP_GEN[4].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_577[0] | SFP_GEN[3].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_304[0] | SFP_GEN[24].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_569[0] | SFP_GEN[4].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_575[0] | SFP_GEN[3].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_287[0] | SFP_GEN[25].ngFEC_module/bram_array[10].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_559[0] | SFP_GEN[4].ngFEC_module/bram_array[11].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_58[0] | SFP_GEN[43].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_280[0] | SFP_GEN[26].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_601[0] | SFP_GEN[1].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_604[0] | SFP_GEN[1].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_303[0] | SFP_GEN[24].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_564[0] | SFP_GEN[4].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_570[0] | SFP_GEN[4].ngFEC_module/bram_array[0].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_576[0] | SFP_GEN[3].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_561[0] | SFP_GEN[4].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_6[0] | SFP_GEN[47].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_586[0] | SFP_GEN[2].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_587[0] | SFP_GEN[2].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_597[0] | SFP_GEN[1].ngFEC_module/bram_array[13].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_591[0] | SFP_GEN[2].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_557[0] | SFP_GEN[5].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_599[0] | SFP_GEN[1].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_588[0] | SFP_GEN[2].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_578[0] | SFP_GEN[3].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_59[0] | SFP_GEN[43].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_55[0] | SFP_GEN[43].ngFEC_module/bram_array[8].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_585[0] | SFP_GEN[2].ngFEC_module/bram_array[11].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_21[0] | SFP_GEN[46].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_554[0] | SFP_GEN[5].ngFEC_module/bram_array[3].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_563[0] | SFP_GEN[4].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_246[0] | SFP_GEN[28].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_57[0] | SFP_GEN[43].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_582[0] | SFP_GEN[3].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_235[0] | SFP_GEN[29].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_580[0] | SFP_GEN[3].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_243[0] | SFP_GEN[29].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_231[0] | SFP_GEN[30].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_241[0] | SFP_GEN[29].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_225[0] | SFP_GEN[30].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_224[0] | SFP_GEN[30].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_207[0] | SFP_GEN[31].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_206[0] | SFP_GEN[32].ngFEC_module/bram_array[0].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_256[0] | SFP_GEN[28].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_590[0] | SFP_GEN[2].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_227[0] | SFP_GEN[30].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_242[0] | SFP_GEN[29].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_252[0] | SFP_GEN[28].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_250[0] | SFP_GEN[28].ngFEC_module/bram_array[8].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_248[0] | SFP_GEN[28].ngFEC_module/bram_array[10].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_240[0] | SFP_GEN[29].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_226[0] | SFP_GEN[30].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_236[0] | SFP_GEN[29].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_210[0] | SFP_GEN[31].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_220[0] | SFP_GEN[30].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_214[0] | SFP_GEN[31].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_238[0] | SFP_GEN[29].ngFEC_module/bram_array[7].buffer_server/SR[0] | 6 | 10 | 1.67 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_217[0] | SFP_GEN[31].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_204[0] | SFP_GEN[32].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_259[0] | SFP_GEN[27].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_215[0] | SFP_GEN[31].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_245[0] | SFP_GEN[29].ngFEC_module/bram_array[0].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_249[0] | SFP_GEN[28].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_221[0] | SFP_GEN[30].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_205[0] | SFP_GEN[32].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_232[0] | SFP_GEN[30].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_581[0] | SFP_GEN[3].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_583[0] | SFP_GEN[3].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_258[0] | SFP_GEN[28].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_594[0] | SFP_GEN[2].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_553[0] | SFP_GEN[5].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_257[0] | SFP_GEN[28].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_592[0] | SFP_GEN[2].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_230[0] | SFP_GEN[30].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_556[0] | SFP_GEN[5].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_56[0] | SFP_GEN[43].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_567[0] | SFP_GEN[4].ngFEC_module/bram_array[3].buffer_server/SR[0] | 6 | 10 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_573[0] | SFP_GEN[3].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_584[0] | SFP_GEN[2].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_254[0] | SFP_GEN[28].ngFEC_module/bram_array[4].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_579[0] | SFP_GEN[3].ngFEC_module/bram_array[4].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_549[0] | SFP_GEN[5].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_596[0] | SFP_GEN[2].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_253[0] | SFP_GEN[28].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_568[0] | SFP_GEN[4].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_202[0] | SFP_GEN[32].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_555[0] | SFP_GEN[5].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_25[0] | SFP_GEN[45].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_239[0] | SFP_GEN[29].ngFEC_module/bram_array[6].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_255[0] | SFP_GEN[28].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_24[0] | SFP_GEN[46].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_229[0] | SFP_GEN[30].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_222[0] | SFP_GEN[30].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_565[0] | SFP_GEN[4].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_571[0] | SFP_GEN[3].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_22[0] | SFP_GEN[46].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_562[0] | SFP_GEN[4].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_212[0] | SFP_GEN[31].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_551[0] | SFP_GEN[5].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_566[0] | SFP_GEN[4].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_203[0] | SFP_GEN[32].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_572[0] | SFP_GEN[3].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_574[0] | SFP_GEN[3].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_560[0] | SFP_GEN[4].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_244[0] | SFP_GEN[29].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_589[0] | SFP_GEN[2].ngFEC_module/bram_array[7].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_593[0] | SFP_GEN[2].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_96[0] | SFP_GEN[40].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_76[0] | SFP_GEN[42].ngFEC_module/bram_array[0].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_90[0] | SFP_GEN[40].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_97[0] | SFP_GEN[40].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_98[0] | SFP_GEN[40].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_73[0] | SFP_GEN[42].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_63[0] | SFP_GEN[43].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_74[0] | SFP_GEN[42].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_84[0] | SFP_GEN[41].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_621[0] | SFP_GEN[0].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_66[0] | SFP_GEN[42].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_78[0] | SFP_GEN[41].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_87[0] | SFP_GEN[41].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_233[0] | SFP_GEN[29].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_83[0] | SFP_GEN[41].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_237[0] | SFP_GEN[29].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_9[0] | SFP_GEN[47].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_216[0] | SFP_GEN[31].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_615[0] | SFP_GEN[0].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_228[0] | SFP_GEN[30].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_77[0] | SFP_GEN[41].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_213[0] | SFP_GEN[31].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_622[0] | SFP_GEN[0].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_61[0] | SFP_GEN[43].ngFEC_module/bram_array[2].buffer_server/SR[0] | 6 | 10 | 1.67 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_93[0] | SFP_GEN[40].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_95[0] | SFP_GEN[40].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_610[0] | SFP_GEN[0].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_99[0] | SFP_GEN[40].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_72[0] | SFP_GEN[42].ngFEC_module/bram_array[4].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_611[0] | SFP_GEN[0].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_613[0] | SFP_GEN[0].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_616[0] | SFP_GEN[0].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_64[0] | SFP_GEN[42].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_71[0] | SFP_GEN[42].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_607[0] | SFP_GEN[1].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_69[0] | SFP_GEN[42].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_609[0] | SFP_GEN[1].ngFEC_module/bram_array[0].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_618[0] | SFP_GEN[0].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_67[0] | SFP_GEN[42].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_8[0] | SFP_GEN[47].ngFEC_module/bram_array[3].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_68[0] | SFP_GEN[42].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_7[0] | SFP_GEN[47].ngFEC_module/bram_array[4].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_82[0] | SFP_GEN[41].ngFEC_module/bram_array[7].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_79[0] | SFP_GEN[41].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_86[0] | SFP_GEN[41].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_70[0] | SFP_GEN[42].ngFEC_module/bram_array[6].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_75[0] | SFP_GEN[42].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_62[0] | SFP_GEN[43].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_80[0] | SFP_GEN[41].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_88[0] | SFP_GEN[41].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_65[0] | SFP_GEN[42].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_608[0] | SFP_GEN[1].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_89[0] | SFP_GEN[41].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_620[0] | SFP_GEN[0].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_92[0] | SFP_GEN[40].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_605[0] | SFP_GEN[1].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_81[0] | SFP_GEN[41].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_614[0] | SFP_GEN[0].ngFEC_module/bram_array[8].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_617[0] | SFP_GEN[0].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_619[0] | SFP_GEN[0].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_91[0] | SFP_GEN[40].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_612[0] | SFP_GEN[0].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_85[0] | SFP_GEN[41].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_94[0] | SFP_GEN[40].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_606[0] | SFP_GEN[1].ngFEC_module/bram_array[3].buffer_server/SR[0] | 5 | 10 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_234[0] | SFP_GEN[29].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_209[0] | SFP_GEN[31].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_23[0] | SFP_GEN[46].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_247[0] | SFP_GEN[28].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_251[0] | SFP_GEN[28].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_223[0] | SFP_GEN[30].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_219[0] | SFP_GEN[31].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_218[0] | SFP_GEN[31].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_201[0] | SFP_GEN[32].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_211[0] | SFP_GEN[31].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_208[0] | SFP_GEN[31].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_186[0] | SFP_GEN[33].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_185[0] | SFP_GEN[33].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_18[0] | SFP_GEN[46].ngFEC_module/bram_array[6].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_172[0] | SFP_GEN[34].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_149[0] | SFP_GEN[36].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_154[0] | SFP_GEN[36].ngFEC_module/bram_array[0].buffer_server/SR[0] | 6 | 10 | 1.67 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_150[0] | SFP_GEN[36].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_17[0] | SFP_GEN[46].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_145[0] | SFP_GEN[36].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_176[0] | SFP_GEN[34].ngFEC_module/bram_array[4].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_174[0] | SFP_GEN[34].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_163[0] | SFP_GEN[35].ngFEC_module/bram_array[4].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_159[0] | SFP_GEN[35].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_164[0] | SFP_GEN[35].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_166[0] | SFP_GEN[35].ngFEC_module/bram_array[1].buffer_server/SR[0] | 6 | 10 | 1.67 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_165[0] | SFP_GEN[35].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_151[0] | SFP_GEN[36].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_148[0] | SFP_GEN[36].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_198[0] | SFP_GEN[32].ngFEC_module/bram_array[8].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_193[0] | SFP_GEN[33].ngFEC_module/bram_array[0].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_196[0] | SFP_GEN[32].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_194[0] | SFP_GEN[32].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_155[0] | SFP_GEN[35].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_179[0] | SFP_GEN[34].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_152[0] | SFP_GEN[36].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_160[0] | SFP_GEN[35].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_144[0] | SFP_GEN[36].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_173[0] | SFP_GEN[34].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_197[0] | SFP_GEN[32].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_183[0] | SFP_GEN[33].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_157[0] | SFP_GEN[35].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_187[0] | SFP_GEN[33].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_171[0] | SFP_GEN[34].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_169[0] | SFP_GEN[34].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_156[0] | SFP_GEN[35].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_167[0] | SFP_GEN[35].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_146[0] | SFP_GEN[36].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_200[0] | SFP_GEN[32].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_20[0] | SFP_GEN[46].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_2[0] | SFP_GEN[47].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_184[0] | SFP_GEN[33].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_158[0] | SFP_GEN[35].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_192[0] | SFP_GEN[33].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_178[0] | SFP_GEN[34].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_170[0] | SFP_GEN[34].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_153[0] | SFP_GEN[36].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_182[0] | SFP_GEN[33].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_161[0] | SFP_GEN[35].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_181[0] | SFP_GEN[33].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_180[0] | SFP_GEN[34].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_177[0] | SFP_GEN[34].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_175[0] | SFP_GEN[34].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_168[0] | SFP_GEN[34].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_16[0] | SFP_GEN[46].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_199[0] | SFP_GEN[32].ngFEC_module/bram_array[7].buffer_server/SR[0] | 5 | 10 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_195[0] | SFP_GEN[32].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_190[0] | SFP_GEN[33].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_19[0] | SFP_GEN[46].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_188[0] | SFP_GEN[33].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_162[0] | SFP_GEN[35].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_15[0] | SFP_GEN[46].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_147[0] | SFP_GEN[36].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_189[0] | SFP_GEN[33].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_14[0] | SFP_GEN[46].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_138[0] | SFP_GEN[37].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_127[0] | SFP_GEN[38].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_126[0] | SFP_GEN[38].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_112[0] | SFP_GEN[39].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_125[0] | SFP_GEN[38].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_114[0] | SFP_GEN[39].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_124[0] | SFP_GEN[38].ngFEC_module/bram_array[4].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_104[0] | SFP_GEN[39].ngFEC_module/bram_array[11].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_113[0] | SFP_GEN[39].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1][0] | SFP_GEN[47].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_105[0] | SFP_GEN[39].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_103[0] | SFP_GEN[39].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_120[0] | SFP_GEN[38].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_11[0] | SFP_GEN[47].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_102[0] | SFP_GEN[40].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_119[0] | SFP_GEN[38].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_109[0] | SFP_GEN[39].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_106[0] | SFP_GEN[39].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_0[0] | SFP_GEN[47].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_101[0] | SFP_GEN[40].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_121[0] | SFP_GEN[38].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_117[0] | SFP_GEN[38].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_139[0] | SFP_GEN[37].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_137[0] | SFP_GEN[37].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_136[0] | SFP_GEN[37].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_135[0] | SFP_GEN[37].ngFEC_module/bram_array[6].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_116[0] | SFP_GEN[38].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_133[0] | SFP_GEN[37].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_132[0] | SFP_GEN[37].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_131[0] | SFP_GEN[37].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_130[0] | SFP_GEN[37].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_108[0] | SFP_GEN[39].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_129[0] | SFP_GEN[37].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_123[0] | SFP_GEN[38].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_107[0] | SFP_GEN[39].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_10[0] | SFP_GEN[47].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_122[0] | SFP_GEN[38].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_12[0] | SFP_GEN[46].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_115[0] | SFP_GEN[39].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_13[0] | SFP_GEN[46].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_110[0] | SFP_GEN[39].ngFEC_module/bram_array[5].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_1[0] | SFP_GEN[47].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_128[0] | SFP_GEN[38].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_118[0] | SFP_GEN[38].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_100[0] | SFP_GEN[40].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_143[0] | SFP_GEN[36].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_141[0] | SFP_GEN[37].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_134[0] | SFP_GEN[37].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_111[0] | SFP_GEN[39].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_142[0] | SFP_GEN[36].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_140[0] | SFP_GEN[37].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 1 | 10 | 10.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 4 | 10 | 2.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 4 | 10 | 2.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sel | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_tx_pll_timer_clr_reg_n_0 | 2 | 10 | 5.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_ctr[9]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_pll_timer_clr_reg_n_0 | 3 | 10 | 3.33 | | tx_wordclk | TX_CLKEN_repN_57 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 5 | 10 | 2.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/block_sync_sm_gtx0_i/p_1_in[2] | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/block_sync_sm_gtx0_i/begin_r | 3 | 10 | 3.33 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/E[0] | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/mmcm_not_locked_out | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_191[0] | SFP_GEN[33].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_439[0] | SFP_GEN[14].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_49[0] | SFP_GEN[44].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_489[0] | SFP_GEN[10].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_450[0] | SFP_GEN[13].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_435[0] | SFP_GEN[14].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_480[0] | SFP_GEN[10].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_485[0] | SFP_GEN[10].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_456[0] | SFP_GEN[12].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_478[0] | SFP_GEN[11].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_457[0] | SFP_GEN[12].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_451[0] | SFP_GEN[13].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_442[0] | SFP_GEN[13].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_459[0] | SFP_GEN[12].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_477[0] | SFP_GEN[11].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_488[0] | SFP_GEN[10].ngFEC_module/bram_array[4].buffer_server/SR[0] | 6 | 10 | 1.67 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_445[0] | SFP_GEN[13].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_ngccm/p_1_out[31] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_487[0] | SFP_GEN[10].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_486[0] | SFP_GEN[10].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_434[0] | SFP_GEN[14].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_484[0] | SFP_GEN[10].ngFEC_module/bram_array[8].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_44[0] | SFP_GEN[44].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_45[0] | SFP_GEN[44].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_483[0] | SFP_GEN[10].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_425[0] | SFP_GEN[15].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_416[0] | SFP_GEN[15].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_413[0] | SFP_GEN[16].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_412[0] | SFP_GEN[16].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_405[0] | SFP_GEN[16].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_396[0] | SFP_GEN[17].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_380[0] | SFP_GEN[18].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_393[0] | SFP_GEN[17].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_383[0] | SFP_GEN[18].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_392[0] | SFP_GEN[17].ngFEC_module/bram_array[9].buffer_server/SR[0] | 2 | 10 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_404[0] | SFP_GEN[16].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_424[0] | SFP_GEN[15].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_421[0] | SFP_GEN[15].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_420[0] | SFP_GEN[15].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_419[0] | SFP_GEN[15].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_411[0] | SFP_GEN[16].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_407[0] | SFP_GEN[16].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_403[0] | SFP_GEN[16].ngFEC_module/bram_array[11].buffer_server/SR[0] | 6 | 10 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_402[0] | SFP_GEN[16].ngFEC_module/bram_array[13].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_401[0] | SFP_GEN[17].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_399[0] | SFP_GEN[17].ngFEC_module/bram_array[2].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_379[0] | SFP_GEN[18].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_390[0] | SFP_GEN[17].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_388[0] | SFP_GEN[18].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_385[0] | SFP_GEN[18].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_400[0] | SFP_GEN[17].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_386[0] | SFP_GEN[18].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_382[0] | SFP_GEN[18].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_378[0] | SFP_GEN[18].ngFEC_module/bram_array[10].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_391[0] | SFP_GEN[17].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_377[0] | SFP_GEN[18].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_408[0] | SFP_GEN[16].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_41[0] | SFP_GEN[44].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_381[0] | SFP_GEN[18].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_40[0] | SFP_GEN[44].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_376[0] | SFP_GEN[18].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_426[0] | SFP_GEN[15].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_389[0] | SFP_GEN[17].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_422[0] | SFP_GEN[15].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_431[0] | SFP_GEN[14].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_423[0] | SFP_GEN[15].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_42[0] | SFP_GEN[44].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_410[0] | SFP_GEN[16].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_4[0] | SFP_GEN[47].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_375[0] | SFP_GEN[19].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_39[0] | SFP_GEN[44].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_38[0] | SFP_GEN[44].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_430[0] | SFP_GEN[14].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_387[0] | SFP_GEN[18].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_418[0] | SFP_GEN[15].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_384[0] | SFP_GEN[18].ngFEC_module/bram_array[4].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_398[0] | SFP_GEN[17].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_43[0] | SFP_GEN[44].ngFEC_module/bram_array[7].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_415[0] | SFP_GEN[15].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_395[0] | SFP_GEN[17].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_409[0] | SFP_GEN[16].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_406[0] | SFP_GEN[16].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_429[0] | SFP_GEN[14].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_428[0] | SFP_GEN[14].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_427[0] | SFP_GEN[15].ngFEC_module/bram_array[0].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_417[0] | SFP_GEN[15].ngFEC_module/bram_array[10].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_414[0] | SFP_GEN[16].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_397[0] | SFP_GEN[17].ngFEC_module/bram_array[4].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_394[0] | SFP_GEN[17].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_374[0] | SFP_GEN[19].ngFEC_module/bram_array[1].buffer_server/SR[0] | 6 | 10 | 1.67 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_373[0] | SFP_GEN[19].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_372[0] | SFP_GEN[19].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_371[0] | SFP_GEN[19].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_370[0] | SFP_GEN[19].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_350[0] | SFP_GEN[20].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_318[0] | SFP_GEN[23].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_369[0] | SFP_GEN[19].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_368[0] | SFP_GEN[19].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_366[0] | SFP_GEN[19].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_360[0] | SFP_GEN[20].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_36[0] | SFP_GEN[45].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_355[0] | SFP_GEN[20].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_348[0] | SFP_GEN[21].ngFEC_module/bram_array[1].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_354[0] | SFP_GEN[20].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_346[0] | SFP_GEN[21].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_344[0] | SFP_GEN[21].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_340[0] | SFP_GEN[21].ngFEC_module/bram_array[9].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_34[0] | SFP_GEN[45].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_321[0] | SFP_GEN[23].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_328[0] | SFP_GEN[22].ngFEC_module/bram_array[8].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_327[0] | SFP_GEN[22].ngFEC_module/bram_array[9].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_331[0] | SFP_GEN[22].ngFEC_module/bram_array[5].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_335[0] | SFP_GEN[22].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_334[0] | SFP_GEN[22].ngFEC_module/bram_array[2].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_37[0] | SFP_GEN[45].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_367[0] | SFP_GEN[19].ngFEC_module/bram_array[8].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_365[0] | SFP_GEN[19].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_359[0] | SFP_GEN[20].ngFEC_module/bram_array[3].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_349[0] | SFP_GEN[21].ngFEC_module/bram_array[0].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_339[0] | SFP_GEN[21].ngFEC_module/bram_array[10].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_323[0] | SFP_GEN[23].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_322[0] | SFP_GEN[23].ngFEC_module/bram_array[1].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_326[0] | SFP_GEN[22].ngFEC_module/bram_array[10].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_332[0] | SFP_GEN[22].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_364[0] | SFP_GEN[19].ngFEC_module/bram_array[11].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_333[0] | SFP_GEN[22].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_363[0] | SFP_GEN[19].ngFEC_module/bram_array[13].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_362[0] | SFP_GEN[20].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_343[0] | SFP_GEN[21].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_361[0] | SFP_GEN[20].ngFEC_module/bram_array[1].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_356[0] | SFP_GEN[20].ngFEC_module/bram_array[6].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_342[0] | SFP_GEN[21].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_33[0] | SFP_GEN[45].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_336[0] | SFP_GEN[22].ngFEC_module/bram_array[0].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_330[0] | SFP_GEN[22].ngFEC_module/bram_array[6].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_358[0] | SFP_GEN[20].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_357[0] | SFP_GEN[20].ngFEC_module/bram_array[5].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_353[0] | SFP_GEN[20].ngFEC_module/bram_array[9].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_352[0] | SFP_GEN[20].ngFEC_module/bram_array[10].buffer_server/SR[0] | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_351[0] | SFP_GEN[20].ngFEC_module/bram_array[11].buffer_server/SR[0] | 3 | 10 | 3.33 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 1 | 10 | 10.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_35[0] | SFP_GEN[45].ngFEC_module/bram_array[2].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_347[0] | SFP_GEN[21].ngFEC_module/bram_array[2].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_345[0] | SFP_GEN[21].ngFEC_module/bram_array[4].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_338[0] | SFP_GEN[21].ngFEC_module/bram_array[11].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_337[0] | SFP_GEN[21].ngFEC_module/bram_array[13].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_324[0] | SFP_GEN[22].ngFEC_module/bram_array[13].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_325[0] | SFP_GEN[22].ngFEC_module/bram_array[11].buffer_server/SR[0] | 5 | 10 | 2.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/gtwiz_reset_tx_pll_and_datapath_int_reg_n_0 | 2 | 10 | 5.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_320[0] | SFP_GEN[23].ngFEC_module/bram_array[3].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_32[0] | SFP_GEN[45].ngFEC_module/bram_array[5].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_319[0] | SFP_GEN[23].ngFEC_module/bram_array[4].buffer_server/SR[0] | 4 | 10 | 2.50 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_317[0] | SFP_GEN[23].ngFEC_module/bram_array[6].buffer_server/SR[0] | 6 | 10 | 1.67 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_341[0] | SFP_GEN[21].ngFEC_module/bram_array[8].buffer_server/SR[0] | 5 | 10 | 2.00 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_329[0] | SFP_GEN[22].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | i_axi_slave/ngccm_state_o_reg[1]_264[0] | SFP_GEN[27].ngFEC_module/bram_array[7].buffer_server/SR[0] | 3 | 10 | 3.33 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/cbcc_fifo_reset_rd_clk | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 11 | 1.22 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 11 | 1.10 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 11 | 1.22 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[27][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 11 | 1.00 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 11 | 1.22 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[29][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[30][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[28][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 11 | 1.22 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[36][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[32][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[31][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 11 | 1.10 | | ipb_clk | i_AXI4_to_ipbus/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 11 | 1.22 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 11 | 1.22 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 11 | 1.22 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[22][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[23][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[20][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[21][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[38][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 11 | 1.00 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | tx_wordclk | TX_CLKEN_repN_38 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | tx_wordclk | TX_CLKEN_repN_48 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[26][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[37][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[39][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[34][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 11 | 1.00 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[33][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[35][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[24][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[25][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 11 | 1.10 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 11 | 1.22 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[40][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[41][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[8][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[8][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][11][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][12][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[8][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[8][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 11 | 1.00 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][23][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][6][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][10][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][16][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][28][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][8][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[8][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][21][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][20][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][4][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][29][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[8][24][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][0][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][13][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][7][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][5][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][9][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][17][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][25][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[8][22][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][3][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[42][27][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][2][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[8][19][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][1][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][18][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | i_AXI4_to_ipbus/regs_reg[43][26][0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 11 | 1.38 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 11 | 5.50 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 11 | 1.83 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 11 | 2.75 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/words[10]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 11 | 2.20 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/data_length[10]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 11 | 3.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_addr][10]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 11 | 1.57 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__36_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__124_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__40_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__25_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__17_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[18].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__32_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 9 | 12 | 1.33 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__264_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__23_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 5 | 12 | 2.40 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__0_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__35_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__208_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__8_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__12_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__10_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__600_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__18_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__38_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__16_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[1].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__34_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__6_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__11_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__20_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__41_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__26_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__110_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__22_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__28_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__9_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__43_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__42_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__13_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__1_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__2_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__33_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__3_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__27_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__30_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__7_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 12 | 1.50 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__5_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__24_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__96_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__44_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 5 | 12 | 2.40 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__4_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__31_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__432_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 12 | 1.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__670_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__82_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 12 | 1.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__502_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__68_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__138_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 12 | 1.50 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | CLKFBIN | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ar_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | CLKFBIN | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_aw_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | DRPclk | | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 11 | 12 | 1.09 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | DRPclk | | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 11 | 12 | 1.09 | | ipb_clk | SFP_GEN[4].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | DRPclk | | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 9 | 12 | 1.33 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | DRPclk | | i_axi_slave/GBTBANK_GENERAL_RESET_I | 12 | 12 | 1.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__530_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__404_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__152_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__222_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__39_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__15_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__236_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[44].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__656_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[11].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__21_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__46_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__166_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__516_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__29_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 12 | 1.50 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[36].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__334_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__642_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__180_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__45_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__194_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__474_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__558_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__628_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__320_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__348_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__37_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__54_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__488_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__614_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 12 | 1.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 12 | 1.33 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__362_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 12 | 1.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__292_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__306_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__14_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 12 | 1.50 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__418_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__376_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__544_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__572_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__250_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__446_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__460_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/ngccmPinsOutReg[bkp_reset]_i_1__19_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[13].RAM/gen_wr_b.gen_word_narrow.mem_reg_bram_1_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/bkp_buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__586_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/ngccm_aout[11]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__278_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 12 | 1.71 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 12 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 12 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[12].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 12 | 6.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 1 | 12 | 12.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i__n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 12 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/data_address[11]_i_1__390_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 12 | 2.40 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__18_n_0 | 6 | 13 | 2.17 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__42_n_0 | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__43_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__36_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__19_n_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__14_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__20_n_0 | 6 | 13 | 2.17 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__12_n_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__45_n_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__11_n_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__31_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__4_n_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__6_n_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__34_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__29_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__3_n_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__10_n_0 | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__44_n_0 | 4 | 13 | 3.25 | | ipb_clk | i_I2C_if/I2C_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 13 | 2.17 | | ipb_clk | i_I2C_if/I2C_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__27_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__33_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__28_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__22_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__2_n_0 | 3 | 13 | 4.33 | | ipb_clk | i_I2C_if/I2C_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 13 | 2.17 | | ipb_clk | i_I2C_if/I2C_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__7_n_0 | 5 | 13 | 2.60 | | ipb_clk | i_I2C_if/I2C_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__25_n_0 | 4 | 13 | 3.25 | | ipb_clk | i_I2C_if/I2C_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 13 | 2.60 | | ipb_clk | i_I2C_if/I2C_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__1_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__35_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__0_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__23_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__26_n_0 | 5 | 13 | 2.60 | | ipb_clk | i_I2C_if/I2C_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 13 | 2.17 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__24_n_0 | 4 | 13 | 3.25 | | ipb_clk | i_I2C_if/I2C_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 13 | 2.17 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__15_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__46_n_0 | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__32_n_0 | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__21_n_0 | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__38_n_0 | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__41_n_0 | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__39_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__13_n_0 | 4 | 13 | 3.25 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_r_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 5 | 13 | 2.60 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__5_n_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__17_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__8_n_0 | 4 | 13 | 3.25 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.user_reset_sync_inst/m_aresetn_0 | 3 | 13 | 4.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__9_n_0 | 5 | 13 | 2.60 | | CLKFBIN | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_w_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__40_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__30_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__16_n_0 | 4 | 13 | 3.25 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount0 | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/wrBitCount[14]_i_1__37_n_0 | 4 | 13 | 3.25 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | clk250 | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 14 | 1.40 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 14 | 1.56 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 14 | 1.56 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 14 | 1.56 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 14 | 1.75 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 14 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[8].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 14 | 7.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[3].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[2].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[1].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[0].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[11].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[10].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[9].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 14 | 2.80 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[7].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[6].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 14 | 3.50 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[5].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 14 | 4.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[4].RAM/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 14 | 2.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | ipb_clk | i_I2C_if/I2C_array[8].local_addr_reg[8]0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 15 | 3.00 | | ipb_clk | i_I2C_if/I2C_array[7].local_addr_reg[7]0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | ipb_clk | i_I2C_if/I2C_array[6].local_addr_reg[6]0 | | 4 | 15 | 3.75 | | ipb_clk | i_I2C_if/I2C_array[5].local_addr_reg[5]0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | ipb_clk | i_I2C_if/I2C_array[4].local_addr_reg[4]0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | ipb_clk | i_I2C_if/I2C_array[3].local_addr_reg[3]0 | | 4 | 15 | 3.75 | | ipb_clk | i_I2C_if/I2C_array[2].local_addr_reg[2]0 | | 6 | 15 | 2.50 | | ipb_clk | i_I2C_if/I2C_array[1].local_addr_reg[1]0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | ipb_clk | i_I2C_if/I2C_array[0].local_addr_reg[0]0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 8 | 15 | 1.88 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 8 | 15 | 1.88 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/standard_cc_module_i/count_16d_srl_r[0]_i_1_n_0 | | 2 | 15 | 7.50 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 8 | 15 | 1.88 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 8 | 15 | 1.88 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 3 | 15 | 5.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 5 | 15 | 3.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 7 | 15 | 2.14 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/addr_local[0]_i_1_n_0 | | 6 | 15 | 2.50 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/timeoutCntr_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 15 | 3.75 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 11 | 16 | 1.45 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 10 | 16 | 1.60 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__3_n_0 | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 11 | 16 | 1.45 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 12 | 16 | 1.33 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__1_n_0 | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__34_n_0 | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__8_n_0 | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__38_n_0 | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__33_n_0 | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__12_n_0 | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__18_n_0 | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__17_n_0 | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__31_n_0 | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ar_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/rdp_inst/enb | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ar_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_aw_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/rdp_inst/enb | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_aw_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 5 | 16 | 3.20 | | CLKFBIN | i_AXI4_to_ipbus/axi_alen0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__0_n_0 | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__41_n_0 | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__13_n_0 | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__32_n_0 | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__4_n_0 | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__20_n_0 | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__23_n_0 | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__35_n_0 | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__44_n_0 | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__2_n_0 | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 9 | 16 | 1.78 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__7_n_0 | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__6_n_0 | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__11_n_0 | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__27_n_0 | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__28_n_0 | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__30_n_0 | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__25_n_0 | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__10_n_0 | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__43_n_0 | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__22_n_0 | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__42_n_0 | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__26_n_0 | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__24_n_0 | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 10 | 16 | 1.60 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__40_n_0 | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__16_n_0 | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1_n_0 | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__37_n_0 | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__36_n_0 | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__19_n_0 | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__14_n_0 | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__45_n_0 | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__29_n_0 | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | clk250 | g_clock_rate_din[20].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[19].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | clk250 | g_clock_rate_din[1].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | clk250 | g_clock_rate_din[21].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[18].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[17].i_rate_test_comm/rate_i0 | | 5 | 16 | 3.20 | | clk250 | g_clock_rate_din[16].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__15_n_0 | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[25].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | clk250 | g_clock_rate_din[24].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[23].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | clk250 | g_clock_rate_din[22].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[34].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 10 | 16 | 1.60 | | clk250 | g_clock_rate_din[33].i_rate_test_comm/rate_i0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[32].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__46_n_0 | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 16 | 2.29 | | clk250 | g_clock_rate_din[31].i_rate_test_comm/rate_i0 | | 4 | 16 | 4.00 | | clk250 | g_clock_rate_din[30].i_rate_test_comm/rate_i0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | clk250 | g_clock_rate_din[29].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | clk250 | g_clock_rate_din[2].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[28].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | clk250 | g_clock_rate_din[27].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | clk250 | g_clock_rate_din[26].i_rate_test_comm/rate_i0 | | 4 | 16 | 4.00 | | clk250 | g_clock_rate_din[42].i_rate_test_comm/rate_i0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | clk250 | g_clock_rate_din[41].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[40].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | clk250 | g_clock_rate_din[39].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__21_n_0 | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[3].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | clk250 | g_clock_rate_din[38].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | clk250 | g_clock_rate_din[37].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[36].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[35].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | clk250 | g_clock_rate_din[43].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | clk250 | g_clock_rate_din[8].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[7].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | clk250 | g_clock_rate_din[6].i_rate_test_comm/rate_i0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[5].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[4].i_rate_test_comm/rate_i0 | | 4 | 16 | 4.00 | | clk250 | g_clock_rate_din[46].i_rate_test_comm/rate_i0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[45].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | clk250 | g_clock_rate_din[44].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 9 | 16 | 1.78 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__39_n_0 | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 16 | 4.00 | | clk250 | g_clock_rate_din[15].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | clk250 | g_clock_rate_din[14].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[13].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | clk250 | g_clock_rate_din[12].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[11].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | clk250 | g_clock_rate_din[10].i_rate_test_comm/rate_i0 | | 1 | 16 | 16.00 | | clk250 | g_clock_rate_din[9].i_rate_test_comm/rate_i0 | | 2 | 16 | 8.00 | | clk250 | g_clock_rate_din[0].i_rate_test_comm/rate_i0 | | 3 | 16 | 5.33 | | clk250 | g_clock_rate_din[47].i_rate_test_comm/rate_i0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/addr_local[1]_i_1_n_0 | | 8 | 16 | 2.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/block_sync_sm_gtx0_i/p_1_in[1] | 2 | 16 | 8.00 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 8 | 16 | 2.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/block_sync_sm_gtx0_i/sync_header_count_i[15]_i_1_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/block_sync_sm_gtx0_i/begin_r | 3 | 16 | 5.33 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[13].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 6 | 16 | 2.67 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 4 | 16 | 4.00 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[0].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 11 | 16 | 1.45 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__5_n_0 | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 16 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/rdp_inst/enb | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 5 | 16 | 3.20 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 7 | 16 | 2.29 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/IPbus_DataOut[15]_i_1_n_0 | | 5 | 16 | 3.20 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/rdBitCount[15]_i_1__9_n_0 | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 16 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 11 | 17 | 1.55 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 3 | 17 | 5.67 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | i_tcds2_if/fabric_clk_in | | i_tcds2_if/cmp_lpgbtfpga_uplink/in0 | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 3 | 17 | 5.67 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 11 | 17 | 1.55 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 3 | 17 | 5.67 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | clk250 | stat_regs_inst/save_rate0 | stat_regs_inst/cycle_cntr | 3 | 17 | 5.67 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 11 | 17 | 1.55 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 11 | 17 | 1.55 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 10 | 17 | 1.70 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 9 | 17 | 1.89 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 7 | 17 | 2.43 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ar_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_aw_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 4 | 17 | 4.25 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 11 | 17 | 1.55 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[9].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[8].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[7].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[6].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[5].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[10].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 5 | 17 | 3.40 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[4].IPbus_local_inst/addr_local[6]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[3].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 6 | 17 | 2.83 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[2].IPbus_local_inst/addr_local[5]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[1].IPbus_local_inst/addr_local[4]_i_1_n_0 | | 8 | 17 | 2.13 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[11].IPbus_local_inst/addr_local[7]_i_1_n_0 | | 7 | 17 | 2.43 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[43].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[5].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[39].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[35].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 7 | 18 | 2.57 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[34].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 8 | 18 | 2.25 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[27].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 5 | 18 | 3.60 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[9].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 4 | 18 | 4.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[18].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 4 | 18 | 4.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[1].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[24].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[28].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[40].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 4 | 18 | 4.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[44].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[29].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[2].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[31].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[21].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[36].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[10].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[16].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[38].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[33].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_r_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/rdp_inst/ram_rd_en_i | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_r_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 5 | 18 | 3.60 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[11].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[6].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[45].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[13].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[4].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[46].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[41].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[8].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[25].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_w_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/rdp_inst/ram_rd_en_i | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_w_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_ic.fifo_rd_rst_ic_reg_0 | 4 | 18 | 4.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[12].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 9 | 18 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[26].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[20].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[30].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 4 | 18 | 4.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[47].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[7].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[0].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[32].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 5 | 18 | 3.60 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[23].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[15].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[19].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[42].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 2 | 18 | 9.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[37].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[22].ngCCM_gbt/RX_Word_rx40_reg[78]_1[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[14].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[17].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[3].ngCCM_gbt/RX_Word_rx40_reg[78]_9[0] | ctrl_regs_inst/Q[9] | 3 | 18 | 6.00 | | tx_wordclk | TX_CLKEN_repN_16 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 7 | 19 | 2.71 | | tx_wordclk | TX_CLKEN_repN_56 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 11 | 19 | 1.73 | | tx_wordclk | TX_CLKEN_repN_8 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 12 | 19 | 1.58 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_w_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 5 | 19 | 3.80 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[39]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 4 | 20 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[59]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 5 | 20 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[19]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 5 | 20 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[79]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[99]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[99]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[59]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[39]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[79]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[19]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 10 | 20 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[39]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 10 | 20 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[99]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[59]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_1[0] | | 4 | 20 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[36] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 12 | 20 | 1.67 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_2[0] | | 5 | 20 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[96] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[19]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 16 | 20 | 1.25 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[19]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[79]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[59]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[39]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 5 | 20 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[99]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 6 | 20 | 3.33 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 17 | 20 | 1.18 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[39]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[99]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[59]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[79]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[19]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[59]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 10 | 20 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[99]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_2[0] | | 4 | 20 | 5.00 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[79]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[39]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[99]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 14 | 20 | 1.43 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[99]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[19]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[59]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[79]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[39]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_2[0] | | 3 | 20 | 6.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 16 | 20 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 16 | 20 | 1.25 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_2[0] | | 2 | 20 | 10.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[59]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[99]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[79]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[39]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[19]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[79]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[59]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[39]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[99]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[19]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[76] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[16] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_1[0] | | 3 | 20 | 6.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[39]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[59]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_1[0] | | 3 | 20 | 6.67 | | CLKFBIN | i_axi_slave/idle_flag_reg[0] | | 6 | 20 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[59]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[79]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[59]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[79]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[99]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[19]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[39]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[19]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[19]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[39]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[59]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[79]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 6 | 20 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[99]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[39]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[19]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[39]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[59]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[79]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[99]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[19]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[99]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 18 | 20 | 1.11 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[59]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[79]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | clk250 | stat_regs_inst/i_cntr_rst_ctrl/reset_type | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 20 | 5.00 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 13 | 20 | 1.54 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_1[0] | | 3 | 20 | 6.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[59]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 13 | 20 | 1.54 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 16 | 20 | 1.25 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 12 | 20 | 1.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 11 | 20 | 1.82 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[79]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[99]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[39]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[19]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[59]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[36] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[39]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[79]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 10 | 20 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[56] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[99]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[16] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[96] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[19]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_1[0] | | 2 | 20 | 10.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[19]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[99]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[59]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[39]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[79]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[39]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[99]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[19]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[59]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[59]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[99]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[39]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[19]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[76] | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 18 | 20 | 1.11 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_2[0] | | 3 | 20 | 6.67 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 16 | 20 | 1.25 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | tx_wordclk | | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 17 | 20 | 1.18 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[59]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 10 | 20 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[79]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[99]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[39]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[19]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 18 | 20 | 1.11 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[79]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[79]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[99]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_2[0] | | 2 | 20 | 10.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[19]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[79]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[39]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[59]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[99]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[59]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[56] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[76] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[16] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[36] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[39]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[19]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 11 | 20 | 1.82 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[79]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_1[0] | | 3 | 20 | 6.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[19]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[19]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 10 | 20 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[39]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[99]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[59]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[79]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[39]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[79]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[39]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[59]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[99]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[19]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[79]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[59]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[99]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[39]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[19]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[39]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[59]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[79]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[99]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[39]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_1[0] | | 3 | 20 | 6.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_2[0] | | 2 | 20 | 10.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[99]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[59]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[79]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_2[0] | | 2 | 20 | 10.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[99]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[59]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[19]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[39]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[59]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[79]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[79]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[79]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[99]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[39]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[59]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[19]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[99]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[79]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[19]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[39]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg0[19]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | | 5 | 20 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[19]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[59]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_1[0] | | 4 | 20 | 5.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[79]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[99]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[39]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[19]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[79]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg0[59]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[99]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[39]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[99]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[19]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[39]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[56] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[76] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[96] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[16] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[36] | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[59]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[79]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 4 | 20 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[99]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[39]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[19]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[59]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[99]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg0[79]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[39]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[59]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_1[0] | | 3 | 20 | 6.67 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_2[0] | | 2 | 20 | 10.00 | | tx_wordclk | TX_CLKEN_repN_13 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 12 | 20 | 1.67 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[39]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[59]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[59]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[99]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[59]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[79]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[19]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[39]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[79]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[39]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 10 | 20 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 18 | 20 | 1.11 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_2[0] | | 4 | 20 | 5.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[99]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg0[19]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 10 | 20 | 2.00 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[19]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[39]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[99]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[59]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg0[79]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | tx_wordclk | | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[79]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[99]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[19]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[79]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_2[0] | | 5 | 20 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[99]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_1[0] | | 4 | 20 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 18 | 20 | 1.11 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[79]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[99]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[59]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[19]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg0[39]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_2[0] | | 3 | 20 | 6.67 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[19]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_1[0] | | 4 | 20 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg0[19]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[39]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[59]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[79]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[19]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg0[99]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[56] | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[19]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[39]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[99]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[79]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 5 | 20 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg0[59]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | | 6 | 20 | 3.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_1[0] | | 4 | 20 | 5.00 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_1[0] | | 3 | 20 | 6.67 | | fabric_clk | fabric_clk_div2 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 20 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_1[0] | | 3 | 20 | 6.67 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 12 | 20 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 16 | 20 | 1.25 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 20 | 1.43 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[19]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 16 | 20 | 1.25 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_2[0] | | 2 | 20 | 10.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_2[0] | | 4 | 20 | 5.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[79]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[39]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 8 | 20 | 2.50 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 17 | 20 | 1.18 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[59]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 15 | 20 | 1.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[19]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 9 | 20 | 2.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg0[79]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 6 | 20 | 3.33 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 13 | 20 | 1.54 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 13 | 20 | 1.54 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg0[99]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | tx_wordclk | | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 12 | 20 | 1.67 | | tx_wordclk | | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 13 | 20 | 1.54 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/p_0_in__0[96] | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 7 | 20 | 2.86 | | tx_wordclk | TX_CLKEN_repN_38 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 9 | 21 | 2.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 14 | 22 | 1.57 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 13 | 22 | 1.69 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 8 | 22 | 2.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 13 | 22 | 1.69 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 13 | 22 | 1.69 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 13 | 22 | 1.69 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 9 | 22 | 2.44 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 13 | 22 | 1.69 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 10 | 22 | 2.20 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 9 | 22 | 2.44 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 12 | 22 | 1.83 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 13 | 22 | 1.69 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 11 | 22 | 2.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | | | 13 | 22 | 1.69 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 23 | 1.92 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 23 | 5.75 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 23 | 5.75 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 23 | 1.92 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 23 | 4.60 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 23 | 5.75 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 23 | 5.75 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 23 | 3.83 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 23 | 5.75 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 23 | 4.60 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 23 | 1.77 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | tx_wordclk | TX_CLKEN_repN_60 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[2].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 4 | 23 | 5.75 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[3].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[4].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[7].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 23 | 3.83 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 23 | 4.60 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[1].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | i_tcds2_if/i_mgt_wrapper/i_txusrclk/bbstub_txoutclk_out[0] | i_tcds2_if/tx_strobe | ctrl_regs_inst/regs_reg[1][2]_rep_1 | 11 | 23 | 2.09 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[6].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[9].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[5].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 23 | 2.88 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[11].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 23 | 3.83 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[0].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 23 | 2.56 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[8].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 23 | 3.29 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[10].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 23 | 2.30 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/standard_cc_module_i/count_24d_srl_r0 | | 3 | 23 | 7.67 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/ClkDiv_o | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 5 | 23 | 4.60 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wr_pntr_plus1_pf_carry | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 6 | 24 | 4.00 | | DRPclk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/u_rst_sync_fsm_resetdone_initclk/dly_gt_rst_r_reg[18] | 3 | 24 | 8.00 | | DRPclk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.standard_cc_module_inst/pma_init_assertion | | 4 | 24 | 6.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 24 | 1.60 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 24 | 1.71 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 24 | 6.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 24 | 6.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | tx_wordclk | TX_CLKEN_repN_51 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 24 | 4.80 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 24 | 1.60 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 24 | 1.85 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 24 | 1.60 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 24 | 6.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 24 | 1.50 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ar_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wr_pntr_plus1_pf_carry | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_ar_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 6 | 24 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_aw_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wr_pntr_plus1_pf_carry | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_aw_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 24 | 2.18 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 24 | 3.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[13].buffer_server/ngccm_state_o_reg[1]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 24 | 2.40 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 24 | 2.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 24 | 3.43 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 24 | 2.67 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_clr__0 | 4 | 25 | 6.25 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | | 9 | 25 | 2.78 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_clr__0 | 4 | 25 | 6.25 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_mgt_init/sel | i_tcds2_if/i_mgt_wrapper/i_mgt_init/timer_clr | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_ctr | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_ctr | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_ctr | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_ctr | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_init/timer_clr__0 | 4 | 25 | 6.25 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__19_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 26 | 2.17 | | DRPclk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/aurora_64b66b_0_gt_i/inst/gen_gtwizard_gthe3_top.aurora_64b66b_0_gt_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__44_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__43_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__42_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__41_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__40_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__39_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__38_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__37_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__36_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__46_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__45_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__35_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I5_out | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__32_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__31_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__30_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__29_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__28_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__27_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__26_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__25_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__24_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__34_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__33_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__23_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I3_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__8_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 26 | 2.17 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__7_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__6_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__5_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__4_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__3_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__2_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__1_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__0_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__10_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__9_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | DRPclk | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__11_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__14_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__13_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__12_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__22_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 26 | 2.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__21_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__18_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__17_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__16_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__15_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | DRPclk | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/generalRstProcess.timer[0]_i_1__20_n_0 | i_axi_slave/GBTBANK_GENERAL_RESET_I1_out | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 26 | 2.36 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | CLKFBIN | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | i_tcds2_if/i_mgt_wrapper/i_reset_sm/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 26 | 2.36 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 26 | 2.17 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 26 | 3.71 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 26 | 2.17 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 26 | 3.71 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 26 | 4.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 26 | 2.36 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 26 | 3.71 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 26 | 3.71 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 26 | 3.71 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 26 | 3.71 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 26 | 2.60 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 26 | 3.25 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 26 | 2.17 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 26 | 2.89 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_ctr[0]_i_1_n_0 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_reset_controller_internal.gen_single_instance.gtwiz_reset_inst/sm_reset_rx_cdr_to_clr | 4 | 26 | 6.50 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/StateReset | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 26 | 2.17 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[42].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 9 | 27 | 3.00 | | fabric_clk | | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 17 | 27 | 1.59 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[18].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 6 | 27 | 4.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[28].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 13 | 27 | 2.08 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[13].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 10 | 27 | 2.70 | | fabric_clk | | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 14 | 27 | 1.93 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[27].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | fabric_clk | | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 14 | 27 | 1.93 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[47].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[4].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 8 | 27 | 3.38 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[17].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 6 | 27 | 4.50 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[26].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 6 | 27 | 4.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[5].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[10].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 8 | 27 | 3.38 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[36].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 9 | 27 | 3.00 | | fabric_clk | | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 27 | 3.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[41].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | fabric_clk | | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[25].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 5 | 27 | 5.40 | | fabric_clk | | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 14 | 27 | 1.93 | | fabric_clk | | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 15 | 27 | 1.80 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[24].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 5 | 27 | 5.40 | | fabric_clk | | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[12].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 9 | 27 | 3.00 | | fabric_clk | | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[3].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 8 | 27 | 3.38 | | fabric_clk | | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | fabric_clk | | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 14 | 27 | 1.93 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[34].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 11 | 27 | 2.45 | | fabric_clk | | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 14 | 27 | 1.93 | | fabric_clk | | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[46].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 5 | 27 | 5.40 | | fabric_clk | | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[9].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 9 | 27 | 3.00 | | fabric_clk | | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 14 | 27 | 1.93 | | fabric_clk | | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | fabric_clk | | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 16 | 27 | 1.69 | | fabric_clk | | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 16 | 27 | 1.69 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_w_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wr_pntr_plus1_pf_carry | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_w_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 5 | 27 | 5.40 | | fabric_clk | | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 16 | 27 | 1.69 | | fabric_clk | | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | fabric_clk | | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[40].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | fabric_clk | | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | fabric_clk | | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 27 | 3.00 | | fabric_clk | | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[15].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 10 | 27 | 2.70 | | fabric_clk | | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | fabric_clk | | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[45].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 4 | 27 | 6.75 | | fabric_clk | | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | fabric_clk | | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[23].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 5 | 27 | 5.40 | | fabric_clk | | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 14 | 27 | 1.93 | | fabric_clk | | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 14 | 27 | 1.93 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[16].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | fabric_clk | | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[2].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | fabric_clk | | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | fabric_clk | | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[22].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 3 | 27 | 9.00 | | fabric_clk | | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 27 | 2.70 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[8].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[7].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[33].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[32].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[21].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 8 | 27 | 3.38 | | CLKFBIN | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_r_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wr_pntr_plus1_pf_carry | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_r_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/xpm_fifo_rst_inst/wrst_busy | 8 | 27 | 3.38 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[6].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 15 | 27 | 1.80 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[0].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 9 | 27 | 3.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[1].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 6 | 27 | 4.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[38].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 8 | 27 | 3.38 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[31].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 8 | 27 | 3.38 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[39].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 8 | 27 | 3.38 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[44].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[19].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 6 | 27 | 4.50 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[37].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 6 | 27 | 4.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[20].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 8 | 27 | 3.38 | | fabric_clk | | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 11 | 27 | 2.45 | | fabric_clk | | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | fabric_clk | | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[30].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 6 | 27 | 4.50 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[11].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 7 | 27 | 3.86 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[14].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 3 | 27 | 9.00 | | fabric_clk | | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 13 | 27 | 2.08 | | fabric_clk | | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[43].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 11 | 27 | 2.45 | | fabric_clk | | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 12 | 27 | 2.25 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[35].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 10 | 27 | 2.70 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[29].ngCCM_gbt/CrossClock_DV_cnt/DataAtoB_reg | | 4 | 27 | 6.75 | | tx_wordclk | TX_CLKEN_repN_12 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 9 | 28 | 3.11 | | tx_wordclk | TX_CLKEN_repN_45 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 29 | 2.07 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 11 | 30 | 2.73 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 9 | 30 | 3.33 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 9 | 30 | 3.33 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 30 | 4.29 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/reg0[31]_i_1_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 6 | 30 | 5.00 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 11 | 30 | 2.73 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 11 | 30 | 2.73 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 30 | 4.29 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 30 | 4.29 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 9 | 30 | 3.33 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 11 | 30 | 2.73 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 30 | 4.29 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 9 | 30 | 3.33 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 6 | 30 | 5.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 30 | 4.29 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 11 | 30 | 2.73 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 11 | 30 | 2.73 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 30 | 4.29 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 9 | 30 | 3.33 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | tx_wordclk | TX_CLKEN_repN_34 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 14 | 30 | 2.14 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 30 | 4.29 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 9 | 30 | 3.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 8 | 30 | 3.75 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 10 | 30 | 3.00 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/reg_ngccm_jtag_i | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 7 | 30 | 4.29 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 6 | 31 | 5.17 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 6 | 31 | 5.17 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 8 | 31 | 3.88 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 6 | 31 | 5.17 | | tx_wordclk | TX_CLKEN_repN_41 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 13 | 31 | 2.38 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 7 | 31 | 4.43 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 3 | 31 | 10.33 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 6 | 31 | 5.17 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 5 | 31 | 6.20 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDIBits0 | | 4 | 31 | 7.75 | | ipb_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | ctrl_regs_inst/regs[80]_116 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[63]_149 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 32 | 1.88 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 2 | 32 | 16.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[88]_124 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[90]_87 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | clk250 | stat_regs_inst/wea_repN_2 | | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | clk250 | g_clock_rate_din[37].i_rate_ngccm_status0/q0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | clk250 | g_clock_rate_din[36].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[35].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[34].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 10 | 32 | 3.20 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[33].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[32].i_rate_ngccm_status0/q0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | clk250 | g_clock_rate_din[38].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[36]_141 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 32 | 2.29 | | clk250 | g_clock_rate_din[31].i_rate_ngccm_status0/q0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | clk250 | g_clock_rate_din[30].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | clk250 | g_clock_rate_din[29].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[2].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[28].i_rate_ngccm_status0/q0 | | 8 | 32 | 4.00 | | clk250 | g_clock_rate_din[27].i_rate_ngccm_status0/q0 | | 6 | 32 | 5.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | clk250 | g_clock_rate_din[40].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | clk250 | g_clock_rate_din[39].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[47]_163 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | clk250 | g_clock_rate_din[3].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | clk250 | g_clock_rate_din[8].i_rate_ngccm_status0/q0 | | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[7].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | clk250 | g_clock_rate_din[6].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | clk250 | g_clock_rate_din[5].i_rate_ngccm_status0/q0 | | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[4].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[50]_81 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | clk250 | g_clock_rate_din[46].i_rate_ngccm_status0/q0 | | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[45].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[44].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[52]_117 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | clk250 | g_clock_rate_din[43].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[42].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[41].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[47].i_rate_ngccm_status0/q0 | | 6 | 32 | 5.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[13].i_rate_ngccm_status0/q0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 5 | 32 | 6.40 | | clk250 | g_clock_rate_din[12].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[58]_89 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 19 | 32 | 1.68 | | clk250 | g_clock_rate_din[11].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 5 | 32 | 6.40 | | clk250 | g_clock_rate_din[10].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[9].i_rate_ngccm_status0/q0 | | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[0].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[61]_171 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 32 | 2.00 | | clk250 | g_clock_rate_din[14].i_rate_ngccm_status0/q0 | | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[25]_168 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | clk250 | g_clock_rate_din[19].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | clk250 | g_clock_rate_din[1].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | clk250 | g_clock_rate_din[18].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[17].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[16].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | clk250 | g_clock_rate_din[15].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[2]_112 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | ctrl_regs_inst/regs[22]_82 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 18 | 32 | 1.78 | | clk250 | g_clock_rate_din[26].i_rate_ngccm_status0/q0 | | 6 | 32 | 5.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | clk250 | g_clock_rate_din[25].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[15]_161 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | clk250 | g_clock_rate_din[24].i_rate_ngccm_status0/q0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[23].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | clk250 | g_clock_rate_din[22].i_rate_ngccm_status0/q0 | | 6 | 32 | 5.33 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | clk250 | g_clock_rate_din[21].i_rate_ngccm_status0/q0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | clk250 | g_clock_rate_din[20].i_rate_ngccm_status0/q0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 2 | 32 | 16.00 | | CLKFBIN | i_AXI4_to_ipbus/i_w_FIFO/a4 | | 2 | 32 | 16.00 | | CLKFBIN | i_AXI4_to_ipbus/i_w_FIFO/w_FIFO_wren | | 2 | 32 | 16.00 | | ipb_clk | ctrl_regs_inst/regs[31]_147 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[18]_83 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/reg0[159]_i_1_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 10 | 32 | 3.20 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/reg0[95]_i_1_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 13 | 32 | 2.46 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/reg0[191]_i_1_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 12 | 32 | 2.67 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/reg0[63]_i_1_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 12 | 32 | 2.67 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/reg0[127]_i_1_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 12 | 32 | 2.67 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/reg0[255]_i_1_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 12 | 32 | 2.67 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/reg0[223]_i_1_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 13 | 32 | 2.46 | | tx_wordclk | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | i_tcds2_if/fabric_clk_in | i_tcds2_if/prbs_chk_unlock_cnt/count[31]_i_1_n_0 | ctrl_regs_inst/prbschk_reset | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[29]_169 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[38]_109 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[48]_118 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[46]_96 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | ctrl_regs_inst/regs[56]_126 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[72]_132 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 2 | 32 | 16.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | ctrl_regs_inst/regs[84]_115 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[78]_94 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[98]_106 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[85]_181 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[75]_164 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 10 | 32 | 3.20 | | ipb_clk | ctrl_regs_inst/regs[49]_178 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[68]_139 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[91]_150 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[99]_72 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[6]_111 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | ctrl_regs_inst/regs[87]_158 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[33]_194 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 18 | 32 | 1.78 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | ctrl_regs_inst/regs[19]_100 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[44]_133 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 32 | 2.29 | | ipb_clk | ctrl_regs_inst/regs[70]_107 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | ctrl_regs_inst/regs[57]_170 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 32 | 1.88 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[82]_79 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[76]_131 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[69]_197 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[21]_177 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | ctrl_regs_inst/regs[39]_74 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 32 | 2.00 | | ipb_clk | ctrl_regs_inst/regs[83]_157 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[73]_188 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[89]_172 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[95]_151 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[93]_173 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[9]_184 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | ctrl_regs_inst/regs[43]_162 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | ctrl_regs_inst/regs[67]_102 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 32 | 2.00 | | ipb_clk | ctrl_regs_inst/regs[96]_138 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | ctrl_regs_inst/regs[97]_198 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | ipb_clk | ctrl_regs_inst/regs[51]_155 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | ctrl_regs_inst/regs[45]_187 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 32 | 2.29 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[30]_90 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 32 | 2.13 | | ipb_clk | ctrl_regs_inst/regs[26]_91 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | ctrl_regs_inst/regs[23]_154 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 32 | 2.13 | | ipb_clk | ctrl_regs_inst/regs[41]_186 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 32 | 2.00 | | ipb_clk | ctrl_regs_inst/regs[27]_146 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 32 | 2.29 | | ipb_clk | ctrl_regs_inst/regs[24]_128 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | ipb_clk | ctrl_regs_inst/regs[65]_196 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 32 | 1.88 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | ctrl_regs_inst/regs[40]_134 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 22 | 32 | 1.45 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | ctrl_regs_inst/regs[3]_105 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[5]_193 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[20]_119 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 32 | 2.00 | | ipb_clk | ctrl_regs_inst/regs[17]_176 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[64]_140 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 32 | 2.00 | | ipb_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 5 | 32 | 6.40 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[35]_103 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 19 | 32 | 1.68 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[34]_110 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | ctrl_regs_inst/regs[16]_120 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[62]_88 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 18 | 32 | 1.78 | | ipb_clk | ctrl_regs_inst/regs[55]_156 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 32 | 1.88 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | ipb_clk | ctrl_regs_inst/regs[32]_142 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 18 | 32 | 1.78 | | ipb_clk | ctrl_regs_inst/regs[28]_127 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 18 | 32 | 1.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 32 | 2.29 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[60]_125 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 32 | 2.00 | | ipb_clk | ctrl_regs_inst/regs[42]_97 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 32 | 1.88 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | ctrl_regs_inst/regs[122]_85 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[110]_92 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[114]_77 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[119]_160 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[104]_130 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[115]_159 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[105]_190 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[102]_75 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | ctrl_regs_inst/regs[13]_185 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | ctrl_regs_inst/regs[100]_137 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[125]_175 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 32 | 3.20 | | ipb_clk | ctrl_regs_inst/regs[124]_121 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 9 | 32 | 3.56 | | ipb_clk | ctrl_regs_inst/regs[123]_152 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | ctrl_regs_inst/regs[120]_122 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[94]_86 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[11]_101 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[118]_76 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[107]_166 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | ctrl_regs_inst/regs[117]_183 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | ctrl_regs_inst/regs[112]_114 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[109]_191 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | ctrl_regs_inst/regs[103]_71 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | ctrl_regs_inst/regs[108]_129 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | ctrl_regs_inst/regs[106]_93 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 32 | 2.29 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[121]_174 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[10]_99 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | ctrl_regs_inst/regs[0]_145 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[12]_135 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[116]_113 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | ctrl_regs_inst/regs[127]_153 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[113]_182 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[111]_167 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | ctrl_regs_inst/regs[101]_144 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[14]_98 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[126]_84 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 32 | 2.29 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 32 | 3.20 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | ctrl_regs_inst/regs[53]_179 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[92]_123 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[74]_95 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 32 | 3.20 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[8]_136 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | ipb_clk | ctrl_regs_inst/regs[37]_195 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | ipb_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 5 | 32 | 6.40 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 11 | 32 | 2.91 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 5 | 32 | 6.40 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 5 | 32 | 6.40 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | ipb_clk | ctrl_regs_inst/regs[71]_73 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 12 | 32 | 2.67 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 9 | 32 | 3.56 | | ipb_clk | ctrl_regs_inst/regs[66]_108 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 19 | 32 | 1.68 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 11 | 32 | 2.91 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 5 | 32 | 6.40 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 8 | 32 | 4.00 | | ipb_clk | ctrl_regs_inst/regs[7]_104 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 7 | 32 | 4.57 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 9 | 32 | 3.56 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 9 | 32 | 3.56 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 32 | 2.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 6 | 32 | 5.33 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/IPbus_DataOut[31]_i_1_n_0 | | 7 | 32 | 4.57 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 5 | 32 | 6.40 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/reg_ngccm_jtag_i_reg_n_0_[9] | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/jtag_reset_local[0] | 10 | 32 | 3.20 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/pre_r1_rxdatavalid_i | | 3 | 32 | 10.67 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/sync[31]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_ngccm/ngccm_state_o_reg[0]_inv[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 32 | 2.91 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 8 | 32 | 4.00 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/LocalJTAGBridge_inst/JTAGMaster_inst/TDOBits0 | | 6 | 32 | 5.33 | | ipb_clk | ctrl_regs_inst/regs[59]_148 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 32 | 2.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[77]_189 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 32 | 5.33 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[4]_143 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | ipb_clk | ctrl_regs_inst/regs[54]_80 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | ipb_clk | ctrl_regs_inst/regs[86]_78 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[79]_165 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 32 | 4.57 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/jtag_command[31]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 32 | 3.20 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/done_o0 | | 3 | 32 | 10.67 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | tx_wordclk | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/phase_detector_acc1_carry__0_n_6 | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_tx_phase_aligner/cmp_fifo_fill_level_acc/reset_txusr | 4 | 32 | 8.00 | | ipb_clk | ctrl_regs_inst/regs[81]_180 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 2 | 32 | 16.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/ngccm_mosi[ipb_wdata][31]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 32 | 2.46 | | CLKFBIN | i_AXI4_to_ipbus/r_FIFO_wren | | 3 | 33 | 11.00 | | CLKFBIN | i_AXI4_to_ipbus/i_r_FIFO/a4 | | 3 | 33 | 11.00 | | tx_wordclk | TX_CLKEN_repN | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 10 | 33 | 3.30 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_b_fifo_inst/axi_chip2chip_async_fifo_inst/xpm_fifo_async_inst/gnuram_async_fifo.xpm_fifo_base_inst/rdp_inst/enb | | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[44].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[16].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[32].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[16].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[34].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[30].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[30].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[20].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 34 | 2.27 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[36].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[36].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[29].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[41].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[2].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[2].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[37].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[28].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[28].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[27].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[38].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[19].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 34 | 2.13 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[17].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[33].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[26].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[26].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 34 | 2.13 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[13].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[45].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | tx_wordclk | TX_CLKEN_repN_10 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | ctrl_regs_inst/regs[1]_192 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[12].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[35].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[40].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[46].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[39].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[19].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[11].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[21].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[21].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[10].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[10].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[4].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[40].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[4].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[9].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[9].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[22].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[5].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[0].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[0].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[29].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[5].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[35].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[31].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[31].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[47].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[47].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[43].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_server/ngccm_state[4]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | i_I2C_if/I2C_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[12].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_server/ngccm_state[3]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | i_I2C_if/I2C_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[14].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[14].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[43].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[15].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_server/ngccm_state[2]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | i_I2C_if/I2C_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_server/ngccm_state[5]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[24].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | i_I2C_if/I2C_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | i_I2C_if/I2C_array[8].buffer_server/ngccm_state[8]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_server/ngccm_state[7]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | i_I2C_if/I2C_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[20].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[24].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[7].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[15].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[7].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[32].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[34].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[11].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 34 | 2.83 | | ipb_clk | SFP_GEN[39].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | i_I2C_if/I2C_array[6].buffer_server/ngccm_state[6]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_server/ngccm_state[1]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | i_I2C_if/I2C_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[18].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[25].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[3].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[41].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | i_I2C_if/I2C_array[0].buffer_server/ngccm_state[0]_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[3].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 34 | 2.62 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[1].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[8].ngFEC_module/bkp_buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[25].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[17].ngFEC_module/i2c_comm_gen[0].buffer_ngccm/i___24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[10].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[11].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[1].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[2].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[3].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[4].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[42].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[5].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[5].buffer_server/ngccm_state[5]_6[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 34 | 2.43 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[7].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 5 | 34 | 6.80 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[8].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[7].buffer_server/ngccm_state[7]_8[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[8].buffer_server/ngccm_state[8]_9[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 34 | 3.09 | | ipb_clk | SFP_GEN[8].ngFEC_module/i2c_comm_gen[9].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[4].buffer_server/ngccm_state[4]_5[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[22].ngFEC_module/i2c_comm_gen[6].buffer_ngccm/i___23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[6].buffer_server/ngccm_state[6]_7[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[9].buffer_server/ngccm_state[9]_10[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 6 | 34 | 5.67 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[13].buffer_server/ngccm_state[13]_14[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[2].buffer_server/ngccm_state[2]_3[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[11].buffer_server/ngccm_state[11]_12[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[3].buffer_server/ngccm_state[3]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 34 | 4.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[10].buffer_server/ngccm_state[10]_11[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 34 | 3.40 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[0].buffer_server/ngccm_state[0]_1[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 34 | 4.25 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[1].buffer_server/ngccm_state[1]_2[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 34 | 3.78 | | i_tcds2_if/i_mgt_wrapper/i_txusrclk/bbstub_txoutclk_out[0] | | i_tcds2_if/i_mgt_wrapper/i_reset_sm/reset_synchronizer_tx_done_inst/gtwiz_reset_tx_done_in[0] | 23 | 35 | 1.52 | | fabric_clk | | SFP_GEN[41].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 28 | 36 | 1.29 | | fabric_clk | | SFP_GEN[40].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 23 | 36 | 1.57 | | fabric_clk | | SFP_GEN[39].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 25 | 36 | 1.44 | | fabric_clk | | SFP_GEN[38].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 26 | 36 | 1.38 | | fabric_clk | | SFP_GEN[3].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 24 | 36 | 1.50 | | fabric_clk | | SFP_GEN[34].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 25 | 36 | 1.44 | | fabric_clk | | SFP_GEN[33].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 32 | 36 | 1.13 | | fabric_clk | | SFP_GEN[32].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 29 | 36 | 1.24 | | fabric_clk | | SFP_GEN[31].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 28 | 36 | 1.29 | | fabric_clk | | SFP_GEN[30].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 27 | 36 | 1.33 | | fabric_clk | | SFP_GEN[37].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 22 | 36 | 1.64 | | fabric_clk | | SFP_GEN[29].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 28 | 36 | 1.29 | | fabric_clk | | SFP_GEN[2].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 24 | 36 | 1.50 | | fabric_clk | | SFP_GEN[28].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 31 | 36 | 1.16 | | fabric_clk | | SFP_GEN[27].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 28 | 36 | 1.29 | | fabric_clk | | SFP_GEN[26].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 25 | 36 | 1.44 | | fabric_clk | | SFP_GEN[25].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 26 | 36 | 1.38 | | fabric_clk | | SFP_GEN[24].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 19 | 36 | 1.89 | | fabric_clk | | SFP_GEN[23].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 26 | 36 | 1.38 | | fabric_clk | | SFP_GEN[22].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 33 | 36 | 1.09 | | fabric_clk | | SFP_GEN[21].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 30 | 36 | 1.20 | | fabric_clk | | SFP_GEN[35].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 26 | 36 | 1.38 | | fabric_clk | | SFP_GEN[20].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 23 | 36 | 1.57 | | fabric_clk | | SFP_GEN[36].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 27 | 36 | 1.33 | | fabric_clk | | SFP_GEN[1].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 24 | 36 | 1.50 | | fabric_clk | | SFP_GEN[18].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 24 | 36 | 1.50 | | fabric_clk | | SFP_GEN[17].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 34 | 36 | 1.06 | | fabric_clk | | SFP_GEN[16].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 29 | 36 | 1.24 | | fabric_clk | | SFP_GEN[15].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 31 | 36 | 1.16 | | fabric_clk | | SFP_GEN[14].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 29 | 36 | 1.24 | | fabric_clk | | SFP_GEN[13].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 26 | 36 | 1.38 | | fabric_clk | | SFP_GEN[12].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 20 | 36 | 1.80 | | fabric_clk | | SFP_GEN[10].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 26 | 36 | 1.38 | | fabric_clk | | SFP_GEN[19].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 29 | 36 | 1.24 | | fabric_clk | | SFP_GEN[47].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 29 | 36 | 1.24 | | fabric_clk | | SFP_GEN[9].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 19 | 36 | 1.89 | | fabric_clk | | SFP_GEN[0].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 20 | 36 | 1.80 | | fabric_clk | | SFP_GEN[11].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 27 | 36 | 1.33 | | fabric_clk | | SFP_GEN[42].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 24 | 36 | 1.50 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 12 | 36 | 3.00 | | fabric_clk | | SFP_GEN[45].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 27 | 36 | 1.33 | | fabric_clk | | SFP_GEN[6].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 27 | 36 | 1.33 | | fabric_clk | | SFP_GEN[7].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 21 | 36 | 1.71 | | fabric_clk | | SFP_GEN[4].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 25 | 36 | 1.44 | | fabric_clk | | SFP_GEN[46].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 31 | 36 | 1.16 | | fabric_clk | | SFP_GEN[44].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 27 | 36 | 1.33 | | fabric_clk | | SFP_GEN[43].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 24 | 36 | 1.50 | | fabric_clk | | SFP_GEN[8].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 21 | 36 | 1.71 | | fabric_clk | | SFP_GEN[5].ngCCM_gbt/Sync_TX_Reset/sync_m[3] | 23 | 36 | 1.57 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 40 | 2.50 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[28].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 40 | 2.67 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[47].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[27].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[37].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[26].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 40 | 2.67 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[12].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[25].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[38].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[5].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[24].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[3].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[23].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[22].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[45].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[11].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 40 | 5.71 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 40 | 2.35 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 40 | 5.71 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[39].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[6].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[21].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[20].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 40 | 2.67 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[40].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[19].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 40 | 2.35 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[32].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[41].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[10].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[1].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[7].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[46].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[18].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 7 | 40 | 5.71 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[42].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[17].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[9].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 40 | 2.67 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 40 | 2.35 | | ipb_clk | SFP_GEN[34].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[31].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[14].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[16].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/mod_do_wr_en | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/SR[0] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 8 | 40 | 5.00 | | ipb_clk | SFP_GEN[15].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[33].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[4].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[30].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[3].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[8].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[7].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[44].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[9].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 9 | 40 | 4.44 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[6].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 40 | 2.86 | | ipb_clk | SFP_GEN[13].ngFEC_module/bram_array[13].buffer_server/E[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[8].ngFEC_module/bram_array[2].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 10 | 40 | 4.00 | | ipb_clk | SFP_GEN[4].ngFEC_module/bram_array[10].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[35].ngFEC_module/bram_array[11].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[29].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 40 | 3.33 | | ipb_clk | SFP_GEN[0].ngFEC_module/bram_array[1].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | ipb_clk | SFP_GEN[2].ngFEC_module/bram_array[5].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 40 | 3.64 | | ipb_clk | SFP_GEN[36].ngFEC_module/bram_array[0].buffer_server/ngccm_state_o_reg[1]_4[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 40 | 3.08 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 20 | 41 | 2.05 | | tx_wordclk | TX_CLKEN_repN_58 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 13 | 42 | 3.23 | | tx_wordclk | TX_CLKEN_repN_10 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 19 | 42 | 2.21 | | tx_wordclk | TX_CLKEN_repN_25 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 20 | 43 | 2.15 | | fabric_clk | SFP_GEN[19].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 15 | 44 | 2.93 | | fabric_clk | SFP_GEN[0].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 11 | 44 | 4.00 | | fabric_clk | SFP_GEN[43].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | fabric_clk | SFP_GEN[6].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 9 | 44 | 4.89 | | fabric_clk | SFP_GEN[45].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | fabric_clk | SFP_GEN[7].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 11 | 44 | 4.00 | | fabric_clk | SFP_GEN[24].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 15 | 44 | 2.93 | | fabric_clk | SFP_GEN[34].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 11 | 44 | 4.00 | | fabric_clk | SFP_GEN[42].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[25].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 17 | 44 | 2.59 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 15 | 44 | 2.93 | | fabric_clk | SFP_GEN[39].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[33].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 12 | 44 | 3.67 | | fabric_clk | SFP_GEN[46].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | fabric_clk | SFP_GEN[41].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 16 | 44 | 2.75 | | fabric_clk | SFP_GEN[30].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[26].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[17].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 10 | 44 | 4.40 | | fabric_clk | SFP_GEN[28].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 12 | 44 | 3.67 | | fabric_clk | SFP_GEN[20].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 11 | 44 | 4.00 | | fabric_clk | SFP_GEN[4].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | fabric_clk | SFP_GEN[35].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | fabric_clk | SFP_GEN[13].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 12 | 44 | 3.67 | | fabric_clk | SFP_GEN[31].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 10 | 44 | 4.40 | | fabric_clk | SFP_GEN[16].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 12 | 44 | 3.67 | | fabric_clk | SFP_GEN[11].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 17 | 44 | 2.59 | | fabric_clk | SFP_GEN[38].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 10 | 44 | 4.40 | | fabric_clk | SFP_GEN[3].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 15 | 44 | 2.93 | | fabric_clk | SFP_GEN[27].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 11 | 44 | 4.00 | | fabric_clk | SFP_GEN[9].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 16 | 44 | 2.75 | | fabric_clk | SFP_GEN[36].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 9 | 44 | 4.89 | | fabric_clk | SFP_GEN[32].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[8].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[29].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 17 | 44 | 2.59 | | fabric_clk | SFP_GEN[1].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | fabric_clk | SFP_GEN[12].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | fabric_clk | SFP_GEN[14].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[40].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[37].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 11 | 44 | 4.00 | | fabric_clk | SFP_GEN[44].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 11 | 44 | 4.00 | | fabric_clk | SFP_GEN[22].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 12 | 44 | 3.67 | | fabric_clk | SFP_GEN[10].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 15 | 44 | 2.93 | | fabric_clk | SFP_GEN[21].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 10 | 44 | 4.40 | | fabric_clk | SFP_GEN[23].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 10 | 44 | 4.40 | | fabric_clk | SFP_GEN[47].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 13 | 44 | 3.38 | | fabric_clk | SFP_GEN[2].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 12 | 44 | 3.67 | | fabric_clk | SFP_GEN[15].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | fabric_clk | SFP_GEN[18].ngCCM_gbt/IPbus_gen[12].IPbus_local_inst/addr_local[11]_i_1_n_0 | | 14 | 44 | 3.14 | | tx_wordclk | TX_CLKEN_repN_31 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 20 | 46 | 2.30 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[34].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[34].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 9 | 48 | 5.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[40].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[40].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 13 | 48 | 3.69 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[6].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[6].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 11 | 48 | 4.36 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[15].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[15].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 14 | 48 | 3.43 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[39].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[39].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 13 | 48 | 3.69 | | tx_wordclk | TX_CLKEN_repN_45 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 28 | 48 | 1.71 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[23].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[23].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[4].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[4].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[5].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[5].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[46].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[46].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[33].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[33].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 15 | 48 | 3.20 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[3].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[3].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 9 | 48 | 5.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[28].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[28].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 14 | 48 | 3.43 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[2].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[2].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 13 | 48 | 3.69 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[22].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[22].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 9 | 48 | 5.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[47].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[47].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 9 | 48 | 5.33 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[25].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[25].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[17].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[17].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 10 | 48 | 4.80 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[32].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[32].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[45].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[45].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 17 | 48 | 2.82 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[12].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[12].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 13 | 48 | 3.69 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[0].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[0].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 11 | 48 | 4.36 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[14].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[14].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[20].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[20].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[27].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[27].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 13 | 48 | 3.69 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[43].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[43].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[11].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[11].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 15 | 48 | 3.20 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[36].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[36].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 11 | 48 | 4.36 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[7].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[7].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 11 | 48 | 4.36 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[35].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[35].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 14 | 48 | 3.43 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[41].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[41].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 11 | 48 | 4.36 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[26].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[26].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 14 | 48 | 3.43 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[44].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[44].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 13 | 48 | 3.69 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[1].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[1].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[18].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[18].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[24].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[24].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 17 | 48 | 2.82 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[37].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[37].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/axi_chip2chip_tdm_inst/tdm_data_valid_reg_1[0] | | 6 | 48 | 8.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[29].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[29].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 15 | 48 | 3.20 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[21].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[21].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/aurora_ecc_io_stage.ecc_in_reg_slice_inst/s_ready_i_reg_0[0] | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.user_reset_sync_inst/AS[0] | 17 | 48 | 2.82 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/aurora_ecc_io_stage.ecc_in_reg_slice_inst/storage_data1 | | 6 | 48 | 8.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[16].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[16].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 10 | 48 | 4.80 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[13].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[13].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 10 | 48 | 4.80 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[10].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[10].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 13 | 48 | 3.69 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[30].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[30].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 14 | 48 | 3.43 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[42].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[42].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 15 | 48 | 3.20 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[8].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[8].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[38].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[38].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 15 | 48 | 3.20 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[31].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[31].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[9].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[9].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 12 | 48 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | SFP_GEN[19].ngCCM_gbt/RX_Word_rx400 | SFP_GEN[19].ngCCM_gbt/Sync_RX_Reset/sync_m[3] | 15 | 48 | 3.20 | | tx_wordclk | TX_CLKEN_repN_28 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 22 | 49 | 2.23 | | tx_wordclk | TX_CLKEN_repN_64 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 21 | 52 | 2.48 | | ipb_clk | SFP_GEN[11].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__10_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 55 | 3.24 | | ipb_clk | SFP_GEN[8].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__7_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 55 | 3.24 | | ipb_clk | SFP_GEN[45].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__44_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 55 | 5.00 | | ipb_clk | SFP_GEN[17].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__16_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 55 | 4.58 | | ipb_clk | SFP_GEN[6].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__5_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 11 | 55 | 5.00 | | ipb_clk | SFP_GEN[43].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__42_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 55 | 3.24 | | ipb_clk | SFP_GEN[35].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__34_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 55 | 3.44 | | ipb_clk | SFP_GEN[28].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__27_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 18 | 55 | 3.06 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/aurora_ecc_io_stage.tdm_out_reg_slice_inst/storage_data1 | | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[3].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__2_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[34].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__33_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 55 | 4.23 | | ipb_clk | SFP_GEN[29].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__28_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 19 | 55 | 2.89 | | ipb_clk | SFP_GEN[23].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__22_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 55 | 3.44 | | ipb_clk | SFP_GEN[30].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__29_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 55 | 3.67 | | ipb_clk | SFP_GEN[47].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__46_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 55 | 4.58 | | ipb_clk | SFP_GEN[4].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__3_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 55 | 3.44 | | ipb_clk | SFP_GEN[39].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__38_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[22].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__21_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[14].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__13_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 55 | 3.67 | | ipb_clk | SFP_GEN[21].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__20_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 55 | 3.67 | | ipb_clk | SFP_GEN[9].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__8_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 55 | 3.44 | | ipb_clk | SFP_GEN[40].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__39_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[7].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__6_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[5].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__4_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 55 | 3.67 | | ipb_clk | SFP_GEN[25].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__24_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 55 | 4.23 | | ipb_clk | SFP_GEN[13].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__12_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 18 | 55 | 3.06 | | ipb_clk | SFP_GEN[2].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 55 | 3.67 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/txseq_counter_i_reg[1]_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_init_sm_i/gen_ch_bond_int_reg | 12 | 55 | 4.58 | | ipb_clk | SFP_GEN[20].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__19_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 55 | 3.24 | | ipb_clk | SFP_GEN[42].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__41_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 55 | 3.24 | | ipb_clk | SFP_GEN[19].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__18_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 55 | 4.23 | | ipb_clk | SFP_GEN[38].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__37_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[31].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__30_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[26].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__25_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 55 | 3.24 | | ipb_clk | SFP_GEN[12].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__11_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[27].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__26_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 55 | 3.44 | | ipb_clk | SFP_GEN[41].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__40_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[37].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__36_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[15].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__14_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 55 | 3.24 | | ipb_clk | SFP_GEN[18].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__17_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 12 | 55 | 4.58 | | ipb_clk | SFP_GEN[33].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__32_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[32].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__31_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 55 | 3.44 | | ipb_clk | SFP_GEN[46].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__45_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[10].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__9_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 18 | 55 | 3.06 | | ipb_clk | SFP_GEN[24].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__23_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 16 | 55 | 3.44 | | ipb_clk | SFP_GEN[16].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__15_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 15 | 55 | 3.67 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_inst/aurora_ecc_io_stage.ecc_in_reg_slice_inst/E[0] | | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[0].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[1].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__0_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 17 | 55 | 3.24 | | ipb_clk | SFP_GEN[44].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__43_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 14 | 55 | 3.93 | | ipb_clk | SFP_GEN[36].ngFEC_module/buffer_ngccm_jtag/w_address[11]_i_1__35_n_0 | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 13 | 55 | 4.23 | | tx_wordclk | TX_CLKEN_repN_34 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 22 | 57 | 2.59 | | tx_wordclk | TX_CLKEN_repN_50 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 22 | 58 | 2.64 | | tx_wordclk | TX_CLKEN_repN_32 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 21 | 60 | 2.86 | | tx_wordclk | TX_CLKEN_repN_55 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 25 | 62 | 2.48 | | tx_wordclk | TX_CLKEN_repN_42 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 25 | 63 | 2.52 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_init_sm_i/E[0] | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/global_logic_i/channel_init_sm_i/SR[0] | 10 | 64 | 6.40 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_lane_0_i/sym_dec_i/valid_d | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/core_reset_logic_i/SR[0] | 11 | 64 | 5.82 | | tx_wordclk | TX_CLKEN_repN_41 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 24 | 64 | 2.67 | | tx_wordclk | TX_CLKEN_repN_32 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 24 | 65 | 2.71 | | tx_wordclk | TX_CLKEN_repN_28 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 24 | 65 | 2.71 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/cbcc_gtx0_i/hold_reg | 9 | 66 | 7.33 | | tx_wordclk | TX_CLKEN_repN_62 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 18 | 68 | 3.78 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/aurora_phy.user_reset_sync_inst/AS[0] | 26 | 74 | 2.85 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/RX_DATA_O0 | | 15 | 76 | 5.07 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/DONE_o_reg_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[24] | 17 | 76 | 4.47 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/RX_DATA_O0 | | 14 | 76 | 5.43 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[13] | 18 | 76 | 4.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[0] | 20 | 76 | 3.80 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[3] | 16 | 76 | 4.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[11] | 20 | 76 | 3.80 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/RX_DATA_O0 | | 11 | 76 | 6.91 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[22] | 12 | 76 | 6.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/RX_DATA_O0 | | 15 | 76 | 5.07 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/RX_DATA_O0 | | 15 | 76 | 5.07 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[14] | 14 | 76 | 5.43 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/RX_DATA_O0 | | 13 | 76 | 5.85 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/RX_DATA_O0 | | 21 | 76 | 3.62 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[1] | 17 | 76 | 4.47 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[15] | 21 | 76 | 3.62 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/RX_DATA_O0 | | 13 | 76 | 5.85 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[23] | 16 | 76 | 4.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/RX_DATA_O0 | | 14 | 76 | 5.43 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[6] | 13 | 76 | 5.85 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/RX_DATA_O0 | | 22 | 76 | 3.45 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/DONE_o_reg_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[0] | 15 | 76 | 5.07 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/RX_DATA_O0 | | 14 | 76 | 5.43 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[5] | 15 | 76 | 5.07 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[15] | 16 | 76 | 4.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/RX_DATA_O0 | | 16 | 76 | 4.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/RX_DATA_O0 | | 18 | 76 | 4.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[2] | 15 | 76 | 5.07 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[25] | 18 | 76 | 4.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/RX_DATA_O0 | | 16 | 76 | 4.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[4] | 19 | 76 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[17] | 16 | 76 | 4.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/RX_DATA_O0 | | 20 | 76 | 3.80 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/RX_DATA_O0 | | 18 | 76 | 4.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/RX_DATA_O0 | | 18 | 76 | 4.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/RX_DATA_O0 | | 17 | 76 | 4.47 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[16] | 15 | 76 | 5.07 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/RX_DATA_O0 | | 19 | 76 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/DONE_o_reg_0[0] | ctrl_regs_inst/regs_reg[6][15]_0[4] | 22 | 76 | 3.45 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/RX_DATA_O0 | | 14 | 76 | 5.43 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[26] | 17 | 76 | 4.47 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/RX_DATA_O0 | | 20 | 76 | 3.80 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[7] | 17 | 76 | 4.47 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[18] | 18 | 76 | 4.22 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/RX_DATA_O0 | | 19 | 76 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[5] | 15 | 76 | 5.07 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/RX_DATA_O0 | | 16 | 76 | 4.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[1] | 13 | 76 | 5.85 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/RX_DATA_O0 | | 14 | 76 | 5.43 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/RX_DATA_O0 | | 17 | 76 | 4.47 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[10] | 15 | 76 | 5.07 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[27] | 15 | 76 | 5.07 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/RX_DATA_O0 | | 17 | 76 | 4.47 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/RX_DATA_O0 | | 16 | 76 | 4.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[6] | 16 | 76 | 4.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[9] | 21 | 76 | 3.62 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/RX_DATA_O0 | | 16 | 76 | 4.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/RX_DATA_O0 | | 21 | 76 | 3.62 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[19] | 23 | 76 | 3.30 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[8] | 15 | 76 | 5.07 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/RX_DATA_O0 | | 18 | 76 | 4.22 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/RX_DATA_O0 | | 17 | 76 | 4.47 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/RX_DATA_O0 | | 19 | 76 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[28] | 17 | 76 | 4.47 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[3] | 19 | 76 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/RX_DATA_O0 | | 15 | 76 | 5.07 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/RX_DATA_O0 | | 16 | 76 | 4.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[20] | 13 | 76 | 5.85 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/RX_DATA_O0 | | 16 | 76 | 4.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[9] | 17 | 76 | 4.47 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/DONE_o_reg_0[0] | ctrl_regs_inst/regs_reg[5][31]_0[12] | 15 | 76 | 5.07 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/RX_DATA_O0 | | 20 | 76 | 3.80 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/RX_DATA_O0 | | 20 | 76 | 3.80 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[29] | 22 | 76 | 3.45 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[8] | 16 | 76 | 4.75 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/RX_DATA_O0 | | 20 | 76 | 3.80 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[10] | 22 | 76 | 3.45 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/RX_DATA_O0 | | 16 | 76 | 4.75 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/RX_DATA_O0 | | 13 | 76 | 5.85 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[7] | 11 | 76 | 6.91 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[30] | 14 | 76 | 5.43 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/RX_DATA_O0 | | 12 | 76 | 6.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/RX_DATA_O0 | | 18 | 76 | 4.22 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[13] | 13 | 76 | 5.85 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[2] | 17 | 76 | 4.47 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[11] | 16 | 76 | 4.75 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/RX_DATA_O0 | | 18 | 76 | 4.22 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/RX_DATA_O0 | | 15 | 76 | 5.07 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/RX_DATA_O0 | | 17 | 76 | 4.47 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/RX_DATA_O0 | | 20 | 76 | 3.80 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[31] | 15 | 76 | 5.07 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[6][15]_0[12] | 20 | 76 | 3.80 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[21] | 16 | 76 | 4.75 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/RX_DATA_O0 | | 14 | 76 | 5.43 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/DONE_o_reg_1[0] | ctrl_regs_inst/regs_reg[5][31]_0[14] | 15 | 76 | 5.07 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/RX_DATA_O0 | | 18 | 76 | 4.22 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[2] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/READY_O_reg_0 | 21 | 80 | 3.81 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[1] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/RX_DECODER_READY_I | 17 | 80 | 4.71 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/READY_O_reg_0 | 23 | 80 | 3.48 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/READY_O_reg_0 | 19 | 80 | 4.21 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/READY_O_reg_0 | 17 | 80 | 4.71 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[6] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/READY_O_reg_0 | 24 | 80 | 3.33 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/READY_O_reg_0 | 19 | 80 | 4.21 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/READY_O_reg_0 | 19 | 80 | 4.21 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/READY_O_reg_0 | 19 | 80 | 4.21 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/READY_O_reg_0 | 24 | 80 | 3.33 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[4] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/READY_O_reg_0 | 21 | 80 | 3.81 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/READY_O_reg_0 | 20 | 80 | 4.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/READY_O_reg_0 | 19 | 80 | 4.21 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/READY_O_reg_0 | 19 | 80 | 4.21 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[7] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/READY_O_reg_0 | 20 | 80 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/RX_DECODER_READY_I | 19 | 80 | 4.21 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/READY_O_reg_0 | 17 | 80 | 4.71 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[3] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/READY_O_reg_0 | 24 | 80 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/READY_O_reg_0 | 23 | 80 | 3.48 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[0].rx_clken_sr_reg[0][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/READY_O_reg_0 | 18 | 80 | 4.44 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/READY_O_reg_0 | 19 | 80 | 4.21 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/READY_O_reg_0 | 25 | 80 | 3.20 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/RX_DECODER_READY_I | 20 | 80 | 4.00 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/READY_O_reg_0 | 24 | 80 | 3.33 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/READY_O_reg_0 | 23 | 80 | 3.48 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/READY_O_reg_0 | 20 | 80 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[7].rx_clken_sr_reg[7][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/READY_O_reg_0 | 25 | 80 | 3.20 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/READY_O_reg_0 | 23 | 80 | 3.48 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/READY_O_reg_0 | 21 | 80 | 3.81 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[11] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/READY_O_reg_0 | 23 | 80 | 3.48 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[4].rx_clken_sr_reg[4][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/READY_O_reg_0 | 17 | 80 | 4.71 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/READY_O_reg_0 | 17 | 80 | 4.71 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/READY_O_reg_0 | 19 | 80 | 4.21 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[8].rx_clken_sr_reg[8][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/READY_O_reg_0 | 18 | 80 | 4.44 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[5] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/READY_O_reg_0 | 22 | 80 | 3.64 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[9].rx_clken_sr_reg[9][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/READY_O_reg_0 | 20 | 80 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[9] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/READY_O_reg_0 | 20 | 80 | 4.00 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[8] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/READY_O_reg_0 | 22 | 80 | 3.64 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[6].rx_clken_sr_reg[6][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/READY_O_reg_0 | 16 | 80 | 5.00 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/READY_O_reg_0 | 17 | 80 | 4.71 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/gbtBank_Clk_gen[1].rx_clken_sr_reg[1][3]_0[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/RX_DECODER_READY_I | 20 | 80 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[3].rx_clken_sr_reg[3][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/READY_O_reg_0 | 27 | 80 | 2.96 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/READY_O_reg_0 | 27 | 80 | 2.96 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/RX_CLKEN_O[10] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/READY_O_reg_0 | 20 | 80 | 4.00 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[11].rx_clken_sr_reg[11][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/READY_O_reg_0 | 21 | 80 | 3.81 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/gbtBank_Clk_gen[5].rx_clken_sr_reg[5][3]_0[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/READY_O_reg_0 | 22 | 80 | 3.64 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[10].rx_clken_sr_reg[10][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/READY_O_reg_0 | 23 | 80 | 3.48 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/gbtBank_Clk_gen[2].rx_clken_sr_reg[2][3]_0[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/READY_O_reg_0 | 21 | 80 | 3.81 | | tx_wordclk | TX_CLKEN_repN_62 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 25 | 84 | 3.36 | | clk250 | stat_regs_inst/wea | | 14 | 88 | 6.29 | | tx_wordclk | TX_CLKEN_repN_33 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 30 | 90 | 3.00 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/rxdatavalid_i_0 | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/rxlossofsync_out_q | 10 | 90 | 9.00 | | tx_wordclk | TX_CLKEN_repN_12 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 24 | 91 | 3.79 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/common_reset_cbcc_i/SR[0] | 17 | 92 | 5.41 | | tx_wordclk | TX_CLKEN_repN_64 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 32 | 95 | 2.97 | | tx_wordclk | TX_CLKEN_repN_44 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 35 | 96 | 2.74 | | clk250 | g_clock_rate_din[9].i_rate_ngccm_status0/E[0] | | 22 | 96 | 4.36 | | clk250 | g_clock_rate_din[30].i_rate_ngccm_status0/E[0] | | 24 | 96 | 4.00 | | clk250 | g_clock_rate_din[34].i_rate_ngccm_status0/E[0] | | 25 | 96 | 3.84 | | clk250 | g_clock_rate_din[10].i_rate_ngccm_status0/E[0] | | 30 | 96 | 3.20 | | clk250 | g_clock_rate_din[20].i_rate_ngccm_status0/E[0] | | 30 | 96 | 3.20 | | clk250 | g_clock_rate_din[39].i_rate_ngccm_status0/E[0] | | 30 | 96 | 3.20 | | clk250 | g_clock_rate_din[40].i_rate_ngccm_status0/E[0] | | 32 | 96 | 3.00 | | clk250 | g_clock_rate_din[37].i_rate_ngccm_status0/E[0] | | 25 | 96 | 3.84 | | clk250 | g_clock_rate_din[27].i_rate_ngccm_status0/E[0] | | 18 | 96 | 5.33 | | clk250 | g_clock_rate_din[33].i_rate_ngccm_status0/E[0] | | 28 | 96 | 3.43 | | clk250 | g_clock_rate_din[25].i_rate_ngccm_status0/E[0] | | 29 | 96 | 3.31 | | clk250 | g_clock_rate_din[13].i_rate_ngccm_status0/E[0] | | 39 | 96 | 2.46 | | clk250 | g_clock_rate_din[12].i_rate_ngccm_status0/E[0] | | 34 | 96 | 2.82 | | clk250 | g_clock_rate_din[28].i_rate_ngccm_status0/E[0] | | 29 | 96 | 3.31 | | clk250 | g_clock_rate_din[11].i_rate_ngccm_status0/E[0] | | 35 | 96 | 2.74 | | clk250 | g_clock_rate_din[31].i_rate_ngccm_status0/E[0] | | 21 | 96 | 4.57 | | clk250 | g_clock_rate_din[26].i_rate_ngccm_status0/E[0] | | 20 | 96 | 4.80 | | clk250 | g_clock_rate_din[47].i_rate_ngccm_status0/E[0] | | 27 | 96 | 3.56 | | clk250 | g_clock_rate_din[2].i_rate_ngccm_status0/E[0] | | 34 | 96 | 2.82 | | clk250 | g_clock_rate_din[41].i_rate_ngccm_status0/E[0] | | 27 | 96 | 3.56 | | clk250 | g_clock_rate_din[35].i_rate_ngccm_status0/E[0] | | 27 | 96 | 3.56 | | clk250 | g_clock_rate_din[0].i_rate_ngccm_status0/E[0] | | 34 | 96 | 2.82 | | clk250 | g_clock_rate_din[19].i_rate_ngccm_status0/E[0] | | 27 | 96 | 3.56 | | clk250 | g_clock_rate_din[45].i_rate_ngccm_status0/E[0] | | 25 | 96 | 3.84 | | clk250 | g_clock_rate_din[44].i_rate_ngccm_status0/E[0] | | 24 | 96 | 4.00 | | clk250 | g_clock_rate_din[3].i_rate_ngccm_status0/E[0] | | 29 | 96 | 3.31 | | clk250 | g_clock_rate_din[46].i_rate_ngccm_status0/E[0] | | 40 | 96 | 2.40 | | clk250 | g_clock_rate_din[4].i_rate_ngccm_status0/E[0] | | 28 | 96 | 3.43 | | clk250 | g_clock_rate_din[23].i_rate_ngccm_status0/E[0] | | 26 | 96 | 3.69 | | clk250 | g_clock_rate_din[5].i_rate_ngccm_status0/E[0] | | 40 | 96 | 2.40 | | clk250 | g_clock_rate_din[32].i_rate_ngccm_status0/E[0] | | 19 | 96 | 5.05 | | clk250 | g_clock_rate_din[22].i_rate_ngccm_status0/E[0] | | 25 | 96 | 3.84 | | clk250 | g_clock_rate_din[16].i_rate_ngccm_status0/E[0] | | 25 | 96 | 3.84 | | clk250 | g_clock_rate_din[42].i_rate_ngccm_status0/E[0] | | 31 | 96 | 3.10 | | clk250 | g_clock_rate_din[21].i_rate_ngccm_status0/E[0] | | 29 | 96 | 3.31 | | clk250 | g_clock_rate_din[18].i_rate_ngccm_status0/E[0] | | 29 | 96 | 3.31 | | clk250 | g_clock_rate_din[43].i_rate_ngccm_status0/E[0] | | 25 | 96 | 3.84 | | clk250 | g_clock_rate_din[38].i_rate_ngccm_status0/E[0] | | 22 | 96 | 4.36 | | clk250 | g_clock_rate_din[6].i_rate_ngccm_status0/E[0] | | 31 | 96 | 3.10 | | clk250 | g_clock_rate_din[36].i_rate_ngccm_status0/E[0] | | 30 | 96 | 3.20 | | clk250 | g_clock_rate_din[24].i_rate_ngccm_status0/E[0] | | 28 | 96 | 3.43 | | clk250 | g_clock_rate_din[7].i_rate_ngccm_status0/E[0] | | 32 | 96 | 3.00 | | clk250 | g_clock_rate_din[29].i_rate_ngccm_status0/E[0] | | 24 | 96 | 4.00 | | clk250 | g_clock_rate_din[14].i_rate_ngccm_status0/E[0] | | 34 | 96 | 2.82 | | clk250 | g_clock_rate_din[15].i_rate_ngccm_status0/E[0] | | 31 | 96 | 3.10 | | clk250 | g_clock_rate_din[17].i_rate_ngccm_status0/E[0] | | 27 | 96 | 3.56 | | clk250 | g_clock_rate_din[1].i_rate_ngccm_status0/E[0] | | 27 | 96 | 3.56 | | clk250 | g_clock_rate_din[8].i_rate_ngccm_status0/E[0] | | 24 | 96 | 4.00 | | tx_wordclk | TX_CLKEN_repN_37 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 40 | 107 | 2.67 | | tx_wordclk | TX_CLKEN_repN_67 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 35 | 108 | 3.09 | | tx_wordclk | TX_CLKEN_repN_4 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 25 | 109 | 4.36 | | tx_wordclk | TX_CLKEN_repN_63 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 39 | 116 | 2.97 | | tx_wordclk | TX_CLKEN_repN_33 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 35 | 118 | 3.37 | | tx_wordclk | TX_CLKEN_repN_66 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 34 | 119 | 3.50 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg1[119]_i_1__20_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 25 | 121 | 4.84 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg1[119]_i_1__9_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 27 | 121 | 4.48 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg1[119]_i_1__4_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 29 | 121 | 4.17 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg1[119]_i_1__32_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 23 | 121 | 5.26 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg1[119]_i_1__10_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 25 | 121 | 4.84 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg1[119]_i_1__44_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 30 | 121 | 4.03 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg1[119]_i_1__36_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 26 | 121 | 4.65 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg1[119]_i_1__30_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 28 | 121 | 4.32 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg1[119]_i_1__15_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 25 | 121 | 4.84 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg1[119]_i_1__17_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 26 | 121 | 4.65 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg1[119]_i_1__13_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 24 | 121 | 5.04 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg1[119]_i_1__0_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 23 | 121 | 5.26 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[5].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[5].gbt_rxgearbox_inst/reg1[119]_i_1__8_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/AR[0] | 30 | 121 | 4.03 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg1[119]_i_1__14_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 30 | 121 | 4.03 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg1[119]_i_1__3_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 27 | 121 | 4.48 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg1[119]_i_1__41_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 27 | 121 | 4.48 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg1[119]_i_1__26_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 30 | 121 | 4.03 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/reg1[119]_i_1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 29 | 121 | 4.17 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg1[119]_i_1__16_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 27 | 121 | 4.48 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg1[119]_i_1__43_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 24 | 121 | 5.04 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg1[119]_i_1__46_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 25 | 121 | 4.84 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg1[119]_i_1__45_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 25 | 121 | 4.84 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg1[119]_i_1__12_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 24 | 121 | 5.04 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg1[119]_i_1__42_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 25 | 121 | 4.84 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg1[119]_i_1__31_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 27 | 121 | 4.48 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg1[119]_i_1__29_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 26 | 121 | 4.65 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg1[119]_i_1__27_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 23 | 121 | 5.26 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg1[119]_i_1__40_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 32 | 121 | 3.78 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[9].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[9].gbt_rxgearbox_inst/reg1[119]_i_1__28_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/AR[0] | 32 | 121 | 3.78 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg1[119]_i_1__2_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 26 | 121 | 4.65 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg1[119]_i_1__33_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 29 | 121 | 4.17 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg1[119]_i_1__1_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 34 | 121 | 3.56 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/reg1[119]_i_1__11_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 30 | 121 | 4.03 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg1[119]_i_1__34_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 27 | 121 | 4.48 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[8].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[8].gbt_rxgearbox_inst/reg1[119]_i_1__5_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/AR[0] | 28 | 121 | 4.32 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[10].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[10].gbt_rxgearbox_inst/reg1[119]_i_1__39_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/AR[0] | 28 | 121 | 4.32 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg1[119]_i_1__6_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 23 | 121 | 5.26 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/reg1[119]_i_1__35_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 26 | 121 | 4.65 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[11].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[11].gbt_rxgearbox_inst/reg1[119]_i_1__38_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/AR[0] | 25 | 121 | 4.84 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg1[119]_i_1__19_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 30 | 121 | 4.03 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[7].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[7].gbt_rxgearbox_inst/reg1[119]_i_1__18_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/AR[0] | 26 | 121 | 4.65 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[1].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[1].gbt_rxgearbox_inst/reg1[119]_i_1__23_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/AR[0] | 26 | 121 | 4.65 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[2].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[2].gbt_rxgearbox_inst/reg1[119]_i_1__24_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/AR[0] | 30 | 121 | 4.03 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[3].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[3].gbt_rxgearbox_inst/reg1[119]_i_1__22_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/AR[0] | 28 | 121 | 4.32 | | g_gbt_bank[2].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[2].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg1[119]_i_1__25_n_0 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 21 | 121 | 5.76 | | g_gbt_bank[3].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[0].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[3].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[0].gbt_rxgearbox_inst/reg1[119]_i_1__37_n_0 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/AR[0] | 29 | 121 | 4.17 | | g_gbt_bank[0].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[6].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[0].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[6].gbt_rxgearbox_inst/reg1[119]_i_1__7_n_0 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/gbtRxReset_s_reg_0[0] | 26 | 121 | 4.65 | | g_gbt_bank[1].gbtbank/i_gbt_bank/mgt_inst/g_mgt_channel[4].i_mgt_ip_rx_buf/i_mgt_ip/inst/gen_gtwizard_gthe3_top.mgt_ip_gtwizard_gthe3_inst/gen_gtwizard_gthe3.gen_rx_user_clocking_internal.gen_single_instance.gtwiz_userclk_rx_inst/gtwiz_userclk_rx_usrclk2_out[0] | g_gbt_bank[1].gbtbank/i_gbt_bank/gbt_rxgearbox_multilink_gen[4].gbt_rxgearbox_inst/reg1[119]_i_1__21_n_0 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/AR[0] | 27 | 121 | 4.48 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/scrambler_64b66b_gtx0_i/data_valid_i | | 21 | 122 | 5.81 | | tx_wordclk | TX_CLKEN_repN_58 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 34 | 125 | 3.68 | | tx_wordclk | TX_CLKEN_repN_35 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 31 | 128 | 4.13 | | tx_wordclk | TX_CLKEN_repN_61 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 46 | 136 | 2.96 | | tx_wordclk | TX_CLKEN_repN_25 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 41 | 138 | 3.37 | | tx_wordclk | TX_CLKEN_repN_43 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 44 | 140 | 3.18 | | tx_wordclk | TX_CLKEN_repN_46 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 40 | 141 | 3.53 | | tx_wordclk | TX_CLKEN_repN_27 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 46 | 142 | 3.09 | | tx_wordclk | TX_CLKEN_repN_65 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 40 | 145 | 3.63 | | tx_wordclk | TX_CLKEN_repN_53 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 50 | 145 | 2.90 | | tx_wordclk | TX_CLKEN_repN_48 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 50 | 147 | 2.94 | | tx_wordclk | TX_CLKEN_repN_22 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[7].gbtBank_gbtBankRst/gbt_txreset_s[0] | 50 | 157 | 3.14 | | tx_wordclk | TX_CLKEN_repN_14 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 45 | 158 | 3.51 | | tx_wordclk | TX_CLKEN_repN_13 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 52 | 160 | 3.08 | | tx_wordclk | TX_CLKEN_repN_2 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 43 | 175 | 4.07 | | tx_wordclk | TX_CLKEN_repN_49 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 51 | 178 | 3.49 | | tx_wordclk | TX_CLKEN_repN_21 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 51 | 184 | 3.61 | | tx_wordclk | TX_CLKEN_repN_51 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 48 | 189 | 3.94 | | tx_wordclk | TX_CLKEN_repN | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 65 | 196 | 3.02 | | tx_wordclk | TX_CLKEN_repN_60 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 51 | 199 | 3.90 | | tx_wordclk | TX_CLKEN_repN_6 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 59 | 201 | 3.41 | | tx_wordclk | TX_CLKEN_repN_30 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 54 | 202 | 3.74 | | tx_wordclk | TX_CLKEN_repN_5 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 49 | 202 | 4.12 | | tx_wordclk | TX_CLKEN_repN_26 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 54 | 203 | 3.76 | | tx_wordclk | TX_CLKEN_repN_19 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 52 | 203 | 3.90 | | tx_wordclk | TX_CLKEN_repN_24 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[9].gbtBank_gbtBankRst/gbt_txreset_s[0] | 49 | 203 | 4.14 | | tx_wordclk | TX_CLKEN_repN_36 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[2].gbtBank_gbtBankRst/gbt_txreset_s[0] | 53 | 203 | 3.83 | | tx_wordclk | TX_CLKEN_repN_59 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[6].gbtBank_gbtBankRst/AR[0] | 54 | 203 | 3.76 | | tx_wordclk | TX_CLKEN_repN_15 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[3].gbtBank_gbtBankRst/gbt_txreset_s[0] | 55 | 203 | 3.69 | | tx_wordclk | TX_CLKEN_repN_29 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 52 | 203 | 3.90 | | tx_wordclk | TX_CLKEN_repN_52 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 54 | 203 | 3.76 | | tx_wordclk | TX_CLKEN_repN_9 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 55 | 203 | 3.69 | | tx_wordclk | TX_CLKEN_repN_11 | g_gbt_bank[1].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 54 | 203 | 3.76 | | tx_wordclk | TX_CLKEN_repN_1 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 52 | 203 | 3.90 | | tx_wordclk | TX_CLKEN_repN_20 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[11].gbtBank_gbtBankRst/gbt_txreset_s[0] | 54 | 203 | 3.76 | | tx_wordclk | TX_CLKEN_repN_56 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[5].gbtBank_gbtBankRst/gbt_txreset_s[0] | 55 | 203 | 3.69 | | tx_wordclk | TX_CLKEN_repN_17 | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[10].gbtBank_gbtBankRst/gbt_txreset_s[0] | 54 | 203 | 3.76 | | tx_wordclk | TX_CLKEN_repN_16 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[4].gbtBank_gbtBankRst/gbt_txreset_s[0] | 55 | 203 | 3.69 | | tx_wordclk | TX_CLKEN_repN_7 | g_gbt_bank[3].gbtbank/gbtBank_rst_gen[1].gbtBank_gbtBankRst/gbt_txreset_s[0] | 46 | 203 | 4.41 | | tx_wordclk | TX_CLKEN | g_gbt_bank[2].gbtbank/gbtBank_rst_gen[8].gbtBank_gbtBankRst/gbt_txreset_s[0] | 51 | 203 | 3.98 | | tx_wordclk | TX_CLKEN_repN_23 | g_gbt_bank[0].gbtbank/gbtBank_rst_gen[0].gbtBank_gbtBankRst/gbt_txreset_s[0] | 58 | 203 | 3.50 | | i_tcds2_if/i_mgt_wrapper/i_txusrclk/bbstub_txoutclk_out[0] | i_tcds2_if/tx_strobe | ctrl_regs_inst/SR[0] | 81 | 234 | 2.89 | | i_tcds2_if/fabric_clk_in | | ctrl_regs_inst/regs_reg[1][18]_0[1] | 37 | 234 | 6.32 | | i_tcds2_if/i_mgt_wrapper/i_txusrclk/bbstub_txoutclk_out[0] | i_tcds2_if/tx_strobe | i_tcds2_if/i_mgt_wrapper/i_reset_sm/reset_synchronizer_tx_done_inst/gtwiz_reset_tx_done_in[0] | 67 | 234 | 3.49 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/clkEnOut_s_reg_n_0 | | 83 | 234 | 2.82 | | i_tcds2_if/fabric_clk_in | | ctrl_regs_inst/prbschk_reset | 46 | 235 | 5.11 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/clk_dataFlag_o | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/sta_gbRdy_o | 83 | 254 | 3.06 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/sta_gbRdy_s | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_s | 81 | 255 | 3.15 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/gbReset_outsynch_s | 100 | 256 | 2.56 | | i_axi_slave/i_aurora/inst/aurora_64b66b_0_core_i/aurora_64b66b_0_wrapper_i/aurora_64b66b_0_multi_gt_i/ultrascale_rx_userclk/gtwiz_userclk_rx_usrclk2_out | | | 44 | 266 | 6.05 | | i_tcds2_if/fabric_clk_in | | | 50 | 267 | 5.34 | | CLKFBIN | | | 86 | 322 | 3.74 | | i_tcds2_if/i_mgt_wrapper/i_rxusrclk/bbstub_rxoutclk_out[0] | i_tcds2_if/cmp_lpgbtfpga_uplink/clkEnOut_s_reg_n_0 | i_tcds2_if/cmp_lpgbtfpga_uplink/rxgearbox_10g_gen.rxGearbox_10g24_inst/sta_gbRdy_o | 76 | 473 | 6.22 | | i_axi_slave/i_aurora/inst/clock_module_i/ultrascale_tx_userclk_1/init_clk | | | 133 | 539 | 4.05 | | fabric_clk | | ctrl_regs_inst/regs_reg[2][15]_0[10] | 567 | 576 | 1.02 | | fabric_clk | | ctrl_regs_inst/regs_reg[2][15]_0[11] | 571 | 576 | 1.01 | | DRPclk | | | 218 | 860 | 3.94 | | fabric_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 270 | 864 | 3.20 | | fabric_clk | SFP_GEN[5].ngCCM_gbt/fabric_clk_div2_reg[0] | | 1147 | 1392 | 1.21 | | tx_wordclk | | | 1119 | 4825 | 4.31 | | fabric_clk | fabric_clk_div2 | | 2076 | 5136 | 2.47 | | ipb_clk | | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | 3848 | 5449 | 1.42 | | clk250 | | | 1575 | 6888 | 4.37 | | ipb_clk | i_axi_slave/i_axi_chip2chip/inst/slave_fpga_gen.axi_chip2chip_slave_phy_inst/axi_chip2chip_phy_init_inst/axi_chip2chip_sync_cell_inst/sync_flop_2_BUFG[1] | | 4123 | 8853 | 2.15 | | ipb_clk | | | 3863 | 12373 | 3.20 | | fabric_clk | | | 11499 | 42535 | 3.70 | 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