# This file is automatically generated.
# It contains project source information necessary for synthesis and implementation.

# IP: D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/aurora_64b66b_0.xci
# IP: The module: 'aurora_64b66b_0' is the root of the design. Do not add the DONT_TOUCH constraint.

# IP: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_0/aurora_64b66b_0_gt.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_gt || ORIG_REF_NAME==aurora_64b66b_0_gt} -quiet] -quiet

# IP: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_1/aurora_64b66b_0_fifo_gen_master.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_fifo_gen_master || ORIG_REF_NAME==aurora_64b66b_0_fifo_gen_master} -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_0/synth/aurora_64b66b_0_gt_ooc.xdc

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_0/synth/aurora_64b66b_0_gt.xdc
set_property KEEP_HIERARCHY SOFT [get_cells [split [join [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_gt || ORIG_REF_NAME==aurora_64b66b_0_gt} -quiet] {/inst } ]/inst ] -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_1/aurora_64b66b_0_fifo_gen_master.xdc
set_property KEEP_HIERARCHY SOFT [get_cells [split [join [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_fifo_gen_master || ORIG_REF_NAME==aurora_64b66b_0_fifo_gen_master} -quiet] {/U0 } ]/U0 ] -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_1/aurora_64b66b_0_fifo_gen_master_clocks.xdc
#dup# set_property KEEP_HIERARCHY SOFT [get_cells [split [join [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_fifo_gen_master || ORIG_REF_NAME==aurora_64b66b_0_fifo_gen_master} -quiet] {/U0 } ]/U0 ] -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/aurora_64b66b_0_ooc.xdc
# XDC: The top module name and the constraint reference have the same name: 'aurora_64b66b_0'. Do not add the DONT_TOUCH constraint.
set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/aurora_64b66b_0.xdc
# XDC: The top module name and the constraint reference have the same name: 'aurora_64b66b_0'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/aurora_64b66b_0_clocks.xdc
# XDC: The top module name and the constraint reference have the same name: 'aurora_64b66b_0'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# IP: D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/aurora_64b66b_0.xci
# IP: The module: 'aurora_64b66b_0' is the root of the design. Do not add the DONT_TOUCH constraint.

# IP: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_0/aurora_64b66b_0_gt.xci
#dup# set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_gt || ORIG_REF_NAME==aurora_64b66b_0_gt} -quiet] -quiet

# IP: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_1/aurora_64b66b_0_fifo_gen_master.xci
#dup# set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_fifo_gen_master || ORIG_REF_NAME==aurora_64b66b_0_fifo_gen_master} -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_0/synth/aurora_64b66b_0_gt_ooc.xdc

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_0/synth/aurora_64b66b_0_gt.xdc
#dup# set_property KEEP_HIERARCHY SOFT [get_cells [split [join [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_gt || ORIG_REF_NAME==aurora_64b66b_0_gt} -quiet] {/inst } ]/inst ] -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_1/aurora_64b66b_0_fifo_gen_master.xdc
#dup# set_property KEEP_HIERARCHY SOFT [get_cells [split [join [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_fifo_gen_master || ORIG_REF_NAME==aurora_64b66b_0_fifo_gen_master} -quiet] {/U0 } ]/U0 ] -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/ip_1/aurora_64b66b_0_fifo_gen_master_clocks.xdc
#dup# set_property KEEP_HIERARCHY SOFT [get_cells [split [join [get_cells -hier -filter {REF_NAME==aurora_64b66b_0_fifo_gen_master || ORIG_REF_NAME==aurora_64b66b_0_fifo_gen_master} -quiet] {/U0 } ]/U0 ] -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/aurora_64b66b_0_ooc.xdc
# XDC: The top module name and the constraint reference have the same name: 'aurora_64b66b_0'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/aurora_64b66b_0.xdc
# XDC: The top module name and the constraint reference have the same name: 'aurora_64b66b_0'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# XDC: d:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sources_1/ip/aurora_64b66b_0/aurora_64b66b_0_clocks.xdc
# XDC: The top module name and the constraint reference have the same name: 'aurora_64b66b_0'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet