-makelib ies_lib/xpm -sv \
  "D:/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \
  "D:/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \
  "D:/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \
-endlib
-makelib ies_lib/xpm \
  "D:/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd" \
-endlib
-makelib ies_lib/axi_chip2chip_v5_0_9 \
  "../../../ipstatic/hdl/axi_chip2chip_v5_0_rfs.v" \
-endlib
-makelib ies_lib/xil_defaultlib \
  "../../../../ngFECKU115_pcie.srcs/sources_1/ip/axi_chip2chip_64B66B/sim/axi_chip2chip_64B66B.v" \
-endlib
-makelib ies_lib/xil_defaultlib \
  glbl.v
-endlib