--                              -*- Mode: VHDL -*-
-------------------------------------------------------------------------------
-- Title      : Interface the IPbus to i2c_master_top
-- Project    : 
-------------------------------------------------------------------------------
-- File       : LocalI2CBridge.vhd
-- Author     : Stephen Goadhouse  <sgoadhouse@virginia.edu>
-- Company    : Univ. of Virginia, Physics Dept.
-- Created    : 2012-03-13
-- Last update: 2012-06-22
-- Platform   : 
-- Standard   : VHDL'93
-------------------------------------------------------------------------------
-- Description: Bridge between the IPbus local interface and I2C pins
--              on the ngCCM via the GBT. Instatiate multiple times for
--              multiple busses.
-------------------------------------------------------------------------------
-- Copyright (c) 2012 
-------------------------------------------------------------------------------
-- Revisions  :
-- Date        Ver  Author  	Description
-- 2012-03-13  0.1  GOADHOUSE	Created
-- 2012-06-22  1.0  GOADHOUSE	Released
-- 2014-04-14	1.1  SAHIN		ack signal driven from from I2C master 
-------------------------------------------------------------------------------

--============================================================================
-- IPbus Memory Map: (NOTE: must examine the code to determine the memory map)
-- data[0] = 
-- data[1] = 
-- data[2] = 
-- data[3] = 
-- data[4] = 
-- data[5] = 
-- data[6] = 
-- data[7] = 
-- data[8] = 
-- data[9] = 
-- data[10] = 
-- data[13] = 
-- data[14] = 
-- data[15] = 
--============================================================================

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;

LIBRARY work;
--USE work.Constant_Declaration.ALL;

ENTITY LocalI2CBridge IS
  
  PORT (
    -- IPbus Local interface (sync'ed to clk_local)
    reset_local   : IN  STD_LOGIC;
    clk_local     : IN  STD_LOGIC;
    strobe_local  : IN  STD_LOGIC;
    write_local   : IN  STD_LOGIC;
    addr_local    : IN  STD_LOGIC_VECTOR(3 DOWNTO 0);
    DataIn_local  : IN  STD_LOGIC_VECTOR(31 DOWNTO 0);
    DataOut_local : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
		wb_ack_o		: OUT STD_LOGIC;
    clk_en   : IN  STD_LOGIC;
--	 I2C_ack_o		: OUT STD_LOGIC;
--    clk_6x_o      : out std_logic;
	 prer_scale_i	: IN STD_LOGIC_VECTOR(15 downto 0);
	 power_good    : IN STD_LOGIC;
	 sfp_rx_lost	: IN STD_LOGIC;
	 sfp_tx_fault	: IN STD_LOGIC;
    scl_i 			: IN STD_LOGIC;
    sda_i			: IN STD_LOGIC;
    scl_o 			: OUT STD_LOGIC;
    sda_o 			: OUT STD_LOGIC    
    );

END ENTITY LocalI2CBridge;

ARCHITECTURE rtl OF LocalI2CBridge IS

  COMPONENT i2c_master_usr IS
    GENERIC (
      ARST_LVL : std_logic);
    PORT (
      wb_clk_i     : in  std_logic;
      wb_rst_i     : in  std_logic := '0';
      arst_i       : in  std_logic := not ARST_LVL;
      wb_adr_i     : in  std_logic_vector(2 downto 0);
      wb_dat_i     : in  std_logic_vector(31 downto 0);
      wb_dat_o     : out std_logic_vector(31 downto 0);
      wb_we_i      : in  std_logic;
      wb_stb_i     : in  std_logic;
      wb_cyc_i     : in  std_logic;
      wb_ack_o     : out std_logic;
      wb_inta_o    : out std_logic;
			clk_en		   : IN  STD_LOGIC;
--      clk_6x_o     : out std_logic;
		prer_scale_i : IN STD_LOGIC_VECTOR(15 downto 0);
		power_good	 : IN STD_LOGIC;
		sfp_rx_lost	 : IN STD_LOGIC;
		sfp_tx_fault : IN STD_LOGIC;
      scl_pad_i    : in  std_logic;
      scl_pad_o    : out std_logic;
      scl_padoen_o : out std_logic;
      sda_pad_i    : in  std_logic;
      sda_pad_o    : out std_logic;
      sda_padoen_o : out std_logic);
  END COMPONENT i2c_master_usr;

 -- SIGNAL wb_ack_o     : std_logic;
  SIGNAL wb_inta_o    : std_logic;
  SIGNAL scl_pad_o    : std_logic;
  SIGNAL scl_padoen_o : std_logic;
  SIGNAL sda_pad_o    : std_logic;
  SIGNAL sda_padoen_o : std_logic;
  
BEGIN  -- ARCHITECTURE rtl

  i2c_master: i2c_master_usr
    GENERIC MAP (
      ARST_LVL => '0')
    PORT MAP (
      wb_clk_i     => clk_local,
      wb_rst_i     => reset_local,
      arst_i       => '1',              -- not using async reset
      wb_adr_i     => addr_local(2 DOWNTO 0),
      wb_dat_i     => DataIn_local,
      wb_dat_o     => DataOut_local,
      wb_we_i      => write_local,
      wb_stb_i     => strobe_local,
      wb_cyc_i     => strobe_local,
      wb_ack_o     => wb_ack_o,         -- unused for now
      wb_inta_o    => wb_inta_o,        -- unused for now
      clk_en	     => clk_en,
--      clk_6x_o     => clk_6x_o,
			prer_scale_i => prer_scale_i,
		power_good	 => power_good,
		sfp_rx_lost	 => sfp_rx_lost,
		sfp_tx_fault => sfp_tx_fault,
      scl_pad_i    => scl_i,
      scl_pad_o    => scl_pad_o,
      scl_padoen_o => scl_padoen_o,
      sda_pad_i    => sda_i,
      sda_pad_o    => sda_pad_o,
      sda_padoen_o => sda_padoen_o);

  -- The outputs are open-collector, so make them a '1' when padoen is
  -- asserted ('0'). The '1' means that the output is not driven and allows
  -- either a pull-up or another device that is driving to have control of the
  -- bus.
  scl_o <= scl_pad_o WHEN scl_padoen_o = '0' ELSE
           '1';
  
  sda_o <= sda_pad_o WHEN sda_padoen_o = '0' ELSE
           '1';
  
END ARCHITECTURE rtl;