Vivado Simulator 2020.1
Time resolution is 1 ps
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. stat_reg_tb.stat_regs_inst.stat_regs_inst.i_ram_cntr.xpm_memory_base_inst.config_drc  0
Time: 1 ps  Iteration: 0  Process: /stat_reg_tb/stat_regs_inst/stat_regs_inst/i_ram_cntr/xpm_memory_base_inst/Initial294_3082  Scope: stat_reg_tb.stat_regs_inst.stat_regs_inst.i_ram_cntr.xpm_memory_base_inst.config_drc  File: /wrk/2020.1/nightly/2020_05_27_2902540/packages/customer/vivado/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv Line: 490
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. stat_reg_tb.stat_regs_inst.stat_regs_inst.i_ram_rate.xpm_memory_base_inst.config_drc  0
Time: 1 ps  Iteration: 0  Process: /stat_reg_tb/stat_regs_inst/stat_regs_inst/i_ram_rate/xpm_memory_base_inst/Initial294_3082  Scope: stat_reg_tb.stat_regs_inst.stat_regs_inst.i_ram_rate.xpm_memory_base_inst.config_drc  File: /wrk/2020.1/nightly/2020_05_27_2902540/packages/customer/vivado/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv Line: 490