Vivado Simulator 2020.1
Copyright 1986-1999, 2001-2020 Xilinx, Inc. All Rights Reserved.
Running: D:/Xilinx/Vivado/2020.1/bin/unwrapped/win64.o/xelab.exe -wto 2e51a4e140b64c3ca29be3922ed730c1 --incr --debug typical --relax --mt 2 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot stat_reg_tb_behav xil_defaultlib.stat_reg_tb xil_defaultlib.glbl -log elaborate.log 
Using 2 slave threads.
Starting static elaboration
Pass Through NonSizing Optimizer
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
WARNING: [VRFC 10-922] index value <15> is out of range [7:0] [D:/Design_collection/ngFECKU115_pcie/ngFECKU115_pcie.srcs/sim_1/stat_reg_block.vhd:147]
Completed static elaboration
Starting simulation data flow analysis
Completed simulation data flow analysis
Time Resolution for simulation is 1ps
Compiling package std.standard
Compiling package std.textio
Compiling package ieee.std_logic_1164
Compiling package ieee.numeric_std
Compiling package xil_defaultlib.ngfec_pack
Compiling package unisim.vcomponents
Compiling package synopsys.attributes
Compiling package ieee.std_logic_misc
Compiling package xpm.vcomponents
Compiling package ieee.vital_timing
Compiling package ieee.vital_primitives
Compiling package unisim.vpkg
Compiling package vl.vl_types
Compiling module xil_defaultlib.glbl
Compiling architecture dsp48e2_v of entity unisim.DSP48E2 [\DSP48E2(autoreset_patdet="RESET...]
Compiling architecture behavioral of entity xil_defaultlib.DSP_dividerX3 [dsp_dividerx3_default]
Compiling architecture dsp48e2_v of entity unisim.DSP48E2 [\DSP48E2(creg=0,mreg=0,use_mult=...]
Compiling architecture behavioral of entity xil_defaultlib.DSP_rate_counterX3 [dsp_rate_counterx3_default]
Compiling architecture behavioral of entity xil_defaultlib.DSP_dividerX2 [\DSP_dividerX2(pattern="00000000...]
Compiling architecture behavioral of entity xil_defaultlib.DSP_MUX [dsp_mux_default]
Compiling architecture dsp48e2_v of entity unisim.DSP48E2 [\DSP48E2(acascreg=0,adreg=0,alum...]
Compiling architecture behavioral of entity xil_defaultlib.DSP_MUX_b [dsp_mux_b_default]
Compiling architecture dsp48e2_v of entity unisim.DSP48E2 [\DSP48E2(creg=0,mreg=0,use_mult=...]
Compiling module xpm.xpm_cdc_single(DEST_SYNC_FF=4,IN...
Compiling architecture behavioral of entity xil_defaultlib.DSP_counterX4 [dsp_counterx4_default]
Compiling architecture behavioral of entity xil_defaultlib.DSP_MUX_C [dsp_mux_c_default]
Compiling architecture dsp48e2_v of entity unisim.DSP48E2 [\DSP48E2(alumodereg=0,carryinreg...]
Compiling architecture behavioral of entity xil_defaultlib.DSP_MUX_C_b [dsp_mux_c_b_default]
Compiling module xpm.xpm_memory_base(MEMORY_SIZE=1638...
Compiling module xpm.xpm_memory_tdpram(MEMORY_SIZE=16...
Compiling architecture dsp48e2_v of entity unisim.DSP48E2 [\DSP48E2(acascreg=0,alumodereg=0...]
Compiling architecture behavioral of entity xil_defaultlib.ipb_user_status_regs [\ipb_user_status_regs(sim=true)\]
Compiling architecture behavioral of entity xil_defaultlib.stat_reg_block [stat_reg_block_default]
Compiling architecture behavioral of entity xil_defaultlib.stat_reg_tb
Built simulation snapshot stat_reg_tb_behav