#-----------------------------------------------------------
# Vivado v2018.3 (64-bit)
# SW Build 2405991 on Thu Dec  6 23:38:27 MST 2018
# IP Build 2404404 on Fri Dec  7 01:43:56 MST 2018
# Start of session at: Mon Apr 27 14:52:47 2020
# Process ID: 19432
# Current directory: d:/Design_collection/mgt_ip_ex
# Command line: vivado.exe -notrace -source d:/Design_collection/ngFECKU115/ngFECKU115.srcs/sources_1/ip/mgt_ip/mgt_ip_ex.tcl
# Log file: d:/Design_collection/mgt_ip_ex/vivado.log
# Journal file: d:/Design_collection/mgt_ip_ex\vivado.jou
#-----------------------------------------------------------
start_gui
source d:/Design_collection/ngFECKU115/ngFECKU115.srcs/sources_1/ip/mgt_ip/mgt_ip_ex.tcl -notrace
INFO: [open_example_project] Creating new example project...
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'D:/Xilinx/Vivado/2018.3/data/ip'.
create_project: Time (s): cpu = 00:00:18 ; elapsed = 00:00:08 . Memory (MB): peak = 776.957 ; gain = 166.922
INFO: [open_example_project] Importing original IP ...
INFO: [open_example_project] Generating the example project IP ...
INFO: [open_example_project] Adding example synthesis HDL files ...
INFO: [open_example_project] Adding example XDC files ...
INFO: [open_example_project] Adding simulation HDL files ...
INFO: [open_example_project] Sourcing example extension scripts ...
INFO: [IP_Flow 19-1686] Generating 'Instantiation Template' target for IP 'mgt_ip_vio_0'...
INFO: [IP_Flow 19-1686] Generating 'Synthesis' target for IP 'mgt_ip_vio_0'...
INFO: [IP_Flow 19-1686] Generating 'Simulation' target for IP 'mgt_ip_vio_0'...
INFO: [IP_Flow 19-1686] Generating 'Change Log' target for IP 'mgt_ip_vio_0'...
INFO: [open_example_project] Rebuilding all the top level IPs ...
INFO: [exportsim-Tcl-35] Exporting simulation files for "XSIM" (Xilinx Vivado Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip/xsim/mgt_ip.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "MODELSIM" (Mentor Graphics ModelSim Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip/modelsim/mgt_ip.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "QUESTA" (Mentor Graphics Questa Advanced Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip/questa/mgt_ip.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "IES" (Cadence Incisive Enterprise Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip/ies/mgt_ip.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "VCS" (Synopsys Verilog Compiler Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip/vcs/mgt_ip.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "RIVIERA" (Aldec Riviera-PRO Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip/riviera/mgt_ip.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "ACTIVEHDL" (Aldec Active-HDL Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip/activehdl/mgt_ip.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "XCELIUM" (Cadence Xcelium Parallel Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip/xcelium/mgt_ip.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "XSIM" (Xilinx Vivado Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip_vio_0/xsim/mgt_ip_vio_0.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "MODELSIM" (Mentor Graphics ModelSim Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip_vio_0/modelsim/mgt_ip_vio_0.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "QUESTA" (Mentor Graphics Questa Advanced Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip_vio_0/questa/mgt_ip_vio_0.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "IES" (Cadence Incisive Enterprise Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip_vio_0/ies/mgt_ip_vio_0.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "VCS" (Synopsys Verilog Compiler Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip_vio_0/vcs/mgt_ip_vio_0.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "RIVIERA" (Aldec Riviera-PRO Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip_vio_0/riviera/mgt_ip_vio_0.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "ACTIVEHDL" (Aldec Active-HDL Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip_vio_0/activehdl/mgt_ip_vio_0.sh'
INFO: [exportsim-Tcl-35] Exporting simulation files for "XCELIUM" (Cadence Xcelium Parallel Simulator)...
INFO: [exportsim-Tcl-29] Script generated: 'D:/Design_collection/mgt_ip_ex/mgt_ip_ex.ip_user_files/sim_scripts/mgt_ip_vio_0/xcelium/mgt_ip_vio_0.sh'
INFO: [open_example_project] Open Example Project completed
update_compile_order -fileset sources_1
exit
INFO: [Common 17-206] Exiting Vivado at Fri May  1 06:09:45 2020...