# PCIe clock.
create_clock -period 10.000 -name pcie_sys_clk [get_ports pcie_sys_clk_p]

# AXI clock.
#create_generated_clock -name axi_clk [get_pins -hierarchical -filter {NAME =~ "infra/dma/xdma/*/phy_clk_i/bufg_gt_userclk/O"}]

# Decouple the PCIe reset.
set_false_path -from [get_ports pcie_sys_rst_n] -to [all_registers -clock pcie_sys_clk]