Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
(unused) 0   MC1     (b)  
MCLK 2  2_1 2_2 MC2 LOW 19 I/O O
(unused) 0   MC3     (b)  
(unused) 0   MC4     (b)  
(unused) 0   MC5   20 I/O  
(unused) 0   MC6     (b)  
(unused) 0   MC7     (b)  
(unused) 0   MC8   21 I/O  
(unused) 0   MC9     (b)  
(unused) 0   MC10     (b)  
(unused) 0   MC11   22 I/O  
(unused) 0   MC12     (b)  
(unused) 0   MC13     (b)  
(unused) 0   MC14   23 I/O  
clkdv<0> 0   MC15 LOW 27 I/O (b)
was_done 2  16_1 16_2 MC16 LOW   (b) (b)
clkdv<2> 3  17_1 17_2 17_3 MC17 LOW 28 I/O (b)
cntr<1> 6  17_4 18_1 18_2 18_3 18_4 18_5 MC18 LOW   (b) (b)

Signals Used By Logic in Function Block
  1. DONE
  2. FPGA_ctrl<1>
  3. FPGA_ctrl<4>
  4. FPGA_ctrl<2>
  5. MS_n
  6. clkdv<0>
  7. clkdv<2>
  8. cntr<0>
  9. cntr<22>
  10. cntr<23>
  11. cntr<24>
  12. cntr<25>
  13. en_CCLK
  14. was_done