Lane 0 is the lowest byte(sent first)
minimum IFG at receiving RS is 5 bytes(stop,idle..., start)
start should always be at lane 0
if stop is at lane0, 1 or 2, following lanes are filled with idle

Lane0	Lane1	Lane2	Lane3
start	0x55	0x55	0x55
0x55	0x55	0x55	0xd5(SFD)

Control character

IDLE	0x07
START	0xFB (always in lane0)
STOP	0xFD
ERROR	0xFE
sequence 0X9C

RS TX diagrams fig.46-5, fig.46-6 on page 256
RS RX diagram fig.46-7 on page 258
RS RX diagram fig.46-8 on page 259

46.3.3 describes error and fault handling
46.3.4 describes Link Fault Signalling

link faults

lane0	lane1	lane2	lane3
sequnce	0x00	0x00	0x01	local fault
sequnce	0x00	0x00	0x02	remote fault

link fault state diagram at 46.3.4.3

PCS Tx state machine fig.49-14 on page 339
PCS Rx state machine fig.49-15 on page 340

64B/66B block format table Fir.49-7 on page 326