REM
REM   ____  ____
REM  /   /\/   /
REM /___/  \  /    Vendor: Xilinx
REM \   \   \/     Version : 1.12
REM  \   \         Application : Virtex-6 FPGA GTX Transceiver Wizard
REM  /   /         Filename : implement_synplify_bat.ejava
REM /___/   /\     
REM \   \  /  \
REM  \___\/\___\
REM
REM
REM implement_synplify.bat script
REM Generated by Xilinx Virtex-6 FPGA GTX Transceiver Wizard
REM
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REM Set XST as default synthesizer

REM Read command line arguments

REM Change CWD to results

REM Clean results directory
REM Create results directory
REM Change current directory to results
ECHO WARNING: Removing existing results directory
RMDIR /S /Q results
MKDIR results
COPY synplify.prj   .\results\
COPY *.ngc          .\results\

REM Run Synthesis

ECHO "### Running Synplify Pro - "
synplify_pro -batch synplify.prj

COPY HTR_top.edf .\results
cd .\results

REM Run ngdbuild

ngdbuild -uc ..\..\example_design\HTR_top.ucf -p xc6vlx130t-ff1156-1 HTR_top.edf HTR_top.ngd

REM end run ngdbuild section

REM Run map

ECHO 'Running NGD'
map -p xc6vlx130t-ff1156-1 -o mapped.ncd HTR_top.ngd

REM Run par

ECHO 'Running par'
par mapped.ncd routed.ncd 

REM Report par results

ECHO 'Running design through bitgen'
bitgen -w routed.ncd

REM Trace Report

ECHO 'Running trce'
trce -e 10 routed.ncd mapped.pcf -o routed

REM Run netgen

ECHO 'Running netgen to create gate level VHDL model'
netgen -ofmt vhdl -sim -dir . -tm HTR_top -w routed.ncd routed.vhd

REM Change directory to implement

CD ..