description=User generated protocol
rx_line_rate=2.5
use_rx_oversampling=false
rx_divider=/1
rx_datapath_width=20
decoding=8B/10B
rx_reference_clock=250.00
tx_line_rate=2.5
use_tx_oversampling=false
tx_divider=/1
tx_datapath_width=20
encoding=8B/10B
tx_reference_clock=250.00
use_port_rxoversampleerr=false
use_port_drp=false
ppm_offset=0_(Synchronous)
use_port_txbypass8b10b=false
use_port_txchardispmode=false
use_port_txchardispval=false
use_port_txkerr=false
use_port_txrundisp=false
use_port_rxchariscomma=true
use_port_rxcharisk=true
use_port_rxrundisp=false
use_txbuffer=true
use_rxbuffer=true
txusrclk_source=TXOUTCLK
use_external_txusrclk=false
rxusrclk_source=TXOUTCLK
use_external_rxusrclk=false
use_port_txoutclk=true
use_port_txreset=false
use_port_txbufstatus=false
use_port_rxreset=false
use_port_rxrecclk=false
use_port_rxbufstatus=false
use_port_rxbufreset=false
use_comma_detect=true
dec_valid_comma_only=true
comma_preset=K28.5
plus_comma=0101111100
minus_comma=1010000011
comma_mask=1111111111
comma_double=false
comma_alignment=Even_Byte_Boundaries
use_port_enpcommaalign=true
use_port_enmcommaalign=true
use_port_rxslide=false
use_port_rxbyteisaligned=false
use_port_rxbyterealign=false
use_port_rxcommadet=false
preemphasis_level=Use_TXPREEMPHASIS_Port
driver_swing=Use_TXDIFFCTRL_Port
wideband_highpass_mix=Use_RXEQMIX_Port
enable_dfe=false
dfe_mode=Fixed_tap_mode
disable_ac_coupling=false
rx_termination_voltage=MGTAVTT
postemphasis_level=Use_TXPOSTEMPHASIS_Port
use_port_txpolarity=true
use_port_txinhibit=false
use_port_rxpolarity=true
use_port_rxcdrreset=true
pci_express_mode=false
com_burst_val=15
sata_burst_val=4
sata_idle_val=4
trans_time_to_p2=100
trans_time_from_p2=60
trans_time_non_p2=25
use_port_loopback=true
use_port_rxpowerdown=false
use_port_rxstatus=false
use_port_rxvalid=false
use_port_cominitdet=false
use_port_comsasdet=false
use_port_comwakedet=false
use_port_txcominit=false
use_port_txcomsas=false
use_port_txcomwake=false
use_port_comfinish=false
use_port_txpowerdown=false
use_port_txdetectrx=false
use_port_txelecidle=false
use_port_phystatus=false
use_rx_oob=false
rx_oob_threshold=011
use_prbs_detector=false
use_port_txenprbstst=false
use_port_txprbsforceerr=false
use_port_rxlossofsync=true
rxlossofsyncport=true
errors_to_lose_sync=128
bytes_to_reduce_error=8
use_cb=false
cb_sequence_length=1
cb_sequence_1_max_skew=1
use_two_cb_sequences=false
cb_sequence_2_max_skew=1
cb_seq_1_1_mask=true
cb_seq_1_1=00000000
cb_seq_1_1_k=false
cb_seq_1_1_disp=false
cb_seq_1_2_mask=true
cb_seq_1_2=00000000
cb_seq_1_2_k=false
cb_seq_1_2_disp=false
cb_seq_1_3_mask=true
cb_seq_1_3=00000000
cb_seq_1_3_k=false
cb_seq_1_3_disp=false
cb_seq_1_4_mask=true
cb_seq_1_4=00000000
cb_seq_1_4_k=false
cb_seq_1_4_disp=false
cb_seq_2_1_mask=true
cb_seq_2_1=00000000
cb_seq_2_1_k=false
cb_seq_2_1_disp=false
cb_seq_2_2_mask=true
cb_seq_2_2=00000000
cb_seq_2_2_k=false
cb_seq_2_2_disp=false
cb_seq_2_3_mask=true
cb_seq_2_3=00000000
cb_seq_2_3_k=false
cb_seq_2_3_disp=false
cb_seq_2_4_mask=true
cb_seq_2_4=00000000
cb_seq_2_4_k=false
cb_seq_2_4_disp=false
use_cc=true
cc_sequence_length=2
fifo_upper_bounds=18
fifo_lower_bounds=14
use_two_cc_sequences=false
cc_seq_1_1_mask=false
cc_seq_1_1=11111011
cc_seq_1_1_k=true
cc_seq_1_1_disp=false
cc_seq_1_2_mask=false
cc_seq_1_2=11011100
cc_seq_1_2_k=true
cc_seq_1_2_disp=false
cc_seq_1_3_mask=true
cc_seq_1_3=00000000
cc_seq_1_3_k=true
cc_seq_1_3_disp=false
cc_seq_1_4_mask=true
cc_seq_1_4=00000000
cc_seq_1_4_k=true
cc_seq_1_4_disp=false
cc_seq_2_1_mask=true
cc_seq_2_1=00000000
cc_seq_2_1_k=true
cc_seq_2_1_disp=false
cc_seq_2_2_mask=true
cc_seq_2_2=00000000
cc_seq_2_2_k=true
cc_seq_2_2_disp=false
cc_seq_2_3_mask=true
cc_seq_2_3=00000000
cc_seq_2_3_k=true
cc_seq_2_3_disp=false
cc_seq_2_4_mask=true
cc_seq_2_4=00000000
cc_seq_2_4_k=true
cc_seq_2_4_disp=false
txoutclk_source=AUTO
rxrecclk_source=AUTO
dec_mcomma_detect=true
dec_pcomma_detect=true
mcomma_detect=true
pcomma_detect=true
use_rx_eq=false
use_turbo_mode=false
highpass_pole_location=Use_RXEQPOLE_Port
use_resistor_cal_circuit=false
second_order_cdr_loop=false
oob_clk_divider=0000000
pll_sata=false
rx_decode_seq_match=true
rx_slide_mode=OFF
termination_ctrl=00000
termination_imp=50
termination_ovrd=false
txrx_invert=00011
use_port_plllkdet=true
use_port_plllkdeten=true
use_port_pllpowerdown=false
use_port_refclkpowerdown=false
cdr_ph_adj_time=10100
rx_en_idle_reset_fr=false
rx_en_idle_hold_cdr=false
rx_en_idle_reset_ph=false
rx_en_idle_hold_dfe=true
en_idle_reset_buf=false
rx_idle_hi_cnt=1000
rx_idle_lo_cnt=0000
rxrundisp_indicates_cc=false
max_cb_level=7
cc_keep_one_idle=false
clk_cor_precedence=CC
clk_cor_repeat_wait=0
txpll_sata=00
tx_en_rate_reset_buf=true
tx_drive_mode=DIRECT
show_realign_comma=true
rx_en_mode_reset_buf=true
rx_en_rate_reset_buf=true
rx_en_realign_reset_buf=false
rx_fifo_addr_mode=FULL
chan_bond_seq_2_cfg=00000
sas_max_comsas=52
sas_min_comsas=40
trans_time_rate=FF
chan_bond_keep_align=false
tx_tdcc_cfg=11
tx_idle_assert_delay=100
tx_idle_deassert_delay=010