June 3, 2014 T2v0x22
added register 0x10, DNA readout missing bit 56 fixed.

spartan chip memory map:

0x0	reads:
	bit 23-16	SN number
	bit 15-0	T2 firmware version
	write: bit 0	general reset
	write: bit 4	start V6 reconfiguration
	write: bit 8	start both S6 and V6 reconfiguration
0x1	read/write
	read 	bit 0	FLASH busy
	write	sends data stored in FLASH wbuf to FLASH memory chip
		bit 8-0 specifies number of (clocks/8 -1) to be sent to the FLASH memory
		(depends on the type of the FLASH command and number of bytes to be
		 read or written)
0x2	read only (reads back what was written to V6 chip 0x3)
	bit 11-0 enables TTC clock and data to AMC modules
0x3	read only
	bit 31		if '1', virtex chip INIT_B is low
	bit 30		if '1', virtex chip DONE is low
	bit 23-0	configuration data CRC
0x4	bit 15-0 TTC event number register
0x5	bit 11-0 TTC L1 Bcnt register
0x6	bit 31-0 TTC L1 orbit count register
0x7	bit 7-0   TTC Bcnt error counter
0x8	bit 7-0  TTC single bit error counter
0x9	bit 7-0 TTC multi-bit error counter
0xa	bit 7-0 T2 Serial Number
0xd	read/write
	bit 11-0 enables TTC clock and data to AMC modules
	bit 30 if set, TTC clock source comes from T3
0xe	read only
	bit 31-0	FPGA DNA bits 31-0

0xf	read only
	bit 31-25	always reads 0
	bit 24-0	FPGA DNA bits 56-32
0x10	read/write 32 bit register

0x1000 thru 0x107f	read/write	FLASH write buffer
	always write FLASH command(including FLASH address if any) to address 0x1000
	for page write command, attach the write data starting at address 0x1001
	you can read back what you have writen to the write buffer.
0x1080 thru 0x10ff read only	FLASH read buffer
	you read whatever data are returned from the FLASH memory here