Release 14.7 Physical Synthesis Report P.20131013 (lin64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.

TABLE OF CONTENTS
  1) Physical Synthesis Options Summary
  2) Optimizations statistics and details


=========================================================================
*                 Physical Synthesis Options Summary                    *
=========================================================================
---- Options
Global Optimization                 : OFF
    Retiming                        : OFF
    Equivalent Register Removal     : OFF
Timing-Driven Packing and Placement : ON
    Logic Optimization              : ON
    Register Duplication            : ON

---- Intelligent clock gating       : OFF

---- Target Parameters
Target Device                       : 6slx45tfgg484-2

=========================================================================


=========================================================================
*                        Optimizations                                  *
=========================================================================
---- Statistics
No sequential optimizations have been performed.

   Flops added for Enable Generation                       
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