Release 14.7 Map P.20131013 (lin64) Xilinx Mapping Report File for Design 'AMC13_T2' Design Information ------------------ Command Line : map -intstyle ise -p xc6slx45t-fgg484-2 -w -logic_opt on -ol high -xe n -t 1 -xt 0 -register_duplication on -r 4 -global_opt off -mt 2 -detail -ir off -ignore_keep_hierarchy -pr b -lc off -power off -o AMC13_T2_map.ncd AMC13_T2.ngd AMC13_T2.pcf Target Device : xc6slx45t Target Package : fgg484 Target Speed : -2 Mapper Version : spartan6 -- $Revision: 1.55 $ Mapped Date : Fri Dec 4 10:37:26 2020 Design Summary -------------- Number of errors: 0 Number of warnings: 8 Slice Logic Utilization: Number of Slice Registers: 6,154 out of 54,576 11% Number used as Flip Flops: 6,150 Number used as Latches: 4 Number used as Latch-thrus: 0 Number used as AND/OR logics: 0 Number of Slice LUTs: 5,346 out of 27,288 19% Number used as logic: 4,818 out of 27,288 17% Number using O6 output only: 2,957 Number using O5 output only: 524 Number using O5 and O6: 1,337 Number used as ROM: 0 Number used as Memory: 167 out of 6,408 2% Number used as Dual Port RAM: 18 Number using O6 output only: 2 Number using O5 output only: 0 Number using O5 and O6: 16 Number used as Single Port RAM: 0 Number used as Shift Register: 149 Number using O6 output only: 141 Number using O5 output only: 0 Number using O5 and O6: 8 Number used exclusively as route-thrus: 361 Number with same-slice register load: 320 Number with same-slice carry load: 41 Number with other load: 0 Slice Logic Distribution: Number of occupied Slices: 2,064 out of 6,822 30% Number of MUXCYs used: 1,000 out of 13,644 7% Number of LUT Flip Flop pairs used: 6,508 Number with an unused Flip Flop: 1,428 out of 6,508 21% Number with an unused LUT: 1,162 out of 6,508 17% Number of fully used LUT-FF pairs: 3,918 out of 6,508 60% Number of unique control sets: 212 Number of slice register sites lost to control set restrictions: 535 out of 54,576 1% A LUT Flip Flop pair for this architecture represents one LUT paired with one Flip Flop within a slice. A control set is a unique combination of clock, reset, set, and enable signals for a registered element. The Slice Logic Distribution report is not meaningful if the design is over-mapped for a non-slice resource or if Placement fails. IO Utilization: Number of bonded IOBs: 113 out of 296 38% Number of LOCed IOBs: 83 out of 113 73% IOB Flip Flops: 32 IOB Master Pads: 13 IOB Slave Pads: 13 Number of bonded IPADs: 6 out of 16 37% Number of LOCed IPADs: 6 out of 6 100% Number of bonded OPADs: 4 out of 8 50% Number of LOCed OPADs: 4 out of 4 100% Specific Feature Utilization: Number of RAMB16BWERs: 41 out of 116 35% Number of RAMB8BWERs: 1 out of 232 1% Number of BUFIO2/BUFIO2_2CLKs: 6 out of 32 18% Number used as BUFIO2s: 6 Number used as BUFIO2_2CLKs: 0 Number of BUFIO2FB/BUFIO2FB_2CLKs: 5 out of 32 15% Number used as BUFIO2FBs: 5 Number used as BUFIO2FB_2CLKs: 0 Number of BUFG/BUFGMUXs: 14 out of 16 87% Number used as BUFGs: 12 Number used as BUFGMUX: 2 Number of DCM/DCM_CLKGENs: 5 out of 8 62% Number used as DCMs: 5 Number used as DCM_CLKGENs: 0 Number of ILOGIC2/ISERDES2s: 4 out of 376 1% Number used as ILOGIC2s: 4 Number used as ISERDES2s: 0 Number of IODELAY2/IODRP2/IODRP2_MCBs: 0 out of 376 0% Number of OLOGIC2/OSERDES2s: 16 out of 376 4% Number used as OLOGIC2s: 16 Number used as OSERDES2s: 0 Number of BSCANs: 0 out of 4 0% Number of BUFHs: 0 out of 256 0% Number of BUFPLLs: 0 out of 8 0% Number of BUFPLL_MCBs: 0 out of 4 0% Number of DSP48A1s: 0 out of 58 0% Number of GTPA1_DUALs: 1 out of 2 50% Number of ICAPs: 1 out of 1 100% Number of MCBs: 0 out of 2 0% Number of PCIE_A1s: 0 out of 1 0% Number of PCILOGICSEs: 0 out of 2 0% Number of PLL_ADVs: 1 out of 4 25% Number of PMVs: 0 out of 1 0% Number of STARTUPs: 0 out of 1 0% Number of SUSPEND_SYNCs: 0 out of 1 0% Number of RPM macros: 1 Average Fanout of Non-Clock Nets: 3.09 Peak Memory Usage: 1097 MB Total REAL time to MAP completion: 10 mins 11 secs Total CPU time to MAP completion (all processors): 9 mins 56 secs Table of Contents ----------------- Section 1 - Errors Section 2 - Warnings Section 3 - Informational Section 4 - Removed Logic Summary Section 5 - Removed Logic Section 6 - IOB Properties Section 7 - RPMs Section 8 - Guide Report Section 9 - Area Group and Partition Summary Section 10 - Timing Report Section 11 - Configuration String Information Section 12 - Control Set Information Section 13 - Utilization by Hierarchy Section 1 - Errors ------------------ Section 2 - Warnings -------------------- WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases. WARNING:MapLib:53 - The offset specification "OFFSET=OUT 10000 pS AFTER ipb_clk" has been discarded because the referenced clock pad net (ipb_clk) was optimized away. WARNING:PhysDesignRules:372 - Gated clock. Clock net GbEGTPreset is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop. WARNING:PhysDesignRules:372 - Gated clock. Clock net sysclk_dcm_locked_inv is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop. WARNING:PhysDesignRules:372 - Gated clock. Clock net sysclk_dcm_locked_reprogV6_OR_106_o is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop. WARNING:PhysDesignRules:372 - Gated clock. Clock net TTC_lock_inv is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop. WARNING:PhysDesignRules:781 - PULLUP on an active net. PULLUP of comp FLASH_S_PULLUP is set but the tri state is not configured. WARNING:PhysDesignRules:781 - PULLDOWN on an active net. PULLDOWN of comp FLASH_C_PULLDOWN is set but the tri state is not configured. WARNING:PhysDesignRules:2410 - This design is using one or more 9K Block RAMs (RAMB8BWER). 9K Block RAM initialization data, both user defined and default, may be incorrect and should not be used. For more information, please reference Xilinx Answer Record 39999. Section 3 - Informational ------------------------- INFO:Map:284 - Map is running with the multi-threading option on. Map currently supports the use of up to 2 processors. Based on the the user options and machine load, Map will use 2 processors during this run. INFO:Security:54 - 'xc6slx45t' is a WebPack part. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<31> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<30> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<29> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<28> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<27> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<26> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<25> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<24> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<23> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<22> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<21> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<20> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<19> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<18> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<17> has no load. INFO:LIT:243 - Logical network ipb_master_out_ipb_addr<16> has no load. INFO:LIT:243 - Logical network GPLED_B<3>_IBUF has no load. INFO:LIT:243 - Logical network GPLED_B<2>_IBUF has no load. INFO:LIT:243 - Logical network GPLED_B<1>_IBUF has no load. INFO:LIT:243 - Logical network GPLED_B<0>_IBUF has no load. INFO:LIT:243 - Logical network g_FSIO_CS_B[2].i_FSIO_CS_B/O has no load. INFO:LIT:243 - Logical network g_FSIO_CS_B[3].i_FSIO_CS_B/O has no load. INFO:LIT:243 - Logical network i_GTP_if/LINKrxchariscomma<1> has no load. INFO:LIT:243 - Logical network i_GTP_if/LINKpllLock has no load. INFO:LIT:243 - Logical network i_GTP_if/GbEresetDone has no load. INFO:LIT:243 - Logical network i_GTP_if/GbErxrundisp has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_RXDISPERR0_OUT<1> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_RXDISPERR0_OUT<0> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_RXBUFSTATUS1_OUT<1> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_RXBUFSTATUS1_OUT<0> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_GTPCLKOUT0_OUT<1> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_GTPCLKOUT0_OUT<0> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_GTPCLKOUT1_OUT<1> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_TXBUFSTATUS1_OUT<0> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_REFCLKOUT1_OUT has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_RESETDONE0_OUT has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_RXBYTEREALIGN0_OUT has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_RXCOMMADET0_OUT has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_RXRECCLK1_OUT has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_TXOUTCLK0_OUT has no load. INFO:LIT:243 - Logical network i_GTP_if/i_S6Link_GbE/TILE0_TXOUTCLK1_OUT has no load. INFO:LIT:243 - Logical network i_GTP_if/i_GbE_pcs_pma/status_vector<6> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_GbE_pcs_pma/status_vector<5> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_GbE_pcs_pma/status_vector<3> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_GbE_pcs_pma/status_vector<2> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_GbE_pcs_pma/status_vector<0> has no load. INFO:LIT:243 - Logical network i_GTP_if/i_GbE_pcs_pma/N0 has no load. INFO:LIT:243 - Logical network i_flash/i_rbuf/DOA<0> has no load. INFO:LIT:243 - Logical network i_ipbus/mac_tx_error has no load. INFO:LIT:243 - Logical network i_ipbus/trans_out_raddr<11> has no load. INFO:LIT:243 - Logical network i_ipbus/trans_out_raddr<10> has no load. INFO:LIT:243 - Logical network i_ipbus/trans_out_raddr<9> has no load. INFO:LIT:243 - Logical network i_ipbus/trans_out_waddr<11> has no load. INFO:LIT:243 - Logical network i_ipbus/trans_out_waddr<10> has no load. INFO:LIT:243 - Logical network i_ipbus/trans_out_waddr<9> has no load. INFO:LIT:243 - Logical network i_ipbus/ipb_req has no load. INFO:LIT:243 - Logical network i_ipbus/pkt_rx has no load. INFO:LIT:243 - Logical network i_ipbus/pkt_rx_led has no load. INFO:LIT:243 - Logical network i_ipbus/pkt_tx_led has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_addr<12> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_addr<11> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_addr<10> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_addr<9> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_addr<8> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_addr<7> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_addr<6> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<12> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<11> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<10> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<9> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<8> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<7> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<6> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<4> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<2> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/arp_end_addr<1> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_addr<12> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_addr<11> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_addr<10> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_addr<9> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_addr<8> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_addr<7> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<12> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<11> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<10> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<9> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<8> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<7> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<4> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<2> has no load. INFO:LIT:243 - Logical network i_ipbus/udp_if/status_end_addr<1> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<95> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<94> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<93> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<92> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<91> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<90> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<89> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<88> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<87> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<86> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<85> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<84> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<83> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<82> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<31> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<30> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<29> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<28> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<27> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<26> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<25> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<24> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<23> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<22> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<21> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<20> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<19> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<18> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<17> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<16> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<15> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<14> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<13> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<12> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<11> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<10> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<9> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<8> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<7> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<6> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<5> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<4> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<3> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<2> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<1> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_in<0> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<127> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<126> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<125> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<124> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<123> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<122> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<121> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<120> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<119> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<118> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<117> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<116> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<115> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<114> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<113> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<112> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<111> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<110> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<109> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<108> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<107> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<106> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<105> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<104> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<103> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<102> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<101> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<100> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<99> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<98> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<97> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<96> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<95> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<94> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<93> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<92> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<91> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<90> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<89> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<88> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<87> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<86> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<85> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<84> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<83> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<82> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<80> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<79> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<78> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<77> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<76> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<75> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<74> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<73> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<72> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<71> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<70> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<69> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<68> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<67> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<66> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<65> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<64> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<63> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<62> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<61> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<60> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<59> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<58> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<57> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<56> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<55> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<54> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<53> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<52> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<51> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<50> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<49> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<48> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<47> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<46> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<45> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<44> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<43> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<42> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<41> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<40> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<39> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<38> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<37> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<36> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<35> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<34> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<33> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<32> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<31> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<30> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<29> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<28> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<27> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<26> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<25> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<24> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<23> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<22> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<21> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<20> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<19> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<18> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<17> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<16> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<15> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<14> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<13> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<12> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<11> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<10> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<9> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<8> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<7> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<6> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<5> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<4> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<3> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<2> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<1> has no load. INFO:LIT:243 - Logical network i_ipbus/trans/cfg_vector_out<0> has no load. INFO:LIT:243 - Logical network i_ipbus/stretch_tx/clkdiv/reset_gen/Q has no load. INFO:LIT:243 - Logical network i_ipbus/stretch_rx/clkdiv/reset_gen/Q has no load. INFO:LIT:243 - Logical network i_buffer/DOA<31> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<30> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<29> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<28> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<27> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<26> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<25> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<24> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<23> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<22> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<21> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<20> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<19> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<18> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<17> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<16> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<15> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<14> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<13> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<12> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<11> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<10> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<9> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<8> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<7> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<6> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<5> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<4> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<3> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<2> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<1> has no load. INFO:LIT:243 - Logical network i_buffer/DOA<0> has no load. INFO:LIT:243 - Logical network i_buffer/DOB<15> has no load. INFO:LIT:243 - Logical network i_buffer/DOB<14> has no load. INFO:LIT:243 - Logical network i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr /gwss.wsts/ram_full_i has no load. INFO:MapLib:562 - No environment variables are currently set. INFO:MapLib:159 - Net Timing constraints on signal T3_TCDS_aux1 are pushed forward through input buffer. INFO:MapLib:159 - Net Timing constraints on signal T3_TCDS_aux2 are pushed forward through input buffer. INFO:MapLib:825 - RAM32X1D symbol "g_cmd_list[0].i_cmd_list" (output signal=cmd_list_SP<0>) INITSTATE has been changed from 00000001 to 00010001 because pin A4 is driven by GND. This pin has been connected to VCC instead, in order to relieve routing congestion. INFO:MapLib:825 - RAM32X1D symbol "g_cmd_list[10].i_cmd_list" (output signal=cmd_list_SP<10>) INITSTATE has been changed from 00000001 to 00010001 because pin A4 is driven by GND. This pin has been connected to VCC instead, in order to relieve routing congestion. INFO:MapLib:825 - RAM32X1D symbol "g_cmd_list[12].i_cmd_list" (output signal=cmd_list_SP<12>) INITSTATE has been changed from 00000001 to 00010001 because pin A4 is driven by GND. This pin has been connected to VCC instead, in order to relieve routing congestion. INFO:MapLib:825 - RAM32X1D symbol "g_cmd_list[16].i_cmd_list" (output signal=cmd_list_SP<16>) INITSTATE has been changed from 00000001 to 00010001 because pin A4 is driven by GND. This pin has been connected to VCC instead, in order to relieve routing congestion. INFO:LIT:244 - All of the single ended outputs in this design are using slew rate limited output drivers. The delay on speed critical single ended outputs can be dramatically reduced by designating them as fast outputs. INFO:Pack:1716 - Initializing temperature to 85.000 Celsius. (default - Range: 0.000 to 85.000 Celsius) INFO:Pack:1720 - Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.260 Volts) INFO:Map:215 - The Interim Design Summary has been generated in the MAP Report (.mrp). INFO:Pack:1650 - Map created a placed design. INFO:PhysDesignRules:1861 - To achieve optimal frequency synthesis performance with the CLKFX and CLKFX180 outputs of the DCM comp i_sysclk_dcm, consult the device Data Sheet. Section 4 - Removed Logic Summary --------------------------------- 48 block(s) removed 88 block(s) optimized away 104 signal(s) removed 634 Block(s) redundant Section 5 - Removed Logic ------------------------- The trimmed logic report below shows the logic removed from your design due to sourceless or loadless signals, and VCC or ground connections. If the removal of a signal or symbol results in the subsequent removal of an additional signal or symbol, the message explaining that second removal will be indented. This indentation will be repeated as a chain of related logic is removed. To quickly locate the original cause for the removal of a chain of logic, look above the place where that logic is listed in the trimming report, then locate the lines that are least indented (begin at the leftmost edge). The signal "g_FSIO_CS_B[2].i_FSIO_CS_B/O" is sourceless and has been removed. The signal "g_FSIO_CS_B[3].i_FSIO_CS_B/O" is sourceless and has been removed. The signal "i_GTP_if/LINKrxchariscomma<1>" is sourceless and has been removed. The signal "i_GTP_if/GbErxclkcorcnt<2>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXCLKCORCNT[2]_GND_13_o_mux_20_OUT31" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT[2]_GND_13_o_mux_20_OUT<2>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT_INT_2" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT_INT<2>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_HDR_REMOVED_REG_rstpot" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_HDR_REMOVED_REG_rstpot" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_HDR_REMOVED_REG" (FF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_HDR_REMOVED_REG" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/SYNC_STATUS_C_REG1_AND_124_o" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/SYNC_STATUS_C_REG1_AND_124_o" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_INT" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_INT" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG_0" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG<0>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG_1" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG<1>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG_2" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG<2>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG_3" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG<3>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG[0]_RX_CONFIG_VALID_R EG[3]_OR_111_o<0>1" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_CONFIG_VALID_REG[0]_RX_CONFIG_VALID_R EG[3]_OR_111_o" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RUDI_C" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/status_vector<2>" is sourceless and has been removed. The signal "i_GTP_if/GbErxclkcorcnt<1>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXCLKCORCNT[2]_GND_13_o_mux_20_OUT21" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT[2]_GND_13_o_mux_20_OUT<1>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT_INT_1" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT_INT<1>" is sourceless and has been removed. The signal "i_GTP_if/GbErxclkcorcnt<0>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXCLKCORCNT[2]_GND_13_o_mux_20_OUT11" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT[2]_GND_13_o_mux_20_OUT<0>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT_INT_0" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXCLKCORCNT_INT<0>" is sourceless and has been removed. The signal "i_GTP_if/LINKpllLock" is sourceless and has been removed. The signal "i_GTP_if/GbEresetDone" is sourceless and has been removed. The signal "i_GTP_if/GbErxrundisp" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_RXDISPERR0_OUT<1>" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_RXDISPERR0_OUT<0>" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_RXBUFSTATUS1_OUT<1>" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_RXBUFSTATUS1_OUT<0>" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_GTPCLKOUT0_OUT<1>" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_GTPCLKOUT0_OUT<0>" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_GTPCLKOUT1_OUT<1>" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_TXBUFSTATUS1_OUT<0>" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_REFCLKOUT1_OUT" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_RESETDONE0_OUT" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_RXBYTEREALIGN0_OUT" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_RXCOMMADET0_OUT" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_RXRECCLK1_OUT" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_TXOUTCLK0_OUT" is sourceless and has been removed. The signal "i_GTP_if/i_S6Link_GbE/TILE0_TXOUTCLK1_OUT" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/status_vector<6>" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/status_vector<5>" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/status_vector<4>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_INVALID_glue_set" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_INVALID_glue_set" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RX_INVALID" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/status_vector<3>" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/status_vector<0>" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/N0" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXNOTINTABLE_SRL" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXNOTINTABLE_REG" (FF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXDISPERR_SRL" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RXDISPERR_REG" (FF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_REG2" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_REG3" (FF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_REG3" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_REG1_C_REG3_OR_59_o" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_REG1_C_REG3_OR_59_o" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/FROM_RX_CX" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/FROM_RX_CX" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_REG1_C_REG3_OR_59_o_SW0" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/N26" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/IDLE_REG<1>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/IDLE_REG_2" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/IDLE_REG<2>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/IDLE_REG[1]_IDLE_REG[2]_OR_112_o1" (ROM) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/IDLE_REG[1]_IDLE_REG[2]_OR_112_o" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RUDI_I" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/IDLE_REG<0>" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/IDLE_REG_1" (SFF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/N28" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mshreg_STATUS_VECTOR_0" is sourceless and has been removed. Sourceless block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/STATUS_VECTOR_0" (FF) removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/DELAY_RXNOTINTABLE/CE" is sourceless and has been removed. The signal "i_GTP_if/i_GbE_pcs_pma/BU2/U0/DELAY_RXDISPERR/CE" is sourceless and has been removed. The signal "i_flash/i_rbuf/DOA<0>" is sourceless and has been removed. The signal "i_ipbus/stretch_tx/clkdiv/N0" is sourceless and has been removed. The signal "i_ipbus/stretch_tx/clkdiv/reset_gen/Q" is sourceless and has been removed. The signal "i_ipbus/stretch_tx/clkdiv/reset_gen/CE" is sourceless and has been removed. The signal "i_ipbus/stretch_rx/clkdiv/N0" is sourceless and has been removed. The signal "i_ipbus/stretch_rx/clkdiv/reset_gen/Q" is sourceless and has been removed. The signal "i_ipbus/stretch_rx/clkdiv/reset_gen/CE" is sourceless and has been removed. The signal "i_buffer/DOA<31>" is sourceless and has been removed. The signal "i_buffer/DOA<30>" is sourceless and has been removed. The signal "i_buffer/DOA<29>" is sourceless and has been removed. The signal "i_buffer/DOA<28>" is sourceless and has been removed. The signal "i_buffer/DOA<27>" is sourceless and has been removed. The signal "i_buffer/DOA<26>" is sourceless and has been removed. The signal "i_buffer/DOA<25>" is sourceless and has been removed. The signal "i_buffer/DOA<24>" is sourceless and has been removed. The signal "i_buffer/DOA<23>" is sourceless and has been removed. The signal "i_buffer/DOA<22>" is sourceless and has been removed. The signal "i_buffer/DOA<21>" is sourceless and has been removed. The signal "i_buffer/DOA<20>" is sourceless and has been removed. The signal "i_buffer/DOA<19>" is sourceless and has been removed. The signal "i_buffer/DOA<18>" is sourceless and has been removed. The signal "i_buffer/DOA<17>" is sourceless and has been removed. The signal "i_buffer/DOA<16>" is sourceless and has been removed. The signal "i_buffer/DOA<15>" is sourceless and has been removed. The signal "i_buffer/DOA<14>" is sourceless and has been removed. The signal "i_buffer/DOA<13>" is sourceless and has been removed. The signal "i_buffer/DOA<12>" is sourceless and has been removed. The signal "i_buffer/DOA<11>" is sourceless and has been removed. The signal "i_buffer/DOA<10>" is sourceless and has been removed. The signal "i_buffer/DOA<9>" is sourceless and has been removed. The signal "i_buffer/DOA<8>" is sourceless and has been removed. The signal "i_buffer/DOA<7>" is sourceless and has been removed. The signal "i_buffer/DOA<6>" is sourceless and has been removed. The signal "i_buffer/DOA<5>" is sourceless and has been removed. The signal "i_buffer/DOA<4>" is sourceless and has been removed. The signal "i_buffer/DOA<3>" is sourceless and has been removed. The signal "i_buffer/DOA<2>" is sourceless and has been removed. The signal "i_buffer/DOA<1>" is sourceless and has been removed. The signal "i_buffer/DOA<0>" is sourceless and has been removed. The signal "i_buffer/DOB<15>" is sourceless and has been removed. The signal "i_buffer/DOB<14>" is sourceless and has been removed. The signal "i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr/g wss.wsts/ram_full_i" is sourceless and has been removed. Unused block "g_FSIO_CS_B[2].i_FSIO_CS_B/IBUF" (BUF) removed. Unused block "g_FSIO_CS_B[3].i_FSIO_CS_B/IBUF" (BUF) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/DELAY_RXDISPERR/SRL16E" (SRL16E) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/DELAY_RXDISPERR/VCC" (ONE) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/DELAY_RXNOTINTABLE/SRL16E" (SRL16E) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/DELAY_RXNOTINTABLE/VCC" (ONE) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mshreg_STATUS_VECTOR_0" (SRLC16E) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/C_REG2" (FF) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/IDLE_REG_0" (SFF) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/SYNC_STATUS_C_REG1_AND_124_o_SW0" (ROM) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/GND" (ZERO) removed. Unused block "i_GTP_if/i_GbE_pcs_pma/VCC" (ONE) removed. Unused block "i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr/g wss.wsts/ram_full_i" (FF) removed. Unused block "i_ipbus/stretch_rx/clkdiv/XST_VCC" (ONE) removed. Unused block "i_ipbus/stretch_rx/clkdiv/reset_gen/SRL16E" (SRL16E) removed. Unused block "i_ipbus/stretch_rx/clkdiv/reset_gen/VCC" (ONE) removed. Unused block "i_ipbus/stretch_tx/clkdiv/XST_VCC" (ONE) removed. Unused block "i_ipbus/stretch_tx/clkdiv/reset_gen/SRL16E" (SRL16E) removed. Unused block "i_ipbus/stretch_tx/clkdiv/reset_gen/VCC" (ONE) removed. Optimized Block(s): TYPE BLOCK GND XST_GND VCC XST_VCC GND g_trig_Twinmux[0].i_trig_data/XST_GND VCC g_trig_Twinmux[0].i_trig_data/XST_VCC GND g_trig_Twinmux[10].i_trig_data/XST_GND VCC g_trig_Twinmux[10].i_trig_data/XST_VCC GND g_trig_Twinmux[11].i_trig_data/XST_GND VCC g_trig_Twinmux[11].i_trig_data/XST_VCC GND g_trig_Twinmux[1].i_trig_data/XST_GND VCC g_trig_Twinmux[1].i_trig_data/XST_VCC GND g_trig_Twinmux[2].i_trig_data/XST_GND VCC g_trig_Twinmux[2].i_trig_data/XST_VCC GND g_trig_Twinmux[3].i_trig_data/XST_GND VCC g_trig_Twinmux[3].i_trig_data/XST_VCC GND g_trig_Twinmux[4].i_trig_data/XST_GND VCC g_trig_Twinmux[4].i_trig_data/XST_VCC GND g_trig_Twinmux[5].i_trig_data/XST_GND VCC g_trig_Twinmux[5].i_trig_data/XST_VCC GND g_trig_Twinmux[6].i_trig_data/XST_GND VCC g_trig_Twinmux[6].i_trig_data/XST_VCC GND g_trig_Twinmux[7].i_trig_data/XST_GND VCC g_trig_Twinmux[7].i_trig_data/XST_VCC GND g_trig_Twinmux[8].i_trig_data/XST_GND VCC g_trig_Twinmux[8].i_trig_data/XST_VCC GND g_trig_Twinmux[9].i_trig_data/XST_GND VCC g_trig_Twinmux[9].i_trig_data/XST_VCC GND i_GTP_if/XST_GND VCC i_GTP_if/XST_VCC GND i_GTP_if/i_GbE_pcs_pma/BU2/XST_GND VCC i_GTP_if/i_GbE_pcs_pma/BU2/XST_VCC GND i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/XST_GND VCC i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/XST_VCC GND i_GTP_if/i_mac/XST_GND VCC i_GTP_if/i_mac/XST_VCC GND i_LinkFIFO/XST_GND VCC i_LinkFIFO/XST_VCC GND i_SPI_if/XST_GND VCC i_SPI_if/XST_VCC GND i_TRIG0/XST_GND VCC i_TRIG0/XST_VCC GND i_TRIG1/XST_GND VCC i_TRIG1/XST_VCC GND i_TTC_history0/XST_GND VCC i_TTC_history0/XST_VCC GND i_TTC_history1/XST_GND VCC i_TTC_history1/XST_VCC GND i_TTC_history2/XST_GND VCC i_TTC_history2/XST_VCC GND i_buffer/XST_GND VCC i_buffer/XST_VCC GND i_flash/XST_GND VCC i_flash/XST_VCC GND i_flash/i_rbuf/XST_GND VCC i_flash/i_rbuf/XST_VCC GND i_flash/i_wbuf/XST_GND VCC i_flash/i_wbuf/XST_VCC VCC i_ipbus/XST_VCC GND i_ipbus/trans/iface/XST_GND VCC i_ipbus/trans/iface/XST_VCC GND i_ipbus/trans/sm/XST_GND VCC i_ipbus/trans/sm/XST_VCC VCC i_ipbus/udp_if/ARP/XST_VCC VCC i_ipbus/udp_if/IPADDR/XST_VCC GND i_ipbus/udp_if/RARP_block/XST_GND VCC i_ipbus/udp_if/RARP_block/XST_VCC GND i_ipbus/udp_if/internal_ram/XST_GND VCC i_ipbus/udp_if/internal_ram/XST_VCC GND i_ipbus/udp_if/ipbus_rx_ram/XST_GND VCC i_ipbus/udp_if/ipbus_rx_ram/XST_VCC GND i_ipbus/udp_if/ipbus_tx_ram/XST_GND VCC i_ipbus/udp_if/ipbus_tx_ram/XST_VCC GND i_ipbus/udp_if/payload/XST_GND VCC i_ipbus/udp_if/payload/XST_VCC GND i_ipbus/udp_if/ping/XST_GND VCC i_ipbus/udp_if/ping/XST_VCC GND i_ipbus/udp_if/rx_byte_sum/XST_GND VCC i_ipbus/udp_if/rx_packet_parser/XST_VCC VCC i_ipbus/udp_if/status/XST_VCC GND i_ipbus/udp_if/status_buffer/XST_GND VCC i_ipbus/udp_if/status_buffer/XST_VCC GND i_ipbus/udp_if/tx_byte_sum/XST_GND GND i_ipbus/udp_if/tx_main/XST_GND VCC i_ipbus/udp_if/tx_main/XST_VCC GND i_ipbus/udp_if/tx_transactor/XST_GND VCC i_ipbus/udp_if/tx_transactor/XST_VCC VCC i_reboot/XST_VCC GND i_twinmux/XST_GND VCC i_twinmux/XST_VCC Redundant Block(s): TYPE BLOCK INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<0>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<1>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03291_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03311_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03331_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<5>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<6>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<7>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03351_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03371_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03391_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03411_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03431_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<13>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03451_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03471_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<16>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<17>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03491_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<19>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<20>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<21>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03511_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<23>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03531_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<25>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<26>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<27>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<28>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/_n03551_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<30>1_INV_0 INV i_GTP_if/i_mac/i_tx_CRC32D8/crc<31>1_INV_0 LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<1>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<2>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<3>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<4>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<5>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<6>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<7>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<8>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_cy<9>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<1>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<2>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<3>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<4>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<5>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<6>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<7>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<8>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_cy<9>_rt LUT1 i_GTP_if/i_mac/Mcount_tx_byte_cnt_xor<10>_rt LUT1 i_GTP_if/i_mac/Mcount_rx_byte_cnt_xor<10>_rt INV i_GTP_if/i_mac/init_rx_crc1_INV_0 LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<1>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<2>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<3>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<4>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<5>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<6>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<7>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<8>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<9>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_cy<10>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<1>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<2>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<3>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<4>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<5>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<6>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<7>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<8>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<9>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_cy<10>_rt LUT1 i_flash/Madd_addra[11]_GND_110_o_add_5_OUT_xor<11>_rt LUT1 i_flash/Madd_addrap[11]_GND_110_o_add_8_OUT_xor<11>_rt INV i_TRIG1/Mxor_din_polarity_din_XOR_576_o_xo<0>1_INV_0 INV i_TRIG0/Mxor_din_polarity_din_XOR_576_o_xo<0>1_INV_0 LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<1>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<2>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<3>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<4>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<5>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<6>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<7>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<8>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<9>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<10>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<11>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<12>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<13>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<14>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<15>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<16>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<17>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<18>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<19>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<20>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<21>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_cy<22>_rt LUT1 i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_xor<23>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<1>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<2>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<3>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<4>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<5>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<6>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<7>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<8>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<9>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<10>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<11>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<12>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<13>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_cy<14>_rt LUT1 i_ipbus/udp_if/status_buffer/Madd_header_block.next_pkt_id_int[15]_GND_275_o_a dd_6_OUT_xor<15>_rt LUT1 i_ipbus/trans/sm/Mcount_timer_cy<1>_rt LUT1 i_ipbus/trans/sm/Mcount_timer_cy<2>_rt LUT1 i_ipbus/trans/sm/Mcount_timer_cy<3>_rt LUT1 i_ipbus/trans/sm/Mcount_timer_cy<4>_rt LUT1 i_ipbus/trans/sm/Mcount_timer_cy<5>_rt LUT1 i_ipbus/trans/sm/Mcount_timer_cy<6>_rt LUT1 i_ipbus/trans/sm/Mcount_words_done_cy<1>_rt LUT1 i_ipbus/trans/sm/Mcount_words_done_cy<2>_rt LUT1 i_ipbus/trans/sm/Mcount_words_done_cy<3>_rt LUT1 i_ipbus/trans/sm/Mcount_words_done_cy<4>_rt LUT1 i_ipbus/trans/sm/Mcount_words_done_cy<5>_rt LUT1 i_ipbus/trans/sm/Mcount_words_done_cy<6>_rt LUT1 i_ipbus/trans/sm/Mcount_timer_xor<7>_rt LUT1 i_ipbus/trans/sm/Mcount_words_done_xor<7>_rt LUT1 i_ipbus/trans/iface/Mcount_waddr_cy<1>_rt LUT1 i_ipbus/trans/iface/Mcount_waddr_cy<2>_rt LUT1 i_ipbus/trans/iface/Mcount_waddr_cy<3>_rt LUT1 i_ipbus/trans/iface/Mcount_waddr_cy<4>_rt LUT1 i_ipbus/trans/iface/Mcount_waddr_cy<5>_rt LUT1 i_ipbus/trans/iface/Mcount_waddr_cy<6>_rt LUT1 i_ipbus/trans/iface/Mcount_waddr_cy<7>_rt LUT1 i_ipbus/trans/iface/Mcount_raddr_cy<1>_rt LUT1 i_ipbus/trans/iface/Mcount_raddr_cy<2>_rt LUT1 i_ipbus/trans/iface/Mcount_raddr_cy<3>_rt LUT1 i_ipbus/trans/iface/Mcount_raddr_cy<4>_rt LUT1 i_ipbus/trans/iface/Mcount_raddr_cy<5>_rt LUT1 i_ipbus/trans/iface/Mcount_raddr_cy<6>_rt LUT1 i_ipbus/trans/iface/Mcount_raddr_cy<7>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<1>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<2>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<3>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<4>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<5>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<6>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<7>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<8>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<9>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<10>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<11>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<12>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<13>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_cy<14>_rt LUT1 i_ipbus/trans/iface/Mcount_waddr_xor<8>_rt LUT1 i_ipbus/trans/iface/Mcount_raddr_xor<8>_rt LUT1 i_ipbus/trans/iface/Mcount_wctr_xor<15>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<1>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<2>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<3>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<4>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<5>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<6>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<7>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<8>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<9>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<10>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<11>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<12>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<13>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_cy<14>_rt LUT1 i_SPI_if/Madd_addr[15]_GND_15_o_add_38_OUT_xor<15>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<1>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<2>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<3>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<4>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<5>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<6>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<7>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<8>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<9>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<10>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<11>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<12>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<13>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<14>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<15>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<16>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<17>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<18>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<19>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<20>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<21>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_cy<22>_rt LUT1 Mcount_TTC_cntr_cy<1>_rt LUT1 Mcount_TTC_cntr_cy<2>_rt LUT1 Mcount_TTC_cntr_cy<3>_rt LUT1 Mcount_TTC_cntr_cy<4>_rt LUT1 Mcount_TTC_cntr_cy<5>_rt LUT1 Mcount_TTC_cntr_cy<6>_rt LUT1 Mcount_TTC_cntr_cy<7>_rt LUT1 Mcount_TTC_cntr_cy<8>_rt LUT1 Mcount_TTC_cntr_cy<9>_rt LUT1 Mcount_TTC_cntr_cy<10>_rt LUT1 Mcount_TTC_cntr_cy<11>_rt LUT1 Mcount_TTC_cntr_cy<12>_rt LUT1 Mcount_TTC_cntr_cy<13>_rt LUT1 Mcount_TTC_cntr_cy<14>_rt LUT1 Mcount_TTC_cntr_cy<15>_rt LUT1 Mcount_TTC_cntr_cy<16>_rt LUT1 Mcount_TTC_cntr_cy<17>_rt LUT1 Mcount_TTC_cntr_cy<18>_rt LUT1 Mcount_Bcnt_cy<1>_rt LUT1 Mcount_Bcnt_cy<2>_rt LUT1 Mcount_Bcnt_cy<3>_rt LUT1 Mcount_Bcnt_cy<4>_rt LUT1 Mcount_Bcnt_cy<5>_rt LUT1 Mcount_Bcnt_cy<6>_rt LUT1 Mcount_Bcnt_cy<7>_rt LUT1 Mcount_Bcnt_cy<8>_rt LUT1 Mcount_Bcnt_cy<9>_rt LUT1 Mcount_Bcnt_cy<10>_rt LUT1 Mcount_DbErr_cnt_cy<1>_rt LUT1 Mcount_DbErr_cnt_cy<2>_rt LUT1 Mcount_DbErr_cnt_cy<3>_rt LUT1 Mcount_DbErr_cnt_cy<4>_rt LUT1 Mcount_DbErr_cnt_cy<5>_rt LUT1 Mcount_DbErr_cnt_cy<6>_rt LUT1 Mcount_BcntErr_cnt_cy<1>_rt LUT1 Mcount_BcntErr_cnt_cy<2>_rt LUT1 Mcount_BcntErr_cnt_cy<3>_rt LUT1 Mcount_BcntErr_cnt_cy<4>_rt LUT1 Mcount_BcntErr_cnt_cy<5>_rt LUT1 Mcount_BcntErr_cnt_cy<6>_rt LUT1 Mcount_SinErr_cnt_cy<1>_rt LUT1 Mcount_SinErr_cnt_cy<2>_rt LUT1 Mcount_SinErr_cnt_cy<3>_rt LUT1 Mcount_SinErr_cnt_cy<4>_rt LUT1 Mcount_SinErr_cnt_cy<5>_rt LUT1 Mcount_SinErr_cnt_cy<6>_rt LUT1 Mcount_TTCcmdCntr_1_cy<1>_rt LUT1 Mcount_TTCcmdCntr_1_cy<2>_rt LUT1 Mcount_TTCcmdCntr_1_cy<3>_rt LUT1 Mcount_TTCcmdCntr_1_cy<4>_rt LUT1 Mcount_TTCcmdCntr_1_cy<5>_rt LUT1 Mcount_TTCcmdCntr_1_cy<6>_rt LUT1 Mcount_TTCcmdCntr_1_cy<7>_rt LUT1 Mcount_TTCcmdCntr_1_cy<8>_rt LUT1 Mcount_TTCcmdCntr_1_cy<9>_rt LUT1 Mcount_TTCcmdCntr_1_cy<10>_rt LUT1 Mcount_TTCcmdCntr_1_cy<11>_rt LUT1 Mcount_TTCcmdCntr_1_cy<12>_rt LUT1 Mcount_TTCcmdCntr_1_cy<13>_rt LUT1 Mcount_TTCcmdCntr_1_cy<14>_rt LUT1 Mcount_BC0_cnt_cy<1>_rt LUT1 Mcount_BC0_cnt_cy<2>_rt LUT1 Mcount_BC0_cnt_cy<3>_rt LUT1 Mcount_BC0_cnt_cy<4>_rt LUT1 Mcount_BC0_cnt_cy<5>_rt LUT1 Mcount_BC0_cnt_cy<6>_rt LUT1 Mcount_BC0_cnt_cy<7>_rt LUT1 Mcount_BC0_cnt_cy<8>_rt LUT1 Mcount_BC0_cnt_cy<9>_rt LUT1 Mcount_BC0_cnt_cy<10>_rt LUT1 Mcount_BC0_cnt_cy<11>_rt LUT1 Mcount_BC0_cnt_cy<12>_rt LUT1 Mcount_BC0_cnt_cy<13>_rt LUT1 Mcount_BC0_cnt_cy<14>_rt LUT1 Mcount_TTCcmdCntr_2_cy<1>_rt LUT1 Mcount_TTCcmdCntr_2_cy<2>_rt LUT1 Mcount_TTCcmdCntr_2_cy<3>_rt LUT1 Mcount_TTCcmdCntr_2_cy<4>_rt LUT1 Mcount_TTCcmdCntr_2_cy<5>_rt LUT1 Mcount_TTCcmdCntr_2_cy<6>_rt LUT1 Mcount_TTCcmdCntr_2_cy<7>_rt LUT1 Mcount_TTCcmdCntr_2_cy<8>_rt LUT1 Mcount_TTCcmdCntr_2_cy<9>_rt LUT1 Mcount_TTCcmdCntr_2_cy<10>_rt LUT1 Mcount_TTCcmdCntr_2_cy<11>_rt LUT1 Mcount_TTCcmdCntr_2_cy<12>_rt LUT1 Mcount_TTCcmdCntr_2_cy<13>_rt LUT1 Mcount_TTCcmdCntr_2_cy<14>_rt LUT1 Mcount_TTCcmdCntr_0_cy<1>_rt LUT1 Mcount_TTCcmdCntr_0_cy<2>_rt LUT1 Mcount_TTCcmdCntr_0_cy<3>_rt LUT1 Mcount_TTCcmdCntr_0_cy<4>_rt LUT1 Mcount_TTCcmdCntr_0_cy<5>_rt LUT1 Mcount_TTCcmdCntr_0_cy<6>_rt LUT1 Mcount_TTCcmdCntr_0_cy<7>_rt LUT1 Mcount_TTCcmdCntr_0_cy<8>_rt LUT1 Mcount_TTCcmdCntr_0_cy<9>_rt LUT1 Mcount_TTCcmdCntr_0_cy<10>_rt LUT1 Mcount_TTCcmdCntr_0_cy<11>_rt LUT1 Mcount_TTCcmdCntr_0_cy<12>_rt LUT1 Mcount_TTCcmdCntr_0_cy<13>_rt LUT1 Mcount_TTCcmdCntr_0_cy<14>_rt LUT1 Mcount_TTCcmdCntr_3_cy<1>_rt LUT1 Mcount_TTCcmdCntr_3_cy<2>_rt LUT1 Mcount_TTCcmdCntr_3_cy<3>_rt LUT1 Mcount_TTCcmdCntr_3_cy<4>_rt LUT1 Mcount_TTCcmdCntr_3_cy<5>_rt LUT1 Mcount_TTCcmdCntr_3_cy<6>_rt LUT1 Mcount_TTCcmdCntr_3_cy<7>_rt LUT1 Mcount_TTCcmdCntr_3_cy<8>_rt LUT1 Mcount_TTCcmdCntr_3_cy<9>_rt LUT1 Mcount_TTCcmdCntr_3_cy<10>_rt LUT1 Mcount_TTCcmdCntr_3_cy<11>_rt LUT1 Mcount_TTCcmdCntr_3_cy<12>_rt LUT1 Mcount_TTCcmdCntr_3_cy<13>_rt LUT1 Mcount_TTCcmdCntr_3_cy<14>_rt LUT1 Mcount_TTCcmdCntr_5_cy<1>_rt LUT1 Mcount_TTCcmdCntr_5_cy<2>_rt LUT1 Mcount_TTCcmdCntr_5_cy<3>_rt LUT1 Mcount_TTCcmdCntr_5_cy<4>_rt LUT1 Mcount_TTCcmdCntr_5_cy<5>_rt LUT1 Mcount_TTCcmdCntr_5_cy<6>_rt LUT1 Mcount_TTCcmdCntr_5_cy<7>_rt LUT1 Mcount_TTCcmdCntr_5_cy<8>_rt LUT1 Mcount_TTCcmdCntr_5_cy<9>_rt LUT1 Mcount_TTCcmdCntr_5_cy<10>_rt LUT1 Mcount_TTCcmdCntr_5_cy<11>_rt LUT1 Mcount_TTCcmdCntr_5_cy<12>_rt LUT1 Mcount_TTCcmdCntr_5_cy<13>_rt LUT1 Mcount_TTCcmdCntr_5_cy<14>_rt LUT1 Mcount_TTCcmdCntr_4_cy<1>_rt LUT1 Mcount_TTCcmdCntr_4_cy<2>_rt LUT1 Mcount_TTCcmdCntr_4_cy<3>_rt LUT1 Mcount_TTCcmdCntr_4_cy<4>_rt LUT1 Mcount_TTCcmdCntr_4_cy<5>_rt LUT1 Mcount_TTCcmdCntr_4_cy<6>_rt LUT1 Mcount_TTCcmdCntr_4_cy<7>_rt LUT1 Mcount_TTCcmdCntr_4_cy<8>_rt LUT1 Mcount_TTCcmdCntr_4_cy<9>_rt LUT1 Mcount_TTCcmdCntr_4_cy<10>_rt LUT1 Mcount_TTCcmdCntr_4_cy<11>_rt LUT1 Mcount_TTCcmdCntr_4_cy<12>_rt LUT1 Mcount_TTCcmdCntr_4_cy<13>_rt LUT1 Mcount_TTCcmdCntr_4_cy<14>_rt LUT1 Mcount_TTCcmdCntr_8_cy<1>_rt LUT1 Mcount_TTCcmdCntr_8_cy<2>_rt LUT1 Mcount_TTCcmdCntr_8_cy<3>_rt LUT1 Mcount_TTCcmdCntr_8_cy<4>_rt LUT1 Mcount_TTCcmdCntr_8_cy<5>_rt LUT1 Mcount_TTCcmdCntr_8_cy<6>_rt LUT1 Mcount_TTCcmdCntr_8_cy<7>_rt LUT1 Mcount_TTCcmdCntr_8_cy<8>_rt LUT1 Mcount_TTCcmdCntr_8_cy<9>_rt LUT1 Mcount_TTCcmdCntr_8_cy<10>_rt LUT1 Mcount_TTCcmdCntr_8_cy<11>_rt LUT1 Mcount_TTCcmdCntr_8_cy<12>_rt LUT1 Mcount_TTCcmdCntr_8_cy<13>_rt LUT1 Mcount_TTCcmdCntr_8_cy<14>_rt LUT1 Mcount_TTCcmdCntr_6_cy<1>_rt LUT1 Mcount_TTCcmdCntr_6_cy<2>_rt LUT1 Mcount_TTCcmdCntr_6_cy<3>_rt LUT1 Mcount_TTCcmdCntr_6_cy<4>_rt LUT1 Mcount_TTCcmdCntr_6_cy<5>_rt LUT1 Mcount_TTCcmdCntr_6_cy<6>_rt LUT1 Mcount_TTCcmdCntr_6_cy<7>_rt LUT1 Mcount_TTCcmdCntr_6_cy<8>_rt LUT1 Mcount_TTCcmdCntr_6_cy<9>_rt LUT1 Mcount_TTCcmdCntr_6_cy<10>_rt LUT1 Mcount_TTCcmdCntr_6_cy<11>_rt LUT1 Mcount_TTCcmdCntr_6_cy<12>_rt LUT1 Mcount_TTCcmdCntr_6_cy<13>_rt LUT1 Mcount_TTCcmdCntr_6_cy<14>_rt LUT1 Mcount_TTCcmdCntr_7_cy<1>_rt LUT1 Mcount_TTCcmdCntr_7_cy<2>_rt LUT1 Mcount_TTCcmdCntr_7_cy<3>_rt LUT1 Mcount_TTCcmdCntr_7_cy<4>_rt LUT1 Mcount_TTCcmdCntr_7_cy<5>_rt LUT1 Mcount_TTCcmdCntr_7_cy<6>_rt LUT1 Mcount_TTCcmdCntr_7_cy<7>_rt LUT1 Mcount_TTCcmdCntr_7_cy<8>_rt LUT1 Mcount_TTCcmdCntr_7_cy<9>_rt LUT1 Mcount_TTCcmdCntr_7_cy<10>_rt LUT1 Mcount_TTCcmdCntr_7_cy<11>_rt LUT1 Mcount_TTCcmdCntr_7_cy<12>_rt LUT1 Mcount_TTCcmdCntr_7_cy<13>_rt LUT1 Mcount_TTCcmdCntr_7_cy<14>_rt LUT1 Mcount_TTCcmdCntr_10_cy<1>_rt LUT1 Mcount_TTCcmdCntr_10_cy<2>_rt LUT1 Mcount_TTCcmdCntr_10_cy<3>_rt LUT1 Mcount_TTCcmdCntr_10_cy<4>_rt LUT1 Mcount_TTCcmdCntr_10_cy<5>_rt LUT1 Mcount_TTCcmdCntr_10_cy<6>_rt LUT1 Mcount_TTCcmdCntr_10_cy<7>_rt LUT1 Mcount_TTCcmdCntr_10_cy<8>_rt LUT1 Mcount_TTCcmdCntr_10_cy<9>_rt LUT1 Mcount_TTCcmdCntr_10_cy<10>_rt LUT1 Mcount_TTCcmdCntr_10_cy<11>_rt LUT1 Mcount_TTCcmdCntr_10_cy<12>_rt LUT1 Mcount_TTCcmdCntr_10_cy<13>_rt LUT1 Mcount_TTCcmdCntr_10_cy<14>_rt LUT1 Mcount_TTCcmdCntr_9_cy<1>_rt LUT1 Mcount_TTCcmdCntr_9_cy<2>_rt LUT1 Mcount_TTCcmdCntr_9_cy<3>_rt LUT1 Mcount_TTCcmdCntr_9_cy<4>_rt LUT1 Mcount_TTCcmdCntr_9_cy<5>_rt LUT1 Mcount_TTCcmdCntr_9_cy<6>_rt LUT1 Mcount_TTCcmdCntr_9_cy<7>_rt LUT1 Mcount_TTCcmdCntr_9_cy<8>_rt LUT1 Mcount_TTCcmdCntr_9_cy<9>_rt LUT1 Mcount_TTCcmdCntr_9_cy<10>_rt LUT1 Mcount_TTCcmdCntr_9_cy<11>_rt LUT1 Mcount_TTCcmdCntr_9_cy<12>_rt LUT1 Mcount_TTCcmdCntr_9_cy<13>_rt LUT1 Mcount_TTCcmdCntr_9_cy<14>_rt LUT1 Mcount_TTCcmdCntr_12_cy<1>_rt LUT1 Mcount_TTCcmdCntr_12_cy<2>_rt LUT1 Mcount_TTCcmdCntr_12_cy<3>_rt LUT1 Mcount_TTCcmdCntr_12_cy<4>_rt LUT1 Mcount_TTCcmdCntr_12_cy<5>_rt LUT1 Mcount_TTCcmdCntr_12_cy<6>_rt LUT1 Mcount_TTCcmdCntr_12_cy<7>_rt LUT1 Mcount_TTCcmdCntr_12_cy<8>_rt LUT1 Mcount_TTCcmdCntr_12_cy<9>_rt LUT1 Mcount_TTCcmdCntr_12_cy<10>_rt LUT1 Mcount_TTCcmdCntr_12_cy<11>_rt LUT1 Mcount_TTCcmdCntr_12_cy<12>_rt LUT1 Mcount_TTCcmdCntr_12_cy<13>_rt LUT1 Mcount_TTCcmdCntr_12_cy<14>_rt LUT1 Mcount_TTCcmdCntr_11_cy<1>_rt LUT1 Mcount_TTCcmdCntr_11_cy<2>_rt LUT1 Mcount_TTCcmdCntr_11_cy<3>_rt LUT1 Mcount_TTCcmdCntr_11_cy<4>_rt LUT1 Mcount_TTCcmdCntr_11_cy<5>_rt LUT1 Mcount_TTCcmdCntr_11_cy<6>_rt LUT1 Mcount_TTCcmdCntr_11_cy<7>_rt LUT1 Mcount_TTCcmdCntr_11_cy<8>_rt LUT1 Mcount_TTCcmdCntr_11_cy<9>_rt LUT1 Mcount_TTCcmdCntr_11_cy<10>_rt LUT1 Mcount_TTCcmdCntr_11_cy<11>_rt LUT1 Mcount_TTCcmdCntr_11_cy<12>_rt LUT1 Mcount_TTCcmdCntr_11_cy<13>_rt LUT1 Mcount_TTCcmdCntr_11_cy<14>_rt LUT1 Mcount_TTCcmdCntr_13_cy<1>_rt LUT1 Mcount_TTCcmdCntr_13_cy<2>_rt LUT1 Mcount_TTCcmdCntr_13_cy<3>_rt LUT1 Mcount_TTCcmdCntr_13_cy<4>_rt LUT1 Mcount_TTCcmdCntr_13_cy<5>_rt LUT1 Mcount_TTCcmdCntr_13_cy<6>_rt LUT1 Mcount_TTCcmdCntr_13_cy<7>_rt LUT1 Mcount_TTCcmdCntr_13_cy<8>_rt LUT1 Mcount_TTCcmdCntr_13_cy<9>_rt LUT1 Mcount_TTCcmdCntr_13_cy<10>_rt LUT1 Mcount_TTCcmdCntr_13_cy<11>_rt LUT1 Mcount_TTCcmdCntr_13_cy<12>_rt LUT1 Mcount_TTCcmdCntr_13_cy<13>_rt LUT1 Mcount_TTCcmdCntr_13_cy<14>_rt LUT1 Mcount_TTCcmdCntr_14_cy<1>_rt LUT1 Mcount_TTCcmdCntr_14_cy<2>_rt LUT1 Mcount_TTCcmdCntr_14_cy<3>_rt LUT1 Mcount_TTCcmdCntr_14_cy<4>_rt LUT1 Mcount_TTCcmdCntr_14_cy<5>_rt LUT1 Mcount_TTCcmdCntr_14_cy<6>_rt LUT1 Mcount_TTCcmdCntr_14_cy<7>_rt LUT1 Mcount_TTCcmdCntr_14_cy<8>_rt LUT1 Mcount_TTCcmdCntr_14_cy<9>_rt LUT1 Mcount_TTCcmdCntr_14_cy<10>_rt LUT1 Mcount_TTCcmdCntr_14_cy<11>_rt LUT1 Mcount_TTCcmdCntr_14_cy<12>_rt LUT1 Mcount_TTCcmdCntr_14_cy<13>_rt LUT1 Mcount_TTCcmdCntr_14_cy<14>_rt LUT1 Mcount_TTCcmdCntr_15_cy<1>_rt LUT1 Mcount_TTCcmdCntr_15_cy<2>_rt LUT1 Mcount_TTCcmdCntr_15_cy<3>_rt LUT1 Mcount_TTCcmdCntr_15_cy<4>_rt LUT1 Mcount_TTCcmdCntr_15_cy<5>_rt LUT1 Mcount_TTCcmdCntr_15_cy<6>_rt LUT1 Mcount_TTCcmdCntr_15_cy<7>_rt LUT1 Mcount_TTCcmdCntr_15_cy<8>_rt LUT1 Mcount_TTCcmdCntr_15_cy<9>_rt LUT1 Mcount_TTCcmdCntr_15_cy<10>_rt LUT1 Mcount_TTCcmdCntr_15_cy<11>_rt LUT1 Mcount_TTCcmdCntr_15_cy<12>_rt LUT1 Mcount_TTCcmdCntr_15_cy<13>_rt LUT1 Mcount_TTCcmdCntr_15_cy<14>_rt LUT1 Mcount_TTC_history_wa_cy<1>_rt LUT1 Mcount_TTC_history_wa_cy<2>_rt LUT1 Mcount_TTC_history_wa_cy<3>_rt LUT1 Mcount_TTC_history_wa_cy<4>_rt LUT1 Mcount_TTC_history_wa_cy<5>_rt LUT1 Mcount_TTC_history_wa_cy<6>_rt LUT1 Mcount_TTC_history_wa_cy<7>_rt LUT1 Mcount_OC_cnt_cy<1>_rt LUT1 Mcount_OC_cnt_cy<2>_rt LUT1 Mcount_OC_cnt_cy<3>_rt LUT1 Mcount_OC_cnt_cy<4>_rt LUT1 Mcount_OC_cnt_cy<5>_rt LUT1 Mcount_OC_cnt_cy<6>_rt LUT1 Mcount_OC_cnt_cy<7>_rt LUT1 Mcount_OC_cnt_cy<8>_rt LUT1 Mcount_OC_cnt_cy<9>_rt LUT1 Mcount_OC_cnt_cy<10>_rt LUT1 Mcount_OC_cnt_cy<11>_rt LUT1 Mcount_OC_cnt_cy<12>_rt LUT1 Mcount_OC_cnt_cy<13>_rt LUT1 Mcount_OC_cnt_cy<14>_rt LUT1 Mcount_OC_cnt_cy<15>_rt LUT1 Mcount_OC_cnt_cy<16>_rt LUT1 Mcount_OC_cnt_cy<17>_rt LUT1 Mcount_OC_cnt_cy<18>_rt LUT1 Mcount_OC_cnt_cy<19>_rt LUT1 Mcount_OC_cnt_cy<20>_rt LUT1 Mcount_OC_cnt_cy<21>_rt LUT1 Mcount_OC_cnt_cy<22>_rt LUT1 Mcount_OC_cnt_cy<23>_rt LUT1 Mcount_OC_cnt_cy<24>_rt LUT1 Mcount_OC_cnt_cy<25>_rt LUT1 Mcount_OC_cnt_cy<26>_rt LUT1 Mcount_OC_cnt_cy<27>_rt LUT1 Mcount_OC_cnt_cy<28>_rt LUT1 Mcount_OC_cnt_cy<29>_rt LUT1 Mcount_OC_cnt_cy<30>_rt LUT1 Mcount_buffer_wa_cy<1>_rt LUT1 Mcount_buffer_wa_cy<2>_rt LUT1 Mcount_buffer_wa_cy<3>_rt LUT1 Mcount_buffer_wa_cy<4>_rt LUT1 Mcount_buffer_wa_cy<5>_rt LUT1 Mcount_buffer_wa_cy<6>_rt LUT1 Mcount_buffer_wa_cy<7>_rt LUT1 Mcount_T3_L1A_cnt_cy<1>_rt LUT1 Mcount_T3_L1A_cnt_cy<2>_rt LUT1 Mcount_T3_L1A_cnt_cy<3>_rt LUT1 Mcount_T3_L1A_cnt_cy<4>_rt LUT1 Mcount_T3_L1A_cnt_cy<5>_rt LUT1 Mcount_T3_L1A_cnt_cy<6>_rt LUT1 Mcount_T3_L1A_cnt_cy<7>_rt LUT1 Mcount_T3_L1A_cnt_cy<8>_rt LUT1 Mcount_T3_L1A_cnt_cy<9>_rt LUT1 Mcount_T3_L1A_cnt_cy<10>_rt LUT1 Mcount_T3_L1A_cnt_cy<11>_rt LUT1 Mcount_T3_L1A_cnt_cy<12>_rt LUT1 Mcount_T3_L1A_cnt_cy<13>_rt LUT1 Mcount_T3_L1A_cnt_cy<14>_rt LUT1 Mcount_ipbclk_cntr_cy<1>_rt LUT1 Mcount_ipbclk_cntr_cy<2>_rt LUT1 Mcount_ipbclk_cntr_cy<3>_rt LUT1 Mcount_ipbclk_cntr_cy<4>_rt LUT1 Mcount_ipbclk_cntr_cy<5>_rt LUT1 Mcount_ipbclk_cntr_cy<6>_rt LUT1 Mcount_ipbclk_cntr_cy<7>_rt LUT1 Mcount_ipbclk_cntr_cy<8>_rt LUT1 Mcount_ipbclk_cntr_cy<9>_rt LUT1 Mcount_ipbclk_cntr_cy<10>_rt LUT1 Mcount_ipbclk_cntr_cy<11>_rt LUT1 Mcount_ipbclk_cntr_cy<12>_rt LUT1 Mcount_ipbclk_cntr_cy<13>_rt LUT1 Mcount_ipbclk_cntr_cy<14>_rt LUT1 Mcount_ipbclk_cntr_cy<15>_rt LUT1 Mcount_ipbclk_cntr_cy<16>_rt LUT1 Mcount_ipbclk_cntr_cy<17>_rt LUT1 Mcount_ipbclk_cntr_cy<18>_rt LUT1 Mcount_L1A_cnt_cy<1>_rt LUT1 Mcount_L1A_cnt_cy<2>_rt LUT1 Mcount_L1A_cnt_cy<3>_rt LUT1 Mcount_L1A_cnt_cy<4>_rt LUT1 Mcount_L1A_cnt_cy<5>_rt LUT1 Mcount_L1A_cnt_cy<6>_rt LUT1 Mcount_L1A_cnt_cy<7>_rt LUT1 Mcount_L1A_cnt_cy<8>_rt LUT1 Mcount_L1A_cnt_cy<9>_rt LUT1 Mcount_L1A_cnt_cy<10>_rt LUT1 Mcount_L1A_cnt_cy<11>_rt LUT1 Mcount_L1A_cnt_cy<12>_rt LUT1 Mcount_L1A_cnt_cy<13>_rt LUT1 Mcount_L1A_cnt_cy<14>_rt LUT1 Madd_Event_nr[23]_GND_11_o_add_51_OUT_xor<23>_rt LUT1 Mcount_TTC_cntr_xor<19>_rt LUT1 Mcount_Bcnt_xor<11>_rt LUT1 Mcount_DbErr_cnt_xor<7>_rt LUT1 Mcount_BcntErr_cnt_xor<7>_rt LUT1 Mcount_SinErr_cnt_xor<7>_rt LUT1 Mcount_TTCcmdCntr_1_xor<15>_rt LUT1 Mcount_BC0_cnt_xor<15>_rt LUT1 Mcount_TTCcmdCntr_2_xor<15>_rt LUT1 Mcount_TTCcmdCntr_0_xor<15>_rt LUT1 Mcount_TTCcmdCntr_3_xor<15>_rt LUT1 Mcount_TTCcmdCntr_5_xor<15>_rt LUT1 Mcount_TTCcmdCntr_4_xor<15>_rt LUT1 Mcount_TTCcmdCntr_8_xor<15>_rt LUT1 Mcount_TTCcmdCntr_6_xor<15>_rt LUT1 Mcount_TTCcmdCntr_7_xor<15>_rt LUT1 Mcount_TTCcmdCntr_10_xor<15>_rt LUT1 Mcount_TTCcmdCntr_9_xor<15>_rt LUT1 Mcount_TTCcmdCntr_12_xor<15>_rt LUT1 Mcount_TTCcmdCntr_11_xor<15>_rt LUT1 Mcount_TTCcmdCntr_13_xor<15>_rt LUT1 Mcount_TTCcmdCntr_14_xor<15>_rt LUT1 Mcount_TTCcmdCntr_15_xor<15>_rt LUT1 Mcount_TTC_history_wa_xor<8>_rt LUT1 Mcount_OC_cnt_xor<31>_rt LUT1 Mcount_buffer_wa_xor<8>_rt LUT1 Mcount_T3_L1A_cnt_xor<15>_rt LUT1 Mcount_ipbclk_cntr_xor<19>_rt LUT1 Mcount_L1A_cnt_xor<15>_rt INV V6_DONE_inv1_INV_0 INV SN[7]_inv_157_OUT<1>1_INV_0 INV SN[7]_inv_157_OUT<0>1_INV_0 INV TTCclk_n1_INV_0 INV TTCclkOutn<0>1_INV_0 INV TTCclkOutn<1>1_INV_0 INV TTCclkOutn<2>1_INV_0 INV TTCclkOutn<3>1_INV_0 INV ipb_clk_n1_INV_0 INV DNA_clk_inv1_INV_0 LUT2 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXCHARDISPVAL_INT_GND_13_o_MUX_189_o11 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXCHARDISPMODE_INT_TXEVEN_MUX_188_o11 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXCHARISK_INT_TXEVEN_MUX_187_o11 LUT2 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXDATA_INT[7]_GND_13_o_mux_28_OUT11 LUT2 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXDATA_INT[7]_GND_13_o_mux_28_OUT21 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXDATA_INT[7]_GND_13_o_mux_28_OUT31 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXDATA_INT[7]_GND_13_o_mux_28_OUT41 LUT2 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXDATA_INT[7]_GND_13_o_mux_28_OUT51 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXDATA_INT[7]_GND_13_o_mux_28_OUT61 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXDATA_INT[7]_GND_13_o_mux_28_OUT71 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_TXDATA_INT[7]_GND_13_o_mux_28_OUT81 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXCHARISK_TXCHARISK_INT_MUX_180_o11 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXCHARISCOMMA_TXCHARISK_INT_MUX_181_o11 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDATA[7]_TXDATA_INT[7]_mux_18_OUT11 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDATA[7]_TXDATA_INT[7]_mux_18_OUT21 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDATA[7]_TXDATA_INT[7]_mux_18_OUT31 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDATA[7]_TXDATA_INT[7]_mux_18_OUT41 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDATA[7]_TXDATA_INT[7]_mux_18_OUT51 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDATA[7]_TXDATA_INT[7]_mux_18_OUT61 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDATA[7]_TXDATA_INT[7]_mux_18_OUT71 LUT3 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDATA[7]_TXDATA_INT[7]_mux_18_OUT81 LUT2 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXNOTINTABLE_GND_13_o_MUX_177_o11 LUT2 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXDISPERR_GND_13_o_MUX_178_o11 LUT2 i_GTP_if/i_GbE_pcs_pma/BU2/U0/Mmux_RXBUFSTATUS[1]_GND_13_o_mux_19_OUT21 Section 6 - IOB Properties -------------------------- +---------------------------------------------------------------------------------------------------------------------------------------------------------+ | IOB Name | Type | Direction | IO Standard | Diff | Drive | Slew | Reg (s) | Resistor | IOB | | | | | | Term | Strength | Rate | | | Delay | +---------------------------------------------------------------------------------------------------------------------------------------------------------+ | CLK1_en<0> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<1> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<2> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<3> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<4> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<5> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<6> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<7> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<8> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<9> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<10> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | CLK1_en<11> | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | FLASH_C | IOB | OUTPUT | LVCMOS33 | | 12 | FAST | ODDR | PULLDOWN | | | FLASH_D | IOB | OUTPUT | LVCMOS33 | | 12 | FAST | OFF | | | | FLASH_Q | IOB | INPUT | LVCMOS33 | | | | IFF | | | | FLASH_S | IOB | OUTPUT | LVCMOS33 | | 12 | FAST | | PULLUP | | | FLASH_S2 | IOB | OUTPUT | LVCMOS33 | | 12 | SLOW | | PULLUP | | | FSIO_CS_B<0> | IOB | BIDIR | LVCMOS33 | | 12 | SLOW | | PULLUP | | | FSIO_CS_B<1> | IOB | BIDIR | LVCMOS33 | | 12 | SLOW | | PULLUP | | | FSIO_CS_B<2> | IOB | OUTPUT | LVCMOS33 | | 12 | SLOW | | PULLUP | | | FSIO_CS_B<3> | IOB | OUTPUT | LVCMOS33 | | 12 | SLOW | | PULLUP | | | FSIO_MISO | IOB | OUTPUT | LVCMOS33 | | 12 | FAST | | | | | FSIO_MOSI | IOB | INPUT | LVCMOS33 | | | | IFF | | | | FSIO_SCAN | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | FSIO_SCK | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | GPLED_B<0> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | GPLED_B<1> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | GPLED_B<2> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | GPLED_B<3> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | GbE_RXN | IPAD | INPUT | | | | | | | | | GbE_RXP | IPAD | INPUT | | | | | | | | | GbE_TXN | OPAD | OUTPUT | | | | | | | | | GbE_TXP | OPAD | OUTPUT | | | | | | | | | LINK_RXN | IPAD | INPUT | | | | | | | | | LINK_RXP | IPAD | INPUT | | | | | | | | | LINK_TXN | OPAD | OUTPUT | | | | | | | | | LINK_TXP | OPAD | OUTPUT | | | | | | | | | REFCLK_N | IPAD | INPUT | | | | | | | | | REFCLK_P | IPAD | INPUT | | | | | | | | | RxFB_n<1> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<2> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<3> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<4> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<5> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<6> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<7> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<8> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<9> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<10> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<11> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_n<12> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<1> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<2> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<3> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<4> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<5> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<6> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<7> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<8> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<9> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<10> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<11> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | RxFB_p<12> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | S2V_n | IOBS | OUTPUT | LVDS_25 | | | | | | | | S2V_p | IOBM | OUTPUT | LVDS_25 | | | | | | | | SEL_TTC_CLK | IOB | OUTPUT | LVCMOS33 | | 2 | SLOW | | | | | SN_IN<0> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<1> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<2> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<3> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<4> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<5> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<6> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<7> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<8> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | SN_IN<9> | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | T1_CS_B | IOB | OUTPUT | LVCMOS25 | | 12 | FAST | | | | | T1_MISO | IOB | INPUT | LVCMOS25 | | | | | | | | T1_MOSI | IOB | OUTPUT | LVCMOS25 | | 12 | FAST | | | | | T1_SCK | IOB | OUTPUT | LVCMOS25 | | 12 | FAST | | | | | T3_SCK | IOB | OUTPUT | LVCMOS33 | | 12 | FAST | OFF | PULLUP | | | T3_TCDS_aux1 | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | T3_TCDS_aux2 | IOB | INPUT | LVCMOS33 | | | | | PULLUP | | | TTC_CLK_n<0> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTC_CLK_n<1> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTC_CLK_n<2> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTC_CLK_n<3> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTC_CLK_p<0> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTC_CLK_p<1> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTC_CLK_p<2> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTC_CLK_p<3> | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTC_REFCLK | IOB | INPUT | LVCMOS33 | | | | | | | | TTCdata_n | IOB | INPUT | LVDS_33 | TRUE | | | | | | | TTCdata_p | IOB | INPUT | LVDS_33 | TRUE | | | IDDR | | | | TxFB_n<1> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<2> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<3> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<4> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<5> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<6> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<7> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<8> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<9> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<10> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<11> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_n<12> | IOBS | OUTPUT | LVDS_33 | | | | | | | | TxFB_p<1> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<2> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<3> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<4> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<5> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<6> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<7> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<8> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<9> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<10> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<11> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | TxFB_p<12> | IOBM | OUTPUT | LVDS_33 | | | | ODDR | | | | | | | | | | | TDDR | | | | V6_CCLK | IOB | OUTPUT | LVCMOS25 | | 12 | FAST | ODDR | | | | V6_CDATA | IOB | OUTPUT | LVCMOS25 | | 12 | FAST | | | | | V6_DONE | IOB | INPUT | LVCMOS25 | | | | | | | | V6_INIT_B | IOB | INPUT | LVCMOS25 | | | | IFF | PULLUP | | | V6_PROG_B | IOB | OUTPUT | LVCMOS25 | | 12 | FAST | | | | +---------------------------------------------------------------------------------------------------------------------------------------------------------+ Section 7 - RPMs ---------------- i_GTP_if/i_GbE_pcs_pma/BU2/hset Section 8 - Guide Report ------------------------ Guide not run on this design. Section 9 - Area Group and Partition Summary -------------------------------------------- Partition Implementation Status ------------------------------- No Partitions were found in this design. ------------------------------- Area Group Information ---------------------- No area groups were found in this design. ---------------------- Section 10 - Timing Report -------------------------- A logic-level (pre-route) timing report can be generated by using Xilinx static timing analysis tools, Timing Analyzer (GUI) or TRCE (command line), with the mapped NCD and PCF files. Please note that this timing report will be generated using estimated delay information. For accurate numbers, please generate a timing report with the post Place and Route NCD file. For more information about the Timing Analyzer, consult the Xilinx Timing Analyzer Reference Manual; for more information about TRCE, consult the Xilinx Command Line Tools User Guide "TRACE" chapter. Section 11 - Configuration String Details ----------------------------------------- DCM "g_TTCclkOut[0].i_DCM_TTCclkOut": CLKDV_DIVIDE:2.0 CLKIN_DIVIDE_BY_2:FALSE CLKOUT_PHASE_SHIFT:FIXED CLK_FEEDBACK:1X DESKEW_ADJUST:5 DFS_FREQUENCY_MODE:LOW DLL_FREQUENCY_MODE:LOW DSS_MODE:NONE DUTY_CYCLE_CORRECTION:TRUE STARTUP_WAIT:FALSE VERY_HIGH_FREQUENCY:FALSE CLKFX_DIVIDE = 1 CLKFX_MULTIPLY = 4 CLKIN_PERIOD = 25.0 PHASE_SHIFT = 35 DCM "g_TTCclkOut[1].i_DCM_TTCclkOut": CLKDV_DIVIDE:2.0 CLKIN_DIVIDE_BY_2:FALSE CLKOUT_PHASE_SHIFT:FIXED CLK_FEEDBACK:1X DESKEW_ADJUST:5 DFS_FREQUENCY_MODE:LOW DLL_FREQUENCY_MODE:LOW DSS_MODE:NONE DUTY_CYCLE_CORRECTION:TRUE STARTUP_WAIT:FALSE VERY_HIGH_FREQUENCY:FALSE CLKFX_DIVIDE = 1 CLKFX_MULTIPLY = 4 CLKIN_PERIOD = 25.0 PHASE_SHIFT = 35 DCM "g_TTCclkOut[2].i_DCM_TTCclkOut": CLKDV_DIVIDE:2.0 CLKIN_DIVIDE_BY_2:FALSE CLKOUT_PHASE_SHIFT:FIXED CLK_FEEDBACK:1X DESKEW_ADJUST:5 DFS_FREQUENCY_MODE:LOW DLL_FREQUENCY_MODE:LOW DSS_MODE:NONE DUTY_CYCLE_CORRECTION:TRUE STARTUP_WAIT:FALSE VERY_HIGH_FREQUENCY:FALSE CLKFX_DIVIDE = 1 CLKFX_MULTIPLY = 4 CLKIN_PERIOD = 25.0 PHASE_SHIFT = 35 DCM "g_TTCclkOut[3].i_DCM_TTCclkOut": CLKDV_DIVIDE:2.0 CLKIN_DIVIDE_BY_2:FALSE CLKOUT_PHASE_SHIFT:FIXED CLK_FEEDBACK:1X DESKEW_ADJUST:5 DFS_FREQUENCY_MODE:LOW DLL_FREQUENCY_MODE:LOW DSS_MODE:NONE DUTY_CYCLE_CORRECTION:TRUE STARTUP_WAIT:FALSE VERY_HIGH_FREQUENCY:FALSE CLKFX_DIVIDE = 1 CLKFX_MULTIPLY = 4 CLKIN_PERIOD = 25.0 PHASE_SHIFT = 35 PLL_ADV "i_DCM_TTCclk/PLL_ADV": BANDWIDTH:OPTIMIZED CLK_FEEDBACK:CLKFBOUT COMPENSATION:SYSTEM_SYNCHRONOUS PLL_ADD_LEAKAGE:2 PLL_AVDD_COMP_SET:2 PLL_CLAMP_BYPASS:FALSE PLL_CLAMP_REF_SEL:1 PLL_CLK0MX:0 PLL_CLK1MX:0 PLL_CLK2MX:0 PLL_CLK3MX:0 PLL_CLK4MX:0 PLL_CLK5MX:0 PLL_CLKBURST_CNT:0 PLL_CLKBURST_ENABLE:TRUE PLL_CLKCNTRL:0 PLL_CLKFBMX:0 PLL_CLKFBOUT2_EDGE:TRUE PLL_CLKFBOUT2_NOCOUNT:TRUE PLL_CLKFBOUT_EDGE:TRUE PLL_CLKFBOUT_EN:FALSE PLL_CLKFBOUT_NOCOUNT:TRUE PLL_CLKOUT0_EDGE:TRUE PLL_CLKOUT0_EN:FALSE PLL_CLKOUT0_NOCOUNT:TRUE PLL_CLKOUT1_EDGE:TRUE PLL_CLKOUT1_EN:FALSE PLL_CLKOUT1_NOCOUNT:TRUE PLL_CLKOUT2_EDGE:TRUE PLL_CLKOUT2_EN:FALSE PLL_CLKOUT2_NOCOUNT:TRUE PLL_CLKOUT3_EDGE:TRUE PLL_CLKOUT3_EN:FALSE PLL_CLKOUT3_NOCOUNT:TRUE PLL_CLKOUT4_EDGE:TRUE PLL_CLKOUT4_EN:FALSE PLL_CLKOUT4_NOCOUNT:TRUE PLL_CLKOUT5_EDGE:TRUE PLL_CLKOUT5_EN:FALSE PLL_CLKOUT5_NOCOUNT:TRUE PLL_CLK_LOST_DETECT:FALSE PLL_CP:1 PLL_CP_BIAS_TRIP_SHIFT:TRUE PLL_CP_REPL:1 PLL_CP_RES:0 PLL_DIRECT_PATH_CNTRL:TRUE PLL_DIVCLK_EDGE:TRUE PLL_DIVCLK_NOCOUNT:TRUE PLL_DVDD_COMP_SET:2 PLL_EN:FALSE PLL_EN_DLY:TRUE PLL_EN_LEAKAGE:2 PLL_EN_TCLK0:TRUE PLL_EN_TCLK1:TRUE PLL_EN_TCLK2:TRUE PLL_EN_TCLK3:TRUE PLL_EN_VCO0:FALSE PLL_EN_VCO1:FALSE PLL_EN_VCO2:FALSE PLL_EN_VCO3:FALSE PLL_EN_VCO4:FALSE PLL_EN_VCO5:FALSE PLL_EN_VCO6:FALSE PLL_EN_VCO7:FALSE PLL_EN_VCO_DIV1:FALSE PLL_EN_VCO_DIV6:TRUE PLL_INTFB:0 PLL_IO_CLKSRC:0 PLL_LFHF:3 PLL_LOCK_FB_DLY:3 PLL_LOCK_REF_DLY:5 PLL_MAN_LF_EN:TRUE PLL_NBTI_EN:TRUE PLL_PFD_CNTRL:8 PLL_PFD_DLY:1 PLL_PWRD_CFG:FALSE PLL_REG_INPUT:TRUE PLL_RES:1 PLL_SEL_SLIPD:FALSE PLL_SKEW_CNTRL:0 PLL_TEST_IN_WINDOW:FALSE PLL_VDD_SEL:0 PLL_VLFHIGH_DIS:TRUE CLKFBOUT_MULT = 24 CLKFBOUT_PHASE = 56.25 CLKIN1_PERIOD = 24.900000 CLKIN2_PERIOD = 24.948 CLKOUT0_DIVIDE = 24 CLKOUT0_DUTY_CYCLE = 0.5 CLKOUT0_PHASE = 0.0 CLKOUT1_DIVIDE = 6 CLKOUT1_DUTY_CYCLE = 0.5 CLKOUT1_PHASE = 0.0 CLKOUT2_DIVIDE = 3 CLKOUT2_DUTY_CYCLE = 0.5 CLKOUT2_PHASE = 0.0 CLKOUT3_DIVIDE = 1 CLKOUT3_DUTY_CYCLE = 0.5 CLKOUT3_PHASE = 0.0 CLKOUT4_DIVIDE = 1 CLKOUT4_DUTY_CYCLE = 0.5 CLKOUT4_PHASE = 0.0 CLKOUT5_DIVIDE = 1 CLKOUT5_DUTY_CYCLE = 0.5 CLKOUT5_PHASE = 0.0 DIVCLK_DIVIDE = 1 REF_JITTER = 0.1 DCM "i_sysclk_dcm": CLKDV_DIVIDE:4.0 CLKIN_DIVIDE_BY_2:FALSE CLKOUT_PHASE_SHIFT:NONE CLK_FEEDBACK:1X DESKEW_ADJUST:5 DFS_FREQUENCY_MODE:LOW DLL_FREQUENCY_MODE:LOW DSS_MODE:NONE DUTY_CYCLE_CORRECTION:TRUE STARTUP_WAIT:FALSE VERY_HIGH_FREQUENCY:FALSE CLKFX_DIVIDE = 16 CLKFX_MULTIPLY = 2 CLKIN_PERIOD = 8.0 PHASE_SHIFT = 0 Section 12 - Control Set Information ------------------------------------ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | Clock Signal | Reset Signal | Set Signal | Enable Signal | Slice Load Count | Bel Load Count | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | DNA_clk | | | | 1 | 1 | | DNA_clk | | | _n1607_inv | 14 | 57 | | DNA_clk | sysclk_dcm_locked_inv | | | 2 | 2 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ICAP_clk | | | | 8 | 20 | | ICAP_clk | | | GLOBAL_LOGIC1 | 1 | 1 | | ICAP_clk | GbEGTPreset | | | 6 | 17 | | ICAP_clk | GbEGTPreset | | i_reboot/_n0029_inv | 1 | 4 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | S6_SCK | | | | 2 | 6 | | S6_SCK | | | i_SPI_if/WRITE_CTL_BitCntr[4]_AND_4_o | 1 | 4 | | S6_SCK | | | i_SPI_if/_n0368_inv | 2 | 8 | | S6_SCK | | | i_SPI_if/_n0393_inv | 6 | 32 | | S6_SCK | | | i_SPI_if/_n0422_inv | 6 | 32 | | S6_SCK | | | i_SPI_if/_n0442_inv | 2 | 16 | | S6_SCK | | | i_SPI_if/_n0447_inv | 5 | 19 | | S6_SCK | FSIO_CS_I<0> | | | 3 | 7 | | S6_SCK | FSIO_CS_I<0> | | i_SPI_if/BitCntr[4]_GND_15_o_equal_17_o | 1 | 4 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | TTC_REFCLK_in | | | GLOBAL_LOGIC1 | 1 | 1 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | TTCclk | | | | 32 | 118 | | TTCclk | | | FMT_rec_cntr[3]_AND_22_o | 5 | 14 | | TTCclk | | | GLOBAL_LOGIC1 | 2 | 3 | | TTCclk | | | L1Accept | 15 | 60 | | TTCclk | | | brcst_str<3> | 17 | 76 | | TTCclk | | | ipbclk_cntr19_sync[3]_PWR_11_o_equal_190_o | 5 | 20 | | TTCclk | BCntRes_Bcnt[11]_OR_85_o | | | 3 | 12 | | TTCclk | OCntRes | | BCntRes_Bcnt[11]_OR_85_o | 8 | 32 | | TTCclk | TTC_lock_inv | | | 1 | 2 | | TTCclk | brcst_str[3]_Brcst[7]_AND_38_o_inv | | | 4 | 15 | | TTCclk | chk_cmd_list_inv | | | 1 | 4 | | TTCclk | clear_cmd_list_inv | | | 1 | 4 | | TTCclk | ipbclk_cntr19_sync[3]_PWR_11_o_equal_190_o | | | 5 | 20 | | TTCclk | rec_cmd_inv | | | 2 | 6 | | TTCclk | reset | | BCntRes | 4 | 16 | | TTCclk | reset | | BCntRes_BCntRes_OR_98_o | 2 | 8 | | TTCclk | reset | | DbErrStr_DbErr_cnt[7]_AND_72_o | 2 | 8 | | TTCclk | reset | | EvCntRes | 4 | 16 | | TTCclk | reset | | L1Accept | 4 | 16 | | TTCclk | reset | | SinErrStr_SinErr_cnt[7]_AND_71_o | 2 | 8 | | TTCclk | reset | | _n1451_inv | 4 | 24 | | TTCclk | reset | | inc_TTCcmdCntr<1> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<2> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<3> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<4> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<5> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<6> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<7> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<8> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<9> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<10> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<11> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<12> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<13> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<14> | 4 | 16 | | TTCclk | reset | | inc_TTCcmdCntr<15> | 4 | 16 | | TTCclk | reset_clear_TTC_history_OR_492_o | | TTC_history_we | 3 | 9 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | TTCclk4x | | | | 3 | 8 | | TTCclk4x | _n1438 | | | 3 | 4 | | TTCclk4x | buffer_we<0>_inv | | | 3 | 9 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | TTCclk8x | | | | 110 | 196 | | TTCclk8x | | | GLOBAL_LOGIC1 | 66 | 126 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ipb_clk | | | | 29 | 64 | | ipb_clk | | | GLOBAL_LOGIC1 | 2 | 5 | | ipb_clk | | | _n1495_inv | 20 | 24 | | ipb_clk | | | _n1516_inv | 2 | 8 | | ipb_clk | | | _n1520_inv | 2 | 8 | | ipb_clk | | | _n1527_inv | 2 | 8 | | ipb_clk | | | _n1534_inv | 2 | 8 | | ipb_clk | | | _n1541_inv | 2 | 8 | | ipb_clk | | | _n1548_inv | 2 | 8 | | ipb_clk | | | _n1555_inv | 3 | 8 | | ipb_clk | | | _n1562_inv | 2 | 8 | | ipb_clk | | | _n1569_inv | 2 | 8 | | ipb_clk | | | _n1576_inv | 2 | 8 | | ipb_clk | | | _n1583_inv | 2 | 8 | | ipb_clk | | | _n1590_inv | 2 | 8 | | ipb_clk | | | _n1597_inv | 2 | 8 | | ipb_clk | | | _n1604_inv | 2 | 8 | | ipb_clk | | | cmd_list_we | 5 | 34 | | ipb_clk | | | i_flash/we_addr[15]_AND_92_o | 2 | 9 | | ipb_clk | | | i_ipbus/trans/iface/GND_299_o_start_AND_393_o | 8 | 32 | | ipb_clk | | | i_ipbus/trans/iface/_n0152_inv | 3 | 9 | | ipb_clk | | | i_ipbus/trans/iface/_n0155_inv | 4 | 16 | | ipb_clk | | | i_ipbus/trans/iface/dinit_dnext_d_OR_400_o | 8 | 32 | | ipb_clk | | | i_ipbus/trans/sm/_n0268 | 7 | 32 | | ipb_clk | | | i_ipbus/trans/sm/_n0272_inv | 4 | 16 | | ipb_clk | | | i_ipbus/trans/sm/ack | 16 | 32 | | ipb_clk | | | i_ipbus/trans/sm/state_FSM_FFd1 | 15 | 32 | | ipb_clk | | | i_ipbus/trans/tx_hdr | 8 | 29 | | ipb_clk | | | ipb_master_out_ipb_addr[15]_ipb_master_out_ipb_strobe_AND_463_o | 5 | 14 | | ipb_clk | | | ipb_master_out_ipb_addr[15]_ipb_master_out_ipb_strobe_AND_465_o | 5 | 16 | | ipb_clk | GbEGTPreset | | | 6 | 12 | | ipb_clk | GbEGTPreset | | i_ipbus/trans/cfg_we | 1 | 1 | | ipb_clk | i_flash/en_FLASH_dl<1>_inv | | | 2 | 12 | | ipb_clk | i_flash/en_FLASH_inv | | | 3 | 12 | | ipb_clk | i_ipbus/trans/iface/GND_299_o_state[2]_equal_56_o | | i_ipbus/trans/iface/PWR_155_o_first_AND_397_o | 4 | 16 | | ipb_clk | i_ipbus/trans/iface/dinit_d_rstpot | | i_ipbus/trans/iface/dnext_dinit_d_OR_397_o | 3 | 9 | | ipb_clk | i_ipbus/trans/sm/GND_300_o_ack_OR_417_o | | ipb_master_out_ipb_strobe | 2 | 8 | | ipb_clk | i_ipbus/trans/sm/_n0268 | | i_ipbus/trans/sm/_n0280_inv | 2 | 8 | | ipb_clk | i_ipbus/trans/sm/state<2>_0 | | | 1 | 3 | | ipb_clk | i_ipbus/trans/tx_hdr | | i_ipbus/trans/sm/ack_rmw_cyc_AND_407_o | 2 | 8 | | ipb_clk | ipb_master_out_ipb_addr[15]_ipb_master_out_ipb_strobe_AND_457_o_inv | | | 2 | 3 | | ipb_clk | ipbclk_cntr[19]_PWR_11_o_equal_186_o | | | 5 | 20 | | ipb_clk | sysclk_dcm_locked_reprogV6_OR_106_o | | | 11 | 33 | | ipb_clk | sysclk_dcm_locked_reprogV6_OR_106_o | | _n1483_inv | 1 | 1 | | ipb_clk | sysclk_dcm_locked_reprogV6_OR_106_o | | _n1495_inv | 14 | 24 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | sysclk | | | | 727 | 2296 | | sysclk | | | GLOBAL_LOGIC1 | 5 | 21 | | sysclk | | | i_GTP_if/i_mac/ready_ce_tx_crc_OR_186_o | 3 | 16 | | sysclk | | | i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.rd/rpntr/_n0027_inv | 5 | 21 | | sysclk | | | i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr/wpntr/_n0027_inv | 5 | 21 | | sysclk | | | i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.mem/_n0023_inv | 3 | 9 | | sysclk | | | i_ipbus/udp_if/RARP_block/Mcount_rarp_req_block.req_count_val | 1 | 5 | | sysclk | | | i_ipbus/udp_if/RARP_block/_n0119_inv | 2 | 16 | | sysclk | | | i_ipbus/udp_if/resend/_n0030_inv | 6 | 45 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0348_inv | 15 | 112 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0351_inv | 32 | 233 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0356_inv | 16 | 126 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0364_inv | 19 | 138 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0380_inv | 1 | 3 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0391_inv | 3 | 13 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0402_inv | 14 | 80 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0434_inv | 5 | 32 | | sysclk | | | i_ipbus/udp_if/rx_packet_parser/_n0444_inv | 2 | 10 | | sysclk | | | i_ipbus/udp_if/tx_main/_n0411_inv | 2 | 11 | | sysclk | | | i_ipbus/udp_if/tx_main/_n0431_inv | 4 | 13 | | sysclk | GbEGTPreset | | | 5 | 6 | | sysclk | GbEGTPreset | | i_GTP_if/_n0043_inv | 4 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/internal_ram_shim/_n0036_inv | 2 | 13 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/internal_ram_shim/_n0040_inv | 2 | 13 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/ipbus_out_valid | 20 | 128 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0343_inv | 4 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0347_inv | 4 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0351_inv | 5 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0355_inv | 3 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0359_inv | 4 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0363_inv | 3 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0367_inv | 3 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0371_inv | 3 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0375_inv | 3 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0379_inv | 3 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0383_inv | 2 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0387_inv | 4 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0391_inv | 4 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0395_inv | 3 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0399_inv | 4 | 16 | | sysclk | GbEGTPreset | | i_ipbus/udp_if/tx_transactor/_n0403_inv | 4 | 16 | | sysclk | RxV6cmd_inv | | | 3 | 5 | | sysclk | V6_DONE_Link_RXBYTEISALIGNED_OR_265_o | | | 2 | 3 | | sysclk | V6_DONE_inv | | | 3 | 12 | | sysclk | clk_toggle_q_ipb_master_out_ipb_addr[15]_AND_486_o_inv | | | 1 | 4 | | sysclk | div[3]_GbErxdvld_q_OR_262_o | | | 1 | 4 | | sysclk | i_GTP_if/GbErx_reset | | | 14 | 23 | | sysclk | i_GTP_if/GbErx_reset | | i_GTP_if/i_GbE_pcs_pma/BU2/U0/SYNCHRONISATION/_n0103_inv | 1 | 2 | | sysclk | i_GTP_if/GbEtx_reset | | | 14 | 34 | | sysclk | i_GTP_if/i_GbE_pcs_pma/BU2/U0/DCM_LOCKED_SOFT_RESET_OR_2_o | | | 2 | 2 | | sysclk | i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER/RESET_SYNC_STATUS_OR_51_o | | | 8 | 12 | | sysclk | i_GTP_if/i_GbE_pcs_pma/BU2/U0/RESET_INT_RXBUFSTATUS_INT[1]_OR_114_o | | | 3 | 5 | | sysclk | i_GTP_if/i_GbE_pcs_pma/BU2/U0/RESET_INT_TXBUFERR_INT_OR_113_o | | | 1 | 4 | | sysclk | i_GTP_if/i_GbE_pcs_pma/BU2/U0/SYNCHRONISATION/STATE_FSM_FFd4-In1_0 | | | 3 | 4 | | sysclk | i_GTP_if/i_mac/_n0217 | | | 5 | 8 | | sysclk | i_GTP_if/i_mac/clientemactxdvld_dl2_clientemactxd_ended_AND_103_o_inv | | | 1 | 8 | | sysclk | i_GTP_if/i_mac/reset_ce_rx_crc_OR_246_o | | | 6 | 14 | | sysclk | i_GTP_if/i_mac/reset_ce_tx_crc_OR_195_o | | | 4 | 12 | | sysclk | i_GTP_if/i_mac/reset_clientemactxdlast_OR_187_o | | i_GTP_if/i_mac/clientemactxdvld_tx_header[1]_AND_98_o | 1 | 2 | | sysclk | i_GTP_if/i_mac/reset_clientemactxdvld_dl2_OR_193_o | | i_GTP_if/i_mac/sel_FCS<2> | 1 | 2 | | sysclk | i_GTP_if/i_mac/reset_gap_cnt[4]_OR_190_o | | GbEtxdvld | 1 | 3 | | sysclk | i_GTP_if/i_mac/reset_sel_FCS[2]_OR_188_o | | i_GTP_if/i_mac/gap_cnt<4>_inv | 1 | 4 | | sysclk | i_flash/clk_toggle_q_addr[15]_AND_86_o_inv | | | 1 | 4 | | sysclk | i_ipbus/udp_if/ARP/_n0113 | | | 1 | 2 | | sysclk | i_ipbus/udp_if/ARP/mac_rx_valid_pkt_drop_arp_AND_168_o_inv | | | 2 | 8 | | sysclk | i_ipbus/udp_if/ARP/rx_reset_0 | | | 1 | 3 | | sysclk | i_ipbus/udp_if/ARP/send_packet.send_pending_inv | | | 1 | 3 | | sysclk | i_ipbus/udp_if/RARP_block/Mcount_rarp_req_block.req_count_val | | i_ipbus/udp_if/RARP_block/tick | 1 | 6 | | sysclk | i_ipbus/udp_if/RARP_block/Mcount_tick_counter.counter_int_val | | | 6 | 24 | | sysclk | i_ipbus/udp_if/RARP_block/rarp_we_sig_send_packet.last_we_AND_145_o_inv | | | 1 | 3 | | sysclk | i_ipbus/udp_if/internal_ram_shim/rxram_req_send_inv | | | 2 | 13 | | sysclk | i_ipbus/udp_if/payload/_n0304 | | | 1 | 2 | | sysclk | i_ipbus/udp_if/payload/mac_rx_valid_pkt_drop_payload_AND_200_o_inv | | | 2 | 8 | | sysclk | i_ipbus/udp_if/payload/rx_reset_0 | | | 2 | 3 | | sysclk | i_ipbus/udp_if/ping/_n0198 | | | 2 | 5 | | sysclk | i_ipbus/udp_if/ping/mac_rx_valid_pkt_drop_ping_AND_222_o_inv | | | 2 | 8 | | sysclk | i_ipbus/udp_if/rx_byte_sum/_n0077 | | | 2 | 2 | | sysclk | i_ipbus/udp_if/rx_ram_mux/_n0075 | | | 3 | 13 | | sysclk | i_ipbus/udp_if/rx_ram_mux/ram_ready_inv | | | 5 | 20 | | sysclk | i_ipbus/udp_if/rx_reset | | | 11 | 14 | | sysclk | i_ipbus/udp_if/rx_reset | | GbErxdvld | 7 | 42 | | sysclk | i_ipbus/udp_if/rx_reset | | i_ipbus/udp_if/payload/_n0346_inv | 2 | 16 | | sysclk | i_ipbus/udp_if/rx_reset | | i_ipbus/udp_if/payload/_n0374_inv | 2 | 14 | | sysclk | i_ipbus/udp_if/rx_reset | | i_ipbus/udp_if/rx_packet_parser/mac_rx_valid_broadcast.pkt_mask[5]_AND_279_o | 1 | 6 | | sysclk | i_ipbus/udp_if/rx_reset | | i_ipbus/udp_if/status_request | 1 | 2 | | sysclk | i_ipbus/udp_if/status/_n0107 | | | 2 | 5 | | sysclk | i_ipbus/udp_if/status/mac_rx_valid_pkt_drop_status_AND_235_o_inv | | | 4 | 8 | | sysclk | i_ipbus/udp_if/status/send_pending_inv | | | 1 | 4 | | sysclk | i_ipbus/udp_if/status_buffer/_n0211 | | i_ipbus/udp_if/status_buffer/_n0253_inv | 17 | 112 | | sysclk | i_ipbus/udp_if/status_buffer/_n0216 | | | 2 | 2 | | sysclk | i_ipbus/udp_if/status_buffer/_n0232 | | | 2 | 2 | | sysclk | i_ipbus/udp_if/status_buffer/_n0245 | | i_ipbus/udp_if/pkt_rcvd | 21 | 128 | | sysclk | i_ipbus/udp_if/status_buffer/ready_inv | | | 3 | 6 | | sysclk | i_ipbus/udp_if/status_buffer/rst_ipb_125_rst_ipb_125_MUX_1270_o | | | 2 | 2 | | sysclk | i_ipbus/udp_if/tx_byte_sum/_n0077 | | | 2 | 2 | | sysclk | i_ipbus/udp_if/tx_transactor/pkt_resend_inv | | | 4 | 6 | | sysclk | reset | | | 1 | 4 | | sysclk | reset | | T3_L1A_sync[3]_GND_11_o_equal_179_o | 4 | 16 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ~DNA_clk | | | shift_DNA | 4 | 4 | | ~DNA_clk | sysclk_dcm_locked_inv | | | 1 | 1 | | ~DNA_clk | sysclk_dcm_locked_inv | | shift_DNA | 3 | 6 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ~GbEGTPreset | | | | 1 | 1 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ~S6_SCK | | | | 1 | 1 | | ~S6_SCK | i_SPI_if/_n0356 | | | 4 | 7 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ~TTC_lock_inv | | | | 1 | 1 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ~TTCclk | | | | 1 | 1 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ~sysclk_dcm_locked_inv | | | | 1 | 1 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ~sysclk_dcm_locked_reprogV6_OR_106_o | | | | 1 | 1 | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ Section 13 - Utilization by Hierarchy ------------------------------------- +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | Module | Partition | Slices* | Slice Reg | LUTs | LUTRAM | BRAM/FIFO | DSP48A1 | BUFG | BUFIO | BUFR | DCM | PLL_ADV | Full Hierarchical Name | +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | AMC13_T2/ | | 506/2435 | 1187/6154 | 1197/5346 | 25/167 | 0/42 | 0/0 | 12/12 | 0/0 | 0/0 | 5/5 | 1/1 | AMC13_T2 | | +g_trig_Twinmux[0].i_trig_data | | 10/10 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[0].i_trig_data | | +g_trig_Twinmux[10].i_trig_data | | 9/9 | 14/14 | 12/12 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[10].i_trig_data | | +g_trig_Twinmux[11].i_trig_data | | 11/11 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[11].i_trig_data | | +g_trig_Twinmux[1].i_trig_data | | 9/9 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[1].i_trig_data | | +g_trig_Twinmux[2].i_trig_data | | 8/8 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[2].i_trig_data | | +g_trig_Twinmux[3].i_trig_data | | 10/10 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[3].i_trig_data | | +g_trig_Twinmux[4].i_trig_data | | 10/10 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[4].i_trig_data | | +g_trig_Twinmux[5].i_trig_data | | 10/10 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[5].i_trig_data | | +g_trig_Twinmux[6].i_trig_data | | 12/12 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[6].i_trig_data | | +g_trig_Twinmux[7].i_trig_data | | 11/11 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[7].i_trig_data | | +g_trig_Twinmux[8].i_trig_data | | 9/9 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[8].i_trig_data | | +g_trig_Twinmux[9].i_trig_data | | 11/11 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/g_trig_Twinmux[9].i_trig_data | | +i_GTP_if | | 6/199 | 16/345 | 18/404 | 0/13 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if | | ++i_GbE_pcs_pma | | 0/91 | 0/155 | 0/127 | 0/8 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_GbE_pcs_pma | | +++BU2 | | 0/91 | 0/155 | 0/127 | 0/8 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_GbE_pcs_pma/BU2 | | ++++U0 | | 22/91 | 38/155 | 12/127 | 0/8 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_GbE_pcs_pma/BU2/U0 | | +++++RECEIVER | | 35/35 | 57/57 | 55/55 | 8/8 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_GbE_pcs_pma/BU2/U0/RECEIVER | | +++++SYNCHRONISATION | | 10/10 | 10/10 | 18/18 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_GbE_pcs_pma/BU2/U0/SYNCHRONISATION | | +++++SYNC_SIGNAL_DETECT | | 1/1 | 2/2 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_GbE_pcs_pma/BU2/U0/SYNC_SIGNAL_DETECT | | +++++TRANSMITTER | | 23/23 | 48/48 | 42/42 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_GbE_pcs_pma/BU2/U0/TRANSMITTER | | ++i_S6Link_GbE | | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_S6Link_GbE | | +++tile0_S6Link_GbE_i | | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i | | ++i_mac | | 45/102 | 104/174 | 99/259 | 5/5 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_mac | | +++i_rx_CRC32D8 | | 28/28 | 35/35 | 81/81 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_mac/i_rx_CRC32D8 | | +++i_tx_CRC32D8 | | 29/29 | 35/35 | 79/79 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_GTP_if/i_mac/i_tx_CRC32D8 | | +i_LinkFIFO | | 0/36 | 0/57 | 0/69 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO | | ++U0 | | 0/36 | 0/57 | 0/69 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0 | | +++xst_fifo_generator | | 0/36 | 0/57 | 0/69 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator | | ++++gconvfifo.rf | | 0/36 | 0/57 | 0/69 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf | | +++++grf.rf | | 0/36 | 0/57 | 0/69 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf | | ++++++gntv_or_sync_fifo.gl0.rd | | 0/16 | 0/26 | 0/36 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.rd | | +++++++gr1.rfwft | | 3/3 | 4/4 | 3/3 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.rfwft | | +++++++grss.rsts | | 2/6 | 1/1 | 2/14 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.rd/grss.rsts | | ++++++++c1 | | 2/2 | 0/0 | 6/6 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.rd/grss.rsts/c1 | | ++++++++c2 | | 2/2 | 0/0 | 6/6 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.rd/grss.rsts/c2 | | +++++++rpntr | | 7/7 | 21/21 | 19/19 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.rd/rpntr | | ++++++gntv_or_sync_fifo.gl0.wr | | 1/15 | 0/22 | 1/32 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr | | +++++++gwss.wsts | | 1/5 | 1/1 | 1/13 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr/gwss.wsts | | ++++++++c0 | | 2/2 | 0/0 | 6/6 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr/gwss.wsts/c0 | | ++++++++c1 | | 2/2 | 0/0 | 6/6 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr/gwss.wsts/c1 | | +++++++wpntr | | 9/9 | 21/21 | 18/18 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.wr/wpntr | | ++++++gntv_or_sync_fifo.mem | | 5/5 | 9/9 | 1/1 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.mem | | +++++++gbm.gbmg.gbmga.ngecc.bmg | | 0/0 | 0/0 | 0/0 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.mem/gbm.gbmg.gbmga.ngecc.bmg | | ++++++++gnativebmg.native_blk_mem_gen | | 0/0 | 0/0 | 0/0 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.mem/gbm.gbmg.gbmga.ngecc.bmg/gnativebmg.native_blk_mem_gen | | +++++++++valid.cstr | | 0/0 | 0/0 | 0/0 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.mem/gbm.gbmg.gbmga.ngecc.bmg/gnativebmg.native_blk_mem_gen/valid.cstr | | ++++++++++ramloop[0].ram.r | | 0/0 | 0/0 | 0/0 | 0/0 | 0/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.mem/gbm.gbmg.gbmga.ngecc.bmg/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r | | +++++++++++s6_noinit.ram | | 0/0 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_LinkFIFO/U0/xst_fifo_generator/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.mem/gbm.gbmg.gbmga.ngecc.bmg/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s6_noinit.ram | | +i_SPI_if | | 75/75 | 136/136 | 196/196 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_SPI_if | | +i_TRIG0 | | 11/11 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_TRIG0 | | +i_TRIG1 | | 10/10 | 14/14 | 11/11 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_TRIG1 | | +i_TTC_history0 | | 0/0 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_TTC_history0 | | +i_TTC_history1 | | 0/0 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_TTC_history1 | | +i_TTC_history2 | | 0/0 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_TTC_history2 | | +i_buffer | | 0/0 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_buffer | | +i_flash | | 29/29 | 50/50 | 64/64 | 3/3 | 0/2 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_flash | | ++i_rbuf | | 0/0 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_flash/i_rbuf | | ++i_wbuf | | 0/0 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_flash/i_wbuf | | +i_ipbus | | 1/1433 | 0/4145 | 1/3235 | 0/0 | 0/34 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus | | ++trans | | 0/230 | 0/296 | 0/378 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/trans | | +++cfg | | 17/17 | 1/1 | 17/17 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/trans/cfg | | +++iface | | 98/98 | 131/131 | 158/158 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/trans/iface | | +++sm | | 115/115 | 164/164 | 203/203 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/trans/sm | | ++udp_if | | 8/1202 | 1/3849 | 8/2856 | 0/0 | 0/34 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if | | +++ARP | | 53/53 | 177/177 | 133/133 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/ARP | | +++IPADDR | | 48/48 | 173/173 | 112/112 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/IPADDR | | +++RARP_block | | 73/73 | 436/436 | 258/258 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/RARP_block | | +++clock_crossing_if | | 23/23 | 59/59 | 23/23 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/clock_crossing_if | | +++internal_ram | | 0/0 | 0/0 | 0/0 | 0/0 | 2/2 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/internal_ram | | +++internal_ram_selector | | 10/10 | 17/17 | 11/11 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/internal_ram_selector | | +++internal_ram_shim | | 10/10 | 42/42 | 22/22 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/internal_ram_shim | | +++ipbus_rx_ram | | 2/2 | 0/0 | 2/2 | 0/0 | 16/16 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/ipbus_rx_ram | | +++ipbus_tx_ram | | 9/9 | 2/2 | 8/8 | 0/0 | 16/16 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/ipbus_tx_ram | | +++payload | | 93/93 | 272/272 | 238/238 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/payload | | +++ping | | 53/53 | 154/154 | 134/134 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/ping | | +++resend | | 17/17 | 78/78 | 42/42 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/resend | | +++rx_byte_sum | | 26/26 | 58/58 | 62/62 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/rx_byte_sum | | +++rx_packet_parser | | 151/151 | 782/782 | 427/427 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/rx_packet_parser | | +++rx_ram_mux | | 25/25 | 37/37 | 50/50 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/rx_ram_mux | | +++rx_ram_selector | | 31/31 | 85/85 | 77/77 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/rx_ram_selector | | +++rx_reset_block | | 5/5 | 13/13 | 7/7 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/rx_reset_block | | +++rx_transactor | | 3/3 | 4/4 | 3/3 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/rx_transactor | | +++status | | 85/85 | 182/182 | 171/171 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/status | | +++status_buffer | | 161/161 | 446/446 | 358/358 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/status_buffer | | +++tx_byte_sum | | 25/25 | 58/58 | 66/66 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/tx_byte_sum | | +++tx_main | | 146/146 | 392/392 | 311/311 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/tx_main | | +++tx_ram_selector | | 56/56 | 117/117 | 140/140 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/tx_ram_selector | | +++tx_transactor | | 89/89 | 264/264 | 193/193 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_ipbus/udp_if/tx_transactor | | +i_reboot | | 16/16 | 38/38 | 26/26 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_reboot | | +i_twinmux | | 0/0 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | AMC13_T2/i_twinmux | +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ * Slices can be packed with basic elements from multiple hierarchies. Therefore, a slice will be counted in every hierarchical module that each of its packed basic elements belong to. ** For each column, there are two numbers reported /. is the number of elements that belong to that specific hierarchical module. is the total number of elements from that hierarchical module and any lower level hierarchical modules below. *** The LUTRAM column counts all LUTs used as memory including RAM, ROM, and shift registers.